* [PATCH] crypto/qat: fix gen3 legacy capabilities
@ 2023-11-15 16:05 Brian Dooley
2023-11-15 16:14 ` [PATCH v2] " Ciara Power
0 siblings, 1 reply; 4+ messages in thread
From: Brian Dooley @ 2023-11-15 16:05 UTC (permalink / raw)
To: dev; +Cc: arkadiuszx.kusztal, Ciara Power, stable, Kai Ji
From: Ciara Power <ciara.power@intel.com>
When the legacy capability flag was enabled for QAT GEN3,
in the case of the last legacy capability in the list being SM3 or SM4,
when no slice is on the device, the loop continues instead of checking
if the end of the legacy capbilities list has been met.
To fix this, the check for the end of the legacy capabilities list is
moved to the top of the loop, so it is detected when the last legacy
element is SM and no SM slice exists.
Fixes: cffb726b7797 ("crypto/qat: enable insecure algorithms")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
---
drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
index 0a939161f9..150f77ab0c 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
@@ -232,6 +232,13 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,
}
for (i = 0; i < capa_num; i++, iter++) {
+ if (unlikely(qat_legacy_capa) && (i == legacy_capa_num)) {
+ capabilities = qat_sym_crypto_caps_gen3;
+ addr += curr_capa;
+ curr_capa = 0;
+ iter = 0;
+ }
+
if (slice_map & ICP_ACCEL_MASK_SM4_SLICE && (
check_cipher_capa(&capabilities[iter],
RTE_CRYPTO_CIPHER_SM4_ECB) ||
@@ -249,13 +256,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,
memcpy(addr + curr_capa, capabilities + iter,
sizeof(struct rte_cryptodev_capabilities));
curr_capa++;
-
- if (unlikely(qat_legacy_capa) && (i == legacy_capa_num-1)) {
- capabilities = qat_sym_crypto_caps_gen3;
- addr += curr_capa;
- curr_capa = 0;
- iter = -1;
- }
}
internals->qat_dev_capabilities = internals->capa_mz->addr;
--
2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH v2] crypto/qat: fix gen3 legacy capabilities
2023-11-15 16:05 [PATCH] crypto/qat: fix gen3 legacy capabilities Brian Dooley
@ 2023-11-15 16:14 ` Ciara Power
2023-11-15 16:42 ` Ji, Kai
2023-11-16 17:53 ` [EXT] " Akhil Goyal
0 siblings, 2 replies; 4+ messages in thread
From: Ciara Power @ 2023-11-15 16:14 UTC (permalink / raw)
To: dev; +Cc: arkadiuszx.kusztal, Ciara Power, stable, Kai Ji
When the legacy capability flag was enabled for QAT GEN3,
in the case of the last legacy capability in the list being SM3 or SM4,
when no slice is on the device, the loop continues instead of checking
if the end of the legacy capbilities list has been met.
To fix this, the check for the end of the legacy capabilities list is
moved to the top of the loop, so it is detected when the last legacy
element is SM and no SM slice exists.
Fixes: cffb726b7797 ("crypto/qat: enable insecure algorithms")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
---
v2: updating sender email
---
drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
index 0a939161f9..150f77ab0c 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
@@ -232,6 +232,13 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,
}
for (i = 0; i < capa_num; i++, iter++) {
+ if (unlikely(qat_legacy_capa) && (i == legacy_capa_num)) {
+ capabilities = qat_sym_crypto_caps_gen3;
+ addr += curr_capa;
+ curr_capa = 0;
+ iter = 0;
+ }
+
if (slice_map & ICP_ACCEL_MASK_SM4_SLICE && (
check_cipher_capa(&capabilities[iter],
RTE_CRYPTO_CIPHER_SM4_ECB) ||
@@ -249,13 +256,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,
memcpy(addr + curr_capa, capabilities + iter,
sizeof(struct rte_cryptodev_capabilities));
curr_capa++;
-
- if (unlikely(qat_legacy_capa) && (i == legacy_capa_num-1)) {
- capabilities = qat_sym_crypto_caps_gen3;
- addr += curr_capa;
- curr_capa = 0;
- iter = -1;
- }
}
internals->qat_dev_capabilities = internals->capa_mz->addr;
--
2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] crypto/qat: fix gen3 legacy capabilities
2023-11-15 16:14 ` [PATCH v2] " Ciara Power
@ 2023-11-15 16:42 ` Ji, Kai
2023-11-16 17:53 ` [EXT] " Akhil Goyal
1 sibling, 0 replies; 4+ messages in thread
From: Ji, Kai @ 2023-11-15 16:42 UTC (permalink / raw)
To: Power, Ciara, dev; +Cc: Kusztal, ArkadiuszX, stable
[-- Attachment #1: Type: text/plain, Size: 2660 bytes --]
Acked-by: Kai Ji <kai.ji@intel.com>
________________________________
From: Power, Ciara <ciara.power@intel.com>
Sent: 15 November 2023 16:14
To: dev@dpdk.org <dev@dpdk.org>
Cc: Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>; Power, Ciara <ciara.power@intel.com>; stable@dpdk.org <stable@dpdk.org>; Ji, Kai <kai.ji@intel.com>
Subject: [PATCH v2] crypto/qat: fix gen3 legacy capabilities
When the legacy capability flag was enabled for QAT GEN3,
in the case of the last legacy capability in the list being SM3 or SM4,
when no slice is on the device, the loop continues instead of checking
if the end of the legacy capbilities list has been met.
To fix this, the check for the end of the legacy capabilities list is
moved to the top of the loop, so it is detected when the last legacy
element is SM and no SM slice exists.
Fixes: cffb726b7797 ("crypto/qat: enable insecure algorithms")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
---
v2: updating sender email
---
drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
index 0a939161f9..150f77ab0c 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
@@ -232,6 +232,13 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,
}
for (i = 0; i < capa_num; i++, iter++) {
+ if (unlikely(qat_legacy_capa) && (i == legacy_capa_num)) {
+ capabilities = qat_sym_crypto_caps_gen3;
+ addr += curr_capa;
+ curr_capa = 0;
+ iter = 0;
+ }
+
if (slice_map & ICP_ACCEL_MASK_SM4_SLICE && (
check_cipher_capa(&capabilities[iter],
RTE_CRYPTO_CIPHER_SM4_ECB) ||
@@ -249,13 +256,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,
memcpy(addr + curr_capa, capabilities + iter,
sizeof(struct rte_cryptodev_capabilities));
curr_capa++;
-
- if (unlikely(qat_legacy_capa) && (i == legacy_capa_num-1)) {
- capabilities = qat_sym_crypto_caps_gen3;
- addr += curr_capa;
- curr_capa = 0;
- iter = -1;
- }
}
internals->qat_dev_capabilities = internals->capa_mz->addr;
--
2.25.1
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^ permalink raw reply [flat|nested] 4+ messages in thread* RE: [EXT] [PATCH v2] crypto/qat: fix gen3 legacy capabilities
2023-11-15 16:14 ` [PATCH v2] " Ciara Power
2023-11-15 16:42 ` Ji, Kai
@ 2023-11-16 17:53 ` Akhil Goyal
1 sibling, 0 replies; 4+ messages in thread
From: Akhil Goyal @ 2023-11-16 17:53 UTC (permalink / raw)
To: Ciara Power, dev; +Cc: arkadiuszx.kusztal, stable, Kai Ji
> When the legacy capability flag was enabled for QAT GEN3,
> in the case of the last legacy capability in the list being SM3 or SM4,
> when no slice is on the device, the loop continues instead of checking
> if the end of the legacy capbilities list has been met.
>
> To fix this, the check for the end of the legacy capabilities list is
> moved to the top of the loop, so it is detected when the last legacy
> element is SM and no SM slice exists.
>
> Fixes: cffb726b7797 ("crypto/qat: enable insecure algorithms")
> Cc: stable@dpdk.org
>
> Signed-off-by: Ciara Power <ciara.power@intel.com>
Applied to dpdk-next-crypto
Thanks.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-11-15 16:14 ` [PATCH v2] " Ciara Power
2023-11-15 16:42 ` Ji, Kai
2023-11-16 17:53 ` [EXT] " Akhil Goyal
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