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Thu, 14 Dec 2023 07:13:02 -0800 From: Michael Baum To: CC: Matan Azrad , Dariusz Sosnowski , Raslan Darawsheh , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH v3 2/2] net/mlx5: add random item support Date: Thu, 14 Dec 2023 17:12:48 +0200 Message-ID: <20231214151248.1654878-3-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231214151248.1654878-1-michaelba@nvidia.com> References: <20231130164001.666702-1-michaelba@nvidia.com> <20231214151248.1654878-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB4B:EE_|PH7PR12MB5734:EE_ X-MS-Office365-Filtering-Correlation-Id: 8f7d7de6-63aa-494b-c33c-08dbfcb735e8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Hp4yWG2hi9xQTvYGZMweI7fxEKP9MWPLfUIycQsVsRckRorMQPXdEZKj/Ylfv4Br5Lnxa9OULoU/VAkOqgX11pUXZqKvNPrNDztDPL37AI5mXITLeG5cPE355jqErF+6vJBTy3AGLelMuTb32UHNZocMIJM74prn2NweZNza7FiJip2Ado1LeljO3VN1Rcw9Xx95f8KKYZed4uSFnpUjrvXl1nUTT1YKjA/dsUt2OR38SOZfWk+FnevizTKbRleF8fQvYrth3Gm4VeEboMJSLAhto28ic0nsXMqjQUmwwtU0oEJnUcAQXo4LENzfAdv6moduUJTtnf/OzS4p2RFbxice3LXI996HyamDODlm6MA7SAn3rNsI63x5ZoC+MwJVLHQA2blKNI9zKRhIwjYRSfi4Vdcwly4yTA+GxvvfLx9jMV5hxDYe0+U++8S1L0GQ55X436B82Vm4WPT7eGFmI3H3qPvCMJtMMhJlRtRIF7va787PD8NutERSbO7Guf1S0seX76i3KkpQb3aD1SBbIcVfIdFzD57ZnM8EvzamtHCa0ryPKdDiLt+Ub0S+HkLWhCP6lTwcBItwBagiIz6mqUVa4fB5aE2DH71s0apkZwLKYpMV+fSmIKBXAM39VOz1pE2C4ycnAZbtkGjulQoLvO1MGsrqyc8wdPShOv6bNYdFWmQUKi2h3M78Olv/uo0FMZzwVlOh/vnJSBL8DsDjmZBdTc7wrC+J/s2TcWLJ5kMZH4dFUsZJ9hxQcbvPRBqW X-Forefront-Antispam-Report: CIP:216.228.117.161; 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Signed-off-by: Michael Baum --- doc/guides/nics/features/mlx5.ini | 1 + doc/guides/nics/mlx5.rst | 9 +++++++++ doc/guides/rel_notes/release_24_03.rst | 3 +++ drivers/net/mlx5/mlx5_flow_dv.c | 5 +++++ drivers/net/mlx5/mlx5_flow_hw.c | 5 +++++ 5 files changed, 23 insertions(+) diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini index 0739fe9d63..6261b7d657 100644 --- a/doc/guides/nics/features/mlx5.ini +++ b/doc/guides/nics/features/mlx5.ini @@ -88,6 +88,7 @@ port_id = Y port_representor = Y ptype = Y quota = Y +random = Y tag = Y tcp = Y udp = Y diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 6b52fb93c5..971c229850 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -167,6 +167,7 @@ Features - Sub-Function. - Matching on represented port. - Matching on aggregated affinity. +- Matching on random value. Limitations @@ -564,6 +565,7 @@ Limitations - Modification of the MPLS header is supported only in HWS and only to copy from, the encapsulation level is always 0. - Modification of the 802.1Q Tag, VXLAN Network or GENEVE Network ID's is not supported. + - Modify field action using ``RTE_FLOW_FIELD_RANDOM`` is not supported. - Encapsulation levels are not supported, can modify outermost header fields only. - Offsets cannot skip past the boundary of a field. - If the field type is ``RTE_FLOW_FIELD_MAC_TYPE`` @@ -770,6 +772,13 @@ Limitations - In HW steering (``dv_flow_en`` = 2): - not supported on guest port. +- Match on random value: + + - Supported only with HW Steering enabled (``dv_flow_en`` = 2). + - Supported only in table with ``nb_flows=1``. + - NIC ingress/egress flow in group 0 is not supported. + - Supports matching only 16 bits (LSB). + - During live migration to a new process set its flow engine as standby mode, the user should only program flow rules in group 0 (``fdb_def_rule_en=0``). Live migration is only supported under SWS (``dv_flow_en=1``). diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index 819cef7f20..93e58b55ca 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -60,6 +60,9 @@ New Features * Added ``RTE_FLOW_ITEM_TYPE_RANDOM`` to match random value. * Added ``RTE_FLOW_FIELD_RANDOM`` to represent it in field API. +* **Updated NVIDIA mlx5 net driver.** + + * Added support for ``RTE_FLOW_ITEM_TYPE_RANDOM`` flow item. Removed Items ------------- diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 115d730317..67a44095d7 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -5396,6 +5396,11 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifications of the MPLS header " "is not supported"); + if (dst_data->field == RTE_FLOW_FIELD_RANDOM || + src_data->field == RTE_FLOW_FIELD_RANDOM) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "modifications of random value is not supported"); if (dst_data->field == RTE_FLOW_FIELD_MARK || src_data->field == RTE_FLOW_FIELD_MARK) if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index da873ae2e2..af4e9abd89 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -5047,6 +5047,10 @@ flow_hw_validate_action_modify_field(struct rte_eth_dev *dev, return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifying vlan_type is not supported"); + if (flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_RANDOM)) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "modifying random value is not supported"); if (flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_GENEVE_VNI)) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, action, @@ -6807,6 +6811,7 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev, case RTE_FLOW_ITEM_TYPE_FLEX: case RTE_FLOW_ITEM_TYPE_IB_BTH: case RTE_FLOW_ITEM_TYPE_PTYPE: + case RTE_FLOW_ITEM_TYPE_RANDOM: break; case RTE_FLOW_ITEM_TYPE_INTEGRITY: /* -- 2.25.1