From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9EDF8438E9; Wed, 17 Jan 2024 11:32:38 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E084740F1A; Wed, 17 Jan 2024 11:31:52 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id C91A340E13 for ; Wed, 17 Jan 2024 11:31:50 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40H8pnMq012890 for ; Wed, 17 Jan 2024 02:31:50 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=EnQZ97ICXvkMKuhaiaZg799SdmtNitOGErAsxyT19rw=; b=HrX T+6E300fHqmrVzqrm/Jm8KOY4Hp/DS5PC70Wl0v/6spNNJwsKeJ5Uvpz2kNyeX8n Z/lo6Le2DiCd/E+sFr68fhLIrsMSwvouONK+CFgxviVIUCi5ACfPbUwDkiUCm3fb jwK6ygQKuCnnR28+UAZ4ljPyC5eAUD0DNCbEY83AWd5qe9TX07Iok1cp5Hrl8iny Z0L5oHObVaLPBxhg5YICl38wyQ2iAF/UI+MTLlnvZWmQDUCrtoxQ+GdW+HEYyr4t KKmyW0xlZ6s+Hq1Uumsbd31t0lZRXp1ti5wlI5ZrV31U4vATh7U8SuCSsjka1IIM e60QC7ETPov+Fuf5cFQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3vp0ge2juh-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 17 Jan 2024 02:31:49 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 02:31:35 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 02:31:35 -0800 Received: from BG-LT92004.corp.innovium.com (unknown [10.28.22.179]) by maili.marvell.com (Postfix) with ESMTP id 73FEB5B6933; Wed, 17 Jan 2024 02:31:33 -0800 (PST) From: Anoob Joseph To: Akhil Goyal CC: Rahul Bhansali , Jerin Jacob , Vidya Sagar Velumuri , Tejasree Kondoj , Subject: [PATCH v3 09/24] crypto/cnxk: Rx inject config update Date: Wed, 17 Jan 2024 16:00:54 +0530 Message-ID: <20240117103109.922-10-anoobj@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117103109.922-1-anoobj@marvell.com> References: <20240102045417.115-1-anoobj@marvell.com> <20240117103109.922-1-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: hh2rGWwanKNnh95X9qu_MoiVuc0uI0w8 X-Proofpoint-ORIG-GUID: hh2rGWwanKNnh95X9qu_MoiVuc0uI0w8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_05,2024-01-17_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Rahul Bhansali - Update chan in CPT inst from port's Rx chan - Set Rx inject config in Idev struct Signed-off-by: Rahul Bhansali --- drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 4 +++- drivers/crypto/cnxk/cn10k_ipsec.c | 3 +++ drivers/crypto/cnxk/cnxk_cryptodev.h | 1 + drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 2 ++ 4 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c index e656f47693..03ecf583af 100644 --- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c @@ -15,6 +15,7 @@ #else #include "roc_io_generic.h" #endif +#include "roc_idev.h" #include "roc_sso.h" #include "roc_sso_dp.h" @@ -1122,6 +1123,7 @@ cn10k_cryptodev_sec_inb_rx_inject(void *dev, struct rte_mbuf **pkts, inst->dptr = dptr; inst->rptr = dptr; + inst->w0.hw_s.chan = *(vf->rx_chan_base + m->port); inst->w0.hw_s.l2_len = l2_len; inst->w0.hw_s.et_offset = l2_len - 2; @@ -1654,7 +1656,7 @@ cn10k_cryptodev_sec_rx_inject_configure(void *device, uint16_t port_id, bool ena if (ret) return -ENOTSUP; - RTE_SET_USED(enable); + roc_idev_nix_rx_inject_set(port_id, enable); return 0; } diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c index 2d098fdd24..d08a1067ca 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec.c +++ b/drivers/crypto/cnxk/cn10k_ipsec.c @@ -192,6 +192,9 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf, sec_sess->is_outbound = false; sec_sess->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, in_sa); + /* Save index/SPI in cookie, specific required for Rx Inject */ + sa_dptr->w1.s.cookie = 0xFFFFFFFF; + /* pre-populate CPT INST word 4 */ inst_w4.u64 = 0; inst_w4.s.opcode_major = ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC | ROC_IE_OT_INPLACE_BIT; diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h b/drivers/crypto/cnxk/cnxk_cryptodev.h index 1ded8911a1..5d974690fc 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev.h +++ b/drivers/crypto/cnxk/cnxk_cryptodev.h @@ -20,6 +20,7 @@ struct cnxk_cpt_vf { struct roc_cpt_lmtline rx_inj_lmtline; uint16_t rx_inj_pf_func; + uint16_t *rx_chan_base; struct roc_cpt cpt; struct rte_cryptodev_capabilities crypto_caps[CNXK_CPT_MAX_CAPS]; struct rte_cryptodev_capabilities diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index cdcfa92e6d..04dbc67fc1 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -10,6 +10,7 @@ #include "roc_ae_fpm_tables.h" #include "roc_cpt.h" #include "roc_errata.h" +#include "roc_idev.h" #include "roc_ie_on.h" #include "cnxk_ae.h" @@ -117,6 +118,7 @@ cnxk_cpt_dev_config(struct rte_cryptodev *dev, struct rte_cryptodev_config *conf if (rte_security_dynfield_register() < 0) return -ENOTSUP; rxc_ena = true; + vf->rx_chan_base = roc_idev_nix_rx_chan_base_get(); } ret = roc_cpt_dev_configure(roc_cpt, nb_lf, rxc_ena, vf->rx_inject_qp); -- 2.25.1