From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E0C2943901; Fri, 19 Jan 2024 18:44:34 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0ACB842DDA; Fri, 19 Jan 2024 18:44:12 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by mails.dpdk.org (Postfix) with ESMTP id 6F18C42DC0 for ; Fri, 19 Jan 2024 18:44:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705686249; x=1737222249; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Nt+GFGoOHNhg+sZGyWzQzs8DPgHePNbdmC6ZwcDT10o=; b=GZXT8Zl6chSz2evaPNCaFjsM9cOdz0bX5Qz9dcW/2Vitl86JRRK2bFpx ix1YqtbSJJko8F79jaKDlwbdsLxy2hpbyU8V1dySiV3RXSnqmvl6T7I85 /82UWKdBxlsk0kprbP4pRh/zlJBy+Es6OQzi5yMwazjczK+HGLU3fQDqk gQQToz/lQaAgbB4YpoHkzoFxh9OcZthsMCW1JoG+/dNIH36WpZOjiXTRg iDgBV4UNqJpoAEo8mhU10Z6H42LhvR05xgBO4MYdeMeXfP85aqP5aQrtO DkYgrmcbIPqwAHDLTj5LpaEirEsLZWK9l8CY3TKKCA8f4q2e1bzL/GMT9 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10957"; a="683693" X-IronPort-AV: E=Sophos;i="6.05,204,1701158400"; d="scan'208";a="683693" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Jan 2024 09:44:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10957"; a="761177783" X-IronPort-AV: E=Sophos;i="6.05,204,1701158400"; d="scan'208";a="761177783" Received: from silpixa00400957.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.26]) by orsmga006.jf.intel.com with ESMTP; 19 Jan 2024 09:44:04 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, mattias.ronnblom@ericsson.com, abdullah.sevincer@intel.com, sachin.saxena@oss.nxp.com, hemant.agrawal@nxp.com, pbhagavatula@marvell.com, pravin.pathak@intel.com, Bruce Richardson Subject: [PATCH v2 04/11] eventdev: cleanup doxygen comments on info structure Date: Fri, 19 Jan 2024 17:43:39 +0000 Message-Id: <20240119174346.108905-5-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240119174346.108905-1-bruce.richardson@intel.com> References: <20240118134557.73172-1-bruce.richardson@intel.com> <20240119174346.108905-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Some small rewording changes to the doxygen comments on struct rte_event_dev_info. Signed-off-by: Bruce Richardson --- lib/eventdev/rte_eventdev.h | 46 ++++++++++++++++++++----------------- 1 file changed, 25 insertions(+), 21 deletions(-) diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h index 57a2791946..872f241df2 100644 --- a/lib/eventdev/rte_eventdev.h +++ b/lib/eventdev/rte_eventdev.h @@ -482,54 +482,58 @@ struct rte_event_dev_info { const char *driver_name; /**< Event driver name */ struct rte_device *dev; /**< Device information */ uint32_t min_dequeue_timeout_ns; - /**< Minimum supported global dequeue timeout(ns) by this device */ + /**< Minimum global dequeue timeout(ns) supported by this device */ uint32_t max_dequeue_timeout_ns; - /**< Maximum supported global dequeue timeout(ns) by this device */ + /**< Maximum global dequeue timeout(ns) supported by this device */ uint32_t dequeue_timeout_ns; /**< Configured global dequeue timeout(ns) for this device */ uint8_t max_event_queues; - /**< Maximum event_queues supported by this device */ + /**< Maximum event queues supported by this device */ uint32_t max_event_queue_flows; - /**< Maximum supported flows in an event queue by this device*/ + /**< Maximum number of flows within an event queue supported by this device*/ uint8_t max_event_queue_priority_levels; /**< Maximum number of event queue priority levels by this device. - * Valid when the device has RTE_EVENT_DEV_CAP_QUEUE_QOS capability + * Valid when the device has RTE_EVENT_DEV_CAP_QUEUE_QOS capability. + * The priority levels are evenly distributed between + * @ref RTE_EVENT_DEV_PRIORITY_HIGHEST and @ref RTE_EVENT_DEV_PRIORITY_LOWEST. */ uint8_t max_event_priority_levels; /**< Maximum number of event priority levels by this device. * Valid when the device has RTE_EVENT_DEV_CAP_EVENT_QOS capability + * The priority levels are evenly distributed between + * @ref RTE_EVENT_DEV_PRIORITY_HIGHEST and @ref RTE_EVENT_DEV_PRIORITY_LOWEST. */ uint8_t max_event_ports; /**< Maximum number of event ports supported by this device */ uint8_t max_event_port_dequeue_depth; - /**< Maximum number of events can be dequeued at a time from an - * event port by this device. - * A device that does not support bulk dequeue will set this as 1. + /**< Maximum number of events that can be dequeued at a time from an event port + * on this device. + * A device that does not support bulk dequeue will set this to 1. */ uint32_t max_event_port_enqueue_depth; - /**< Maximum number of events can be enqueued at a time from an - * event port by this device. - * A device that does not support bulk enqueue will set this as 1. + /**< Maximum number of events that can be enqueued at a time to an event port + * on this device. + * A device that does not support bulk enqueue will set this to 1. */ uint8_t max_event_port_links; - /**< Maximum number of queues that can be linked to a single event - * port by this device. + /**< Maximum number of queues that can be linked to a single event port on this device. */ int32_t max_num_events; /**< A *closed system* event dev has a limit on the number of events it - * can manage at a time. An *open system* event dev does not have a - * limit and will specify this as -1. + * can manage at a time. + * Once the number of events tracked by an eventdev exceeds this number, + * any enqueues of NEW events will fail. + * An *open system* event dev does not have a limit and will specify this as -1. */ uint32_t event_dev_cap; - /**< Event device capabilities(RTE_EVENT_DEV_CAP_)*/ + /**< Event device capabilities flags (RTE_EVENT_DEV_CAP_*) */ uint8_t max_single_link_event_port_queue_pairs; - /**< Maximum number of event ports and queues that are optimized for - * (and only capable of) single-link configurations supported by this - * device. These ports and queues are not accounted for in - * max_event_ports or max_event_queues. + /**< Maximum number of event ports and queues, supported by this device, + * that are optimized for (and only capable of) single-link configurations. + * These ports and queues are not accounted for in max_event_ports or max_event_queues. */ uint8_t max_profiles_per_port; - /**< Maximum number of event queue profiles per event port. + /**< Maximum number of event queue link profiles per event port. * A device that doesn't support multiple profiles will set this as 1. */ }; -- 2.40.1