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From: Chengwen Feng <fengchengwen@huawei.com>
To: <dev@dpdk.org>, <thomas@monjalon.net>, <ferruh.yigit@amd.com>,
 <stephen@networkplumber.org>
CC: <tangkunshan@huawei.com>
Subject: [PATCH v3 1/8] eal: introduce more macro for bit definition
Date: Fri, 26 Jan 2024 06:10:06 +0000
Message-ID: <20240126061013.53608-2-fengchengwen@huawei.com>
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Introduce macros:
1. RTE_SHIFT_VAL64: get the uint64_t value which shifted by nr.
2. RTE_SHIFT_VAL32: get the uint32_t value which shifted by nr.
3. RTE_GENMASK64: generate a contiguous 64bit bitmask starting at bit
                  position low and ending at position high.
4. RTE_GENMASK32: generate a contiguous 32bit bitmask starting at bit
                  position low and ending at position high.
5. RTE_FIELD_GET64: extract a 64bit field element.
6. RTE_FIELD_GET32: extract a 32bit field element.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
---
 lib/eal/include/rte_bitops.h | 64 ++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

diff --git a/lib/eal/include/rte_bitops.h b/lib/eal/include/rte_bitops.h
index 6bd8bae21a..bab08d53ec 100644
--- a/lib/eal/include/rte_bitops.h
+++ b/lib/eal/include/rte_bitops.h
@@ -39,6 +39,70 @@ extern "C" {
  */
 #define RTE_BIT32(nr) (UINT32_C(1) << (nr))
 
+/**
+ * Get the uint64_t value which shifted by nr.
+ *
+ * @param val
+ *   The value to be shifted.
+ * @param nr
+ *   The bit number in range of 0 to (64 - width of val).
+ */
+#define RTE_SHIFT_VAL64(val, nr) (UINT64_C(val) << (nr))
+
+/**
+ * Get the uint32_t value which shifted by nr.
+ *
+ * @param val
+ *   The value to be shifted.
+ * @param nr
+ *   The bit number in range of 0 to (32 - width of val).
+ */
+#define RTE_SHIFT_VAL32(val, nr) (UINT32_C(val) << (nr))
+
+/**
+ * Generate a contiguous 64bit bitmask starting at bit position low
+ * and ending at position high.
+ *
+ * @param high
+ *   High bit position.
+ * @param low
+ *   Low bit position.
+ */
+#define RTE_GENMASK64(high, low) (((~UINT64_C(0)) << (low)) & (~UINT64_C(0) >> (63u - (high))))
+
+/**
+ * Generate a contiguous 32bit bitmask starting at bit position low
+ * and ending at position high.
+ *
+ * @param high
+ *   High bit position.
+ * @param low
+ *   Low bit position.
+ */
+#define RTE_GENMASK32(high, low) (((~UINT32_C(0)) << (low)) & (~UINT32_C(0) >> (31u - (high))))
+
+/**
+ * Extract a 64bit field element.
+ *
+ * @param mask
+ *   shifted mask.
+ * @param reg
+ *   value of entire bitfield.
+ */
+#define RTE_FIELD_GET64(mask, reg) \
+		((typeof(mask))(((reg) & (mask)) >> rte_ctz64(mask)))
+
+/**
+ * Extract a 32bit field element.
+ *
+ * @param mask
+ *   shifted mask.
+ * @param reg
+ *   value of entire bitfield.
+ */
+#define RTE_FIELD_GET32(mask, reg) \
+		((typeof(mask))(((reg) & (mask)) >> rte_ctz32(mask)))
+
 /*------------------------ 32-bit relaxed operations ------------------------*/
 
 /**
-- 
2.17.1