From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 95611439EC; Sun, 28 Jan 2024 10:41:06 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CD37740C35; Sun, 28 Jan 2024 10:40:54 +0100 (CET) Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2069.outbound.protection.outlook.com [40.107.244.69]) by mails.dpdk.org (Postfix) with ESMTP id A03B6406BC for ; Sun, 28 Jan 2024 10:40:51 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=AqnPWFMoaYOsL8VNOrxbHGPndbjJSGIBjQUFLx7nJZi+S0BuedJizwvpu4mPXbBE6ZsAN+emXqIbOkzfRGWln7WYtiJ/s4U25/KubxL2Tsn2hVq5lENKl1Szc7+0ttpYC3jZ/6o6L7kLDyyZWmQ5fyO/i+ZtOsiMwBJHTt41cOi2rwicJETT/+tAkMrLtu53XRkMha0QFJ2wAgb7PHVKB/IlANoCqVQ+2UOnkDdwARiAt+qLjfnI1lI1QuYqTScdBIX/bBJiTf6d2AJfnEuaXEjm3HU8PPPCJh6v20AqAI20jIeHvoOwxjKXTx65LiUKAA8luSZ7Wcu4azlyd5YYLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=LA5JiNLcwhw8r5UC8LWOa2kdSycbMZyK4HIuHbxYEvI=; b=OFr1/55+TFR1Ei69/sAX3ryuRh1Bn6NyVuFvbtYhIULRoixlXUsDGGJ0y7dWUu1n+WRo+LAHr4NcaNJLJa8ZENBPow87N538+mZ2WjBzdH7XxY8CHRjUFtZf/N7jndAbjka+WOGnXtyZAnxijOoFgCzfTo9rT30Be423s/PqGS1MsyBsDzERwZ2Pvu+UmV1QcyGHLbijW9VNxiFAO9xtgwggVfmiPtlko1ZR/UVT6rJLO94saL+YoxWKcPNYc8H9MVvxZRI9HvDooVZU8DauLaj3NZdcTz9YJLQqxByOz73n9PXScBcu/aKQzX0Tewz3dh06hAPg5B9PHIY4qOPJVw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=amd.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LA5JiNLcwhw8r5UC8LWOa2kdSycbMZyK4HIuHbxYEvI=; b=hyLpoaqI/A6v/6zBh8UoNXEWkLqzIS2YNZ0Yb+p8HsC8co661UFFVdgvQN2lr7IVE3fqQuThTqGeHA2ZSpDoR3u7OMkTq1/cy3aB3RBpSnrjgZBYkn2AYkS+hrNUTcb6uvcka3M5rE1F2rGrE2/zt64HVyycaK+IlWa5HKnbqZRg/6XK4nKBd6tfCm3MAw7DUvHnameDbLjmmZrkv15YlPoawxAI1i46+O4KrHS0cEAH1TT7iogEygJUfBEi8eLBMqPzW3emMxUoGP98Yh+nBW2YjmT5HSURWC4lRBlv9kiSqBUAqYcOhCF5/cW/WuAsm9jNeI7qauV6XrSEBurOVA== Received: from SA0PR12CA0016.namprd12.prod.outlook.com (2603:10b6:806:6f::21) by CYXPR12MB9428.namprd12.prod.outlook.com (2603:10b6:930:d5::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7228.31; Sun, 28 Jan 2024 09:40:49 +0000 Received: from SN1PEPF0002636A.namprd02.prod.outlook.com (2603:10b6:806:6f:cafe::5f) by SA0PR12CA0016.outlook.office365.com (2603:10b6:806:6f::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7228.32 via Frontend Transport; Sun, 28 Jan 2024 09:40:48 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by SN1PEPF0002636A.mail.protection.outlook.com (10.167.241.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7249.19 via Frontend Transport; Sun, 28 Jan 2024 09:40:48 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 28 Jan 2024 01:40:38 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 28 Jan 2024 01:40:34 -0800 From: Ori Kam To: , , , , , Viacheslav Ovsiienko , Suanming Mou , Matan Azrad CC: , , Subject: [PATCH 3/4] net/mlx5: add calc encap hash support Date: Sun, 28 Jan 2024 11:39:41 +0200 Message-ID: <20240128093943.4461-4-orika@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240128093943.4461-1-orika@nvidia.com> References: <20240128093943.4461-1-orika@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636A:EE_|CYXPR12MB9428:EE_ X-MS-Office365-Filtering-Correlation-Id: bc875a6b-5b56-4f29-b2fa-08dc1fe535c4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: YOAsAdNHbMPj89qUt2s19tprjv6Ixa3s/Hpl6CGfRMwCOyn+DbvkTTAN1jyjh9Tpf8Q1sAyBk+q9c2ZTtc4yO13V2ek2PQCcfnOTqpyH0Mh9J5L3TAW1wFI++poJASAVgJIprI1KEPj1QN6Do34Wnsul3ZzJB4cI157IGdRBMyYzM6GUNC/jRWV6c5xeLjMwQQB/Tge9N14xQS2XZBhjPVO6kxDmrP6L0pZj2Nscdn/tBM2Bb8zeqzokpjFn+Cb79BoKCkDFhUEI6l5prJpvKRjehiQQfePfK3djQuoRoweXtLnT2GyzHUO9u5/OJVzxj3S/0YqR1H98UHmZTEUFqXskoOKvc6gDt9QzvCWkI5BSi9bwqLzF2/zLv7wYmequ7gKqtzSDExwLX5S+sjlRS1lpwvDGFyZ7ZnocC19c8zHUfWT688ljoE3E+NfFUFROheiaKOuESJ43Fmo4GGeEL53fLCrHV5idg5QDxiLgt0bC3GRVDsXIw6sm74fACcGes2tWiO9F9x67H8k7ROUU5yONKTSCysQ36o16QGeaVpmlzHNRNkg26jm2ik9bRlmV66SdCQIOwYqGwYfGiDFLFKbK7XsegoP7vqTl0a0OyzCJdnOI2Kb/to9XBipnCidAO/IKml+Ms5oSNKNmw0+TuVKkPPHedLBKLF5buUAL2PRfklatNgWQ1uTYW5pp/AfS38+ElTt8VyYF5wC7xP0d9WIMUh5o3I2Kpp/lxgkSVbw= X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(4636009)(396003)(346002)(376002)(136003)(39860400002)(230922051799003)(186009)(64100799003)(451199024)(1800799012)(82310400011)(36840700001)(40470700004)(46966006)(41300700001)(478600001)(6666004)(107886003)(2616005)(7696005)(55016003)(86362001)(2906002)(5660300002)(70586007)(70206006)(110136005)(316002)(6636002)(54906003)(8676002)(8936002)(4326008)(1076003)(36860700001)(6286002)(16526019)(83380400001)(26005)(336012)(426003)(47076005)(7636003)(356005)(36756003)(82740400003)(40480700001)(40460700003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2024 09:40:48.8572 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bc875a6b-5b56-4f29-b2fa-08dc1fe535c4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9428 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This commit adds support for encap hash calculation. Signed-off-by: Ori Kam --- drivers/net/mlx5/mlx5_flow.c | 29 +++++++++++++++ drivers/net/mlx5/mlx5_flow.h | 8 ++++ drivers/net/mlx5/mlx5_flow_hw.c | 66 +++++++++++++++++++++++++++++++++ 3 files changed, 103 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index acaf34ce52..d1a7ad9234 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -1197,6 +1197,12 @@ mlx5_flow_calc_table_hash(struct rte_eth_dev *dev, const struct rte_flow_item pattern[], uint8_t pattern_template_index, uint32_t *hash, struct rte_flow_error *error); +static int +mlx5_flow_calc_encap_hash(struct rte_eth_dev *dev, + const struct rte_flow_item pattern[], + enum rte_flow_encap_hash_field dest_field, + uint8_t *hash, + struct rte_flow_error *error); static const struct rte_flow_ops mlx5_flow_ops = { .validate = mlx5_flow_validate, @@ -1253,6 +1259,7 @@ static const struct rte_flow_ops mlx5_flow_ops = { .async_action_list_handle_query_update = mlx5_flow_async_action_list_handle_query_update, .flow_calc_table_hash = mlx5_flow_calc_table_hash, + .flow_calc_encap_hash = mlx5_flow_calc_encap_hash, }; /* Tunnel information. */ @@ -11121,6 +11128,28 @@ mlx5_flow_calc_table_hash(struct rte_eth_dev *dev, hash, error); } +static int +mlx5_flow_calc_encap_hash(struct rte_eth_dev *dev, + const struct rte_flow_item pattern[], + enum rte_flow_encap_hash_field dest_field, + uint8_t *hash, + struct rte_flow_error *error) +{ + enum mlx5_flow_drv_type drv_type = flow_get_drv_type(dev, NULL); + const struct mlx5_flow_driver_ops *fops; + + if (drv_type == MLX5_FLOW_TYPE_MIN || drv_type == MLX5_FLOW_TYPE_MAX) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, + NULL, "invalid driver type"); + fops = flow_get_drv_ops(drv_type); + if (!fops || !fops->flow_calc_encap_hash) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, + NULL, "no calc encap hash handler"); + return fops->flow_calc_encap_hash(dev, pattern, dest_field, hash, error); +} + /** * Destroy all indirect actions (shared RSS). * diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index fe4f46724b..a04dde9e93 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -2109,6 +2109,13 @@ typedef int const struct rte_flow_item pattern[], uint8_t pattern_template_index, uint32_t *hash, struct rte_flow_error *error); +typedef int +(*mlx5_flow_calc_encap_hash_t) + (struct rte_eth_dev *dev, + const struct rte_flow_item pattern[], + enum rte_flow_encap_hash_field dest_field, + uint8_t *hash, + struct rte_flow_error *error); struct mlx5_flow_driver_ops { mlx5_flow_validate_t validate; @@ -2182,6 +2189,7 @@ struct mlx5_flow_driver_ops { mlx5_flow_async_action_list_handle_query_update_t async_action_list_handle_query_update; mlx5_flow_calc_table_hash_t flow_calc_table_hash; + mlx5_flow_calc_encap_hash_t flow_calc_encap_hash; }; /* mlx5_flow.c */ diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 48b70c0c29..0e4e7bd3f5 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -11556,6 +11556,71 @@ flow_hw_calc_table_hash(struct rte_eth_dev *dev, return 0; } +static int +flow_hw_calc_encap_hash(struct rte_eth_dev *dev, + const struct rte_flow_item pattern[], + enum rte_flow_encap_hash_field dest_field, + uint8_t *hash, + struct rte_flow_error *error) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5dr_crc_encap_entropy_hash_fields data; + enum mlx5dr_crc_encap_entropy_hash_size res_size = + dest_field == RTE_FLOW_ENCAP_HASH_FIELD_SRC_PORT ? + MLX5DR_CRC_ENCAP_ENTROPY_HASH_SIZE_16 : + MLX5DR_CRC_ENCAP_ENTROPY_HASH_SIZE_8; + int res; + + memset(&data, 0, sizeof(struct mlx5dr_crc_encap_entropy_hash_fields)); + + for (; pattern->type != RTE_FLOW_ITEM_TYPE_END; pattern++) { + switch (pattern->type) { + case RTE_FLOW_ITEM_TYPE_IPV4: + data.dst.ipv4_addr = + ((const struct rte_flow_item_ipv4 *)(pattern->spec))->hdr.dst_addr; + data.src.ipv4_addr = + ((const struct rte_flow_item_ipv4 *)(pattern->spec))->hdr.src_addr; + break; + case RTE_FLOW_ITEM_TYPE_IPV6: + memcpy(data.dst.ipv6_addr, + ((const struct rte_flow_item_ipv6 *)(pattern->spec))->hdr.dst_addr, + sizeof(data.dst.ipv6_addr)); + memcpy(data.src.ipv6_addr, + ((const struct rte_flow_item_ipv6 *)(pattern->spec))->hdr.src_addr, + sizeof(data.src.ipv6_addr)); + break; + case RTE_FLOW_ITEM_TYPE_UDP: + data.next_protocol = IPPROTO_UDP; + data.dst_port = + ((const struct rte_flow_item_udp *)(pattern->spec))->hdr.dst_port; + data.src_port = + ((const struct rte_flow_item_udp *)(pattern->spec))->hdr.src_port; + break; + case RTE_FLOW_ITEM_TYPE_TCP: + data.next_protocol = IPPROTO_TCP; + data.dst_port = + ((const struct rte_flow_item_tcp *)(pattern->spec))->hdr.dst_port; + data.src_port = + ((const struct rte_flow_item_tcp *)(pattern->spec))->hdr.src_port; + break; + case RTE_FLOW_ITEM_TYPE_ICMP: + data.next_protocol = IPPROTO_ICMP; + break; + case RTE_FLOW_ITEM_TYPE_ICMP6: + data.next_protocol = IPPROTO_ICMPV6; + break; + default: + break; + } + } + res = mlx5dr_crc_encap_entropy_hash_calc(priv->dr_ctx, &data, hash, res_size); + if (res) + return rte_flow_error_set(error, res, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, "error while calculating encap hash"); + return 0; +} + const struct mlx5_flow_driver_ops mlx5_flow_hw_drv_ops = { .info_get = flow_hw_info_get, .configure = flow_hw_configure, @@ -11601,6 +11666,7 @@ const struct mlx5_flow_driver_ops mlx5_flow_hw_drv_ops = { .item_create = flow_dv_item_create, .item_release = flow_dv_item_release, .flow_calc_table_hash = flow_hw_calc_table_hash, + .flow_calc_encap_hash = flow_hw_calc_encap_hash, }; /** -- 2.34.1