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[204.195.123.141]) by smtp.gmail.com with ESMTPSA id y20-20020a17090ad71400b002970a6fc145sm2087425pju.40.2024.02.09.17.32.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Feb 2024 17:32:41 -0800 (PST) Date: Fri, 9 Feb 2024 17:32:39 -0800 From: Stephen Hemminger To: Wathsala Vithanage Cc: Thomas Monjalon , Dariusz Sosnowski , Viacheslav Ovsiienko , Ori Kam , Suanming Mou , Matan Azrad , dev@dpdk.org, nd@arm.com, Honnappa Nagarahalli Subject: Re: [PATCH] net/mlx5: enable PCI related counters Message-ID: <20240209173239.72497ffb@hermes.local> In-Reply-To: <20240209204142.1148790-1-wathsala.vithanage@arm.com> References: <20240209204142.1148790-1-wathsala.vithanage@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Fri, 9 Feb 2024 20:41:42 +0000 Wathsala Vithanage wrote: > Versions of Mellanox NICs starting from CX5 have device counters > related to PCI. These counters are helpful in debugging IO > bottlenecks. For instance, the outbound_pci_stalled_rd and > outbound_pci_stalled_wr counters can help with identifying NIC > stalls due to insufficient PCI credits, which otherwise would > have required a PCI analyzer or a sophisticated PCI root port > with a PMU. > Currently none of these are available in the MLX5 PMD even > though ethtool is capable of reading some of them. > Since PMD uses the same ioctl used by ethtool (SIOCETHTOOL) and > reads via the kernel driver it is possible to add support with > ease. > There is one more PCI related counter and a device counter that > aren't implemented in the Linux driver at the moment. These two > are named outbound_pci_buffer_overflow and dev_out_of_buffer > respectively. As per Nvidia's documentation these two counters > can tell the number of packets dropped due to pci buffer > overflow and the number of times the device owned queue had not > enough buffers allocated. > > Signed-off-by: Wathsala Vithanage > Reviewed-by: Honnappa Nagarahalli Would it be possible to do this at PCI bus layer so all PCI devices have that feature?