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(seliicwb00002.seli.gic.ericsson.se [10.156.25.100]) by seliicinfr00050.seli.gic.ericsson.se (Postfix) with ESMTP id 506951C006A; Tue, 20 Feb 2024 09:57:07 +0100 (CET) From: =?UTF-8?q?Mattias=20R=C3=B6nnblom?= To: CC: , =?UTF-8?q?Morten=20Br=C3=B8rup?= , Stephen Hemminger , =?UTF-8?q?Mattias=20R=C3=B6nnblom?= Subject: [RFC v3 6/6] eal: keep per-lcore power intrinsics state in lcore variable Date: Tue, 20 Feb 2024 09:49:08 +0100 Message-ID: <20240220084908.488252-7-mattias.ronnblom@ericsson.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240220084908.488252-1-mattias.ronnblom@ericsson.com> References: <20240219094036.485727-2-mattias.ronnblom@ericsson.com> <20240220084908.488252-1-mattias.ronnblom@ericsson.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AMS0EPF000001B7:EE_|GVXPR07MB10109:EE_ X-MS-Office365-Filtering-Correlation-Id: 21ab12c7-2051-4b53-af83-08dc31f1eaf5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: lPULQ4dcRyupeCQ1f8z+D4WmMqPz1QfIz2/ZDCnZwLRUWXkzISCPZy8dXcoQx8YbcE3hhUeDFo/Ma82TXlzDFUmB2TEbmjbrLTbok9wzsKqNBkf62LLVQZj72NfAyQZs+uHtUG/rcg0b/wk6lnAcsSMhAEKbZjStRmZYM3fAlGbs0MI9bp3Z+9IWHy8uZ/UEkFopsAY7E2tiRLc2XdbQd1DaCs5cS4i53k1XGLnoYSue+XeC9EG7cygyJ55KtWCwtcLBbUb8n3YI4B72QDIfFo7TjZtQjeHIaUH3wXMONQ9oQfKPqPjOrVnk0Vd4TMRQrqAa7+qXKuYxIbrul/uyJQZbJmIwQphLF9kPcNogHn3rxigyD6Ch2Qp6lRxI744QdxYKES7WtuXDr5tEvR2QbOGvQKqrkM85KiAOnKUgzPz7kxmj+VEXvBROjH91car2MSZ2rNyDDvTwgVbBgZp28M6OzaPSNHZDKzjlTcdoNE7fQGhwBDn9DD/KPWq9EZONJ0udYQUlwCYqL9ut2Qnn8xhIFi6CySyYjFGxyl5DKJUMqgV0IL2w9dA8VbYmiPzV+/zxfrchjdBDZm1EPxzPIMBFJH/B9bwuHjzgPb8cQWL0mEssxAoc9j2ZiWo/fA2iofG/NEqGQrMtk0IzkjUzXA== X-Forefront-Antispam-Report: CIP:192.176.1.74; CTRY:SE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:oa.msg.ericsson.com; PTR:office365.se.ericsson.net; CAT:NONE; SFS:(13230031)(36860700004)(46966006)(40470700004); DIR:OUT; SFP:1101; X-OriginatorOrg: ericsson.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Feb 2024 08:57:07.7991 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 21ab12c7-2051-4b53-af83-08dc31f1eaf5 X-MS-Exchange-CrossTenant-Id: 92e84ceb-fbfd-47ab-be52-080c6b87953f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=92e84ceb-fbfd-47ab-be52-080c6b87953f; Ip=[192.176.1.74]; Helo=[oa.msg.ericsson.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF000001B7.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR07MB10109 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Keep per-lcore power intrinsics state in a lcore variable to reduce cache working set size and avoid any CPU next-line-prefetching causing false sharing. Signed-off-by: Mattias Rönnblom --- lib/eal/x86/rte_power_intrinsics.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c index 532a2e646b..f4659af77e 100644 --- a/lib/eal/x86/rte_power_intrinsics.c +++ b/lib/eal/x86/rte_power_intrinsics.c @@ -4,6 +4,7 @@ #include #include +#include #include #include @@ -12,10 +13,14 @@ /* * Per-lcore structure holding current status of C0.2 sleeps. */ -static struct power_wait_status { +struct power_wait_status { rte_spinlock_t lock; volatile void *monitor_addr; /**< NULL if not currently sleeping */ -} __rte_cache_aligned wait_status[RTE_MAX_LCORE]; +}; + +RTE_LCORE_VAR_HANDLE(struct power_wait_status, wait_status); + +RTE_LCORE_VAR_INIT(wait_status); /* * This function uses UMONITOR/UMWAIT instructions and will enter C0.2 state. @@ -170,7 +175,7 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc, if (pmc->fn == NULL) return -EINVAL; - s = &wait_status[lcore_id]; + s = RTE_LCORE_VAR_LCORE_PTR(lcore_id, wait_status); /* update sleep address */ rte_spinlock_lock(&s->lock); @@ -262,7 +267,7 @@ rte_power_monitor_wakeup(const unsigned int lcore_id) if (lcore_id >= RTE_MAX_LCORE) return -EINVAL; - s = &wait_status[lcore_id]; + s = RTE_LCORE_VAR_LCORE_PTR(lcore_id, wait_status); /* * There is a race condition between sleep, wakeup and locking, but we @@ -301,8 +306,8 @@ int rte_power_monitor_multi(const struct rte_power_monitor_cond pmc[], const uint32_t num, const uint64_t tsc_timestamp) { - const unsigned int lcore_id = rte_lcore_id(); - struct power_wait_status *s = &wait_status[lcore_id]; + struct power_wait_status *s = RTE_LCORE_VAR_PTR(wait_status); + uint32_t i, rc; /* check if supported */ -- 2.34.1