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Mon, 26 Feb 2024 05:46:10 -0800 From: Michael Baum To: CC: Matan Azrad , Dariusz Sosnowski , Raslan Darawsheh , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH v3 3/7] common/mlx5: add inner PRM fields Date: Mon, 26 Feb 2024 15:45:52 +0200 Message-ID: <20240226134556.2985054-4-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240226134556.2985054-1-michaelba@nvidia.com> References: <20240207155533.1582031-1-michaelba@nvidia.com> <20240226134556.2985054-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003441:EE_|SJ2PR12MB9240:EE_ X-MS-Office365-Filtering-Correlation-Id: 7073f011-3187-4d5b-49d4-08dc36d1544c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: wkoc6KwFuUYJNOJru9658wRsuMQxm3g637kjiZ4+cqKIerWYT0tvi1GmQDPVrYW+pb2oDYPRY8GSnZUneox436rSvYK2LQ8J4JhdQr9EiKA+fYOEi8iR/xM+2ZU0dInE26LWboGRP7tZqHgA0PDMFCl+/RF5JRWe18wBF7nSEq6mqAIX4E4Mfc4IxOx7YniogVpZ2uVeUuYIzXPLPVLHDcer8yVMCfzrGd1vH5peHeQRLGpvGlLvnNKDMyXXp+UsGoOXc1nO3YcOgsJugsI9Q9q2tBoSXd+UselOAoSTdX1/XTTLMrskxsDq+ZOg3uxTGdH9xBBWOUBra86cyin0mvi2diN+3uyL5u8h5m8YN/6uJhnPjVj+XuFa3UddvA2/NSOSzJyNgUnLQxM3bwzMrG3WrHltimO709aGtvoFMJ79tYTcRs5PluDde1fglgS6PWns1bn60eg11Me7fkGVBBCokUvLoSlp4QzjWdxyXBKg0KzTdlK1RzONagBhhsL5g8D1i37Z+Jgc9IyLIFT7A9cfaARuy7SY7gZ3OULZQSINP7RdxPHIIQghv3lg2j3+lfwgl07dpTdYsAozJNgfovUPk1RYSrv0bZQuCx21zuJDxNjvnep8x+PHbTjyTMJkVLgBzn7wYo4F9kcUvFXQYqA+7lbon/IWkmlYs3TatxgAKveKHkxRNejkaT6etO7oae/k2Bb3n/LFXNN0of86jUa37CZUq8jj3e2jN2vYF0Z1Ot1FA7hXICbhNPlyJuEl X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2024 13:46:26.7618 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7073f011-3187-4d5b-49d4-08dc36d1544c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003441.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9240 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds inner values into PRM modify field list for each existing outer field. Signed-off-by: Michael Baum Acked-by: Dariusz Sosnowski --- drivers/common/mlx5/mlx5_prm.h | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 6967acbdc3..6124af1857 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -829,14 +829,17 @@ enum mlx5_modification_field { MLX5_MODI_OUT_TCP_SEQ_NUM, MLX5_MODI_IN_TCP_SEQ_NUM, MLX5_MODI_OUT_TCP_ACK_NUM, - MLX5_MODI_IN_TCP_ACK_NUM = 0x5C, + MLX5_MODI_IN_TCP_ACK_NUM, MLX5_MODI_OUT_ESP_SPI = 0x5E, + MLX5_MODI_IN_ESP_SPI, MLX5_MODI_GTP_TEID = 0x6E, MLX5_MODI_OUT_IP_ECN = 0x73, - MLX5_MODI_TUNNEL_HDR_DW_1 = 0x75, + MLX5_MODI_IN_IP_ECN, + MLX5_MODI_TUNNEL_HDR_DW_1, MLX5_MODI_GTPU_FIRST_EXT_DW_0, MLX5_MODI_HASH_RESULT = 0x81, MLX5_MODI_OUT_ESP_SEQ_NUM, + MLX5_MODI_IN_ESP_SEQ_NUM, MLX5_MODI_IN_MPLS_LABEL_0 = 0x8a, MLX5_MODI_IN_MPLS_LABEL_1, MLX5_MODI_IN_MPLS_LABEL_2, @@ -855,7 +858,12 @@ enum mlx5_modification_field { MLX5_MODI_OUT_IPV6_PAYLOAD_LEN, MLX5_MODI_OUT_IPV4_IHL, MLX5_MODI_OUT_TCP_DATA_OFFSET, - MLX5_MODI_OUT_IPSEC_NEXT_HDR = 0x126, + MLX5_MODI_IN_IPV6_TRAFFIC_CLASS, + MLX5_MODI_IN_IPV4_TOTAL_LEN, + MLX5_MODI_IN_IPV6_PAYLOAD_LEN, + MLX5_MODI_IN_IPV4_IHL, + MLX5_MODI_IN_TCP_DATA_OFFSET, + MLX5_MODI_OUT_IPSEC_NEXT_HDR, MLX5_MODI_INVALID = INT_MAX, }; -- 2.25.1