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Mon, 26 Feb 2024 05:46:17 -0800 From: Michael Baum To: CC: Matan Azrad , Dariusz Sosnowski , Raslan Darawsheh , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH v3 6/7] net/mlx5: support modify IPv6 traffic class field Date: Mon, 26 Feb 2024 15:45:55 +0200 Message-ID: <20240226134556.2985054-7-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240226134556.2985054-1-michaelba@nvidia.com> References: <20240207155533.1582031-1-michaelba@nvidia.com> <20240226134556.2985054-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003442:EE_|SJ0PR12MB6783:EE_ X-MS-Office365-Filtering-Correlation-Id: 72be001e-ac2f-48e1-3438-08dc36d15ab3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tmJiwM4ksYAxc8toEOtWU8zx5SgZb+iT3g613W1pL+Lb4DFxoeQthHOPdmWSXhf/c9f4xm+jhbTW1krVknv/9s2o3/TtIo4UxWdWFil8AL0PgI4kIEpKcpw0PIVfajUF2F1MNJF9lnVpXgJAmP8t/OWRc+kmiLg83sqTIpWo3BweRshuBCwlz5HvXeJ2/WBbITvlkzmisAALOlvucKASqjPYhRqNJUqFixApZgnm0UrgQTfWQekzeqM3lwqhJqHT96qABvE69quqVhGQLBXPuyPuzOlz36fNhdLjKy0VBrfrRTNM7w5yY+Ah40zuLECYUMzT1lmbTQuqZIezvlxtLhG7HG+PHPxZvEQMStsXQu8aYsYanO9GIcESsJl+NffXcYUmRn+U8AiYq5Fbl906sHYWhNsblZAeDOvk1bhNF9XsmdqYdcDYau8u+mLcY2F9Qx2O1teQXE/EsV30FTZOlwAfWiISePr3g1wcff1c0Q5WUauI4T+U6C+7iuiEaESIb+Zrg0Dn9Wendjk+aYtSonRpNj8pFOMCleMGGztTWUTQi6aMzoKRJnmfFQA6MglcBsI8rpvvvIUj8pp7UNFv2+JONutNHIqSMduON2bGs/7awmEgWtbF3RQ1yXpCAfqJvFamP2lOhP6jswgKe6DQe9KWdSEoF6BJ7HfY1mM2kzXVCzB8qQmowni5gynv3P04NABCEEEsrgAfQzLQ5okwvAO0T5Bpa8SlHNQ3z5d9W0LSTUmz93PjKzEDvkxirZXX X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2024 13:46:37.5026 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 72be001e-ac2f-48e1-3438-08dc36d15ab3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003442.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6783 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add HW steering support for IPv6 traffic class field modification. Copy from inner IPv6 traffic class field is also supported using "level=2". Signed-off-by: Michael Baum Acked-by: Dariusz Sosnowski --- doc/guides/rel_notes/release_24_03.rst | 1 + drivers/net/mlx5/mlx5_flow_dv.c | 11 +++++++++++ drivers/net/mlx5/mlx5_flow_hw.c | 3 ++- 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index 0473858e19..c2fc22ed66 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -127,6 +127,7 @@ New Features * Added support for GENEVE matching and modifying in HWS flow engine. * Added support for modifying IPv4 proto field in HWS flow engine. * Added support for modifying IPsec ESP fields in HWS flow engine. + * Added support for modifying IPv6 traffic class field in HWS flow engine. * Added support for matching a random value. * Added support for comparing result between packet fields or value. * Added support for accumulating value of field into another one. diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index feda003c07..2c0c8e37f7 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1394,6 +1394,7 @@ mlx5_flow_item_field_width(struct rte_eth_dev *dev, return 32; case RTE_FLOW_FIELD_IPV6_DSCP: return 6; + case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS: case RTE_FLOW_FIELD_IPV6_HOPLIMIT: case RTE_FLOW_FIELD_IPV6_PROTO: return 8; @@ -1795,6 +1796,16 @@ mlx5_flow_field_id_to_modify_info else info[idx].offset = off_be; break; + case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS: + MLX5_ASSERT(data->offset + width <= 8); + off_be = 8 - (data->offset + width); + modi_id = CALC_MODI_ID(IPV6_TRAFFIC_CLASS, data->level); + info[idx] = (struct field_modify_info){1, 0, modi_id}; + if (mask) + mask[idx] = flow_modify_info_mask_8(width, off_be); + else + info[idx].offset = off_be; + break; case RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN: MLX5_ASSERT(data->offset + width <= 16); off_be = 16 - (data->offset + width); diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index fc1bcdd84e..9d4fdb06c1 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -2878,7 +2878,7 @@ flow_hw_modify_field_construct(struct mlx5_hw_q_job *job, * bits left. Shift the data left for IPv6 DSCP */ if (field->id == MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS && - !(mask & MLX5_IPV6_HDR_ECN_MASK)) + mhdr_action->dst.field == RTE_FLOW_FIELD_IPV6_DSCP) data <<= MLX5_IPV6_HDR_DSCP_SHIFT; data = (data & mask) >> off_b; job->mhdr_cmd[i++].data1 = rte_cpu_to_be_32(data); @@ -5067,6 +5067,7 @@ flow_hw_validate_modify_field_level(const struct rte_flow_field_data *data, case RTE_FLOW_FIELD_IPV4_TTL: case RTE_FLOW_FIELD_IPV4_SRC: case RTE_FLOW_FIELD_IPV4_DST: + case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS: case RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN: case RTE_FLOW_FIELD_IPV6_HOPLIMIT: case RTE_FLOW_FIELD_IPV6_SRC: -- 2.25.1