From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3B0D443C06; Tue, 27 Feb 2024 20:08:54 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C4D3740279; Tue, 27 Feb 2024 20:08:53 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id BDD4340150 for ; Tue, 27 Feb 2024 20:08:51 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41RFh1TC005683; Tue, 27 Feb 2024 11:08:51 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=m8eqxVaz/wm7al2DrY2rg3IzDuOZWgOgGYblqwZNfJI=; b=jxy Dz0DJ5j/IOIW5gmhYaJh2axxAH58DeQ0n31xusA6915VsqUf1UYl/gs7PCeLe00p rWXFA5IqwvPIXaPUQsufDxxooQYeP7j87x2u5H7aBlhD0Oz/uUATR0BLnQGseGBW nTCpA7OwmwvqD0ouExzollhbyex4fK3NIqCWCFQhJQumiij6Fow1QvqdvTf30W5J kFTIMTB9v5TWHro5+7B0prceyndb2g+8cC20mVyLdhEx8zl5GF6rDLpqkIQSeOBw IUWlDmAd1OYpdajLU7TgOHCBfQeN8glJ6CLyQ3YGvUwiLkSeL79Z8N46vNnEcpjX hhUdXjcBhHTe09Y7Xgw== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3whjm693t2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Feb 2024 11:08:50 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.1258.12; Tue, 27 Feb 2024 11:08:49 -0800 Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 27 Feb 2024 11:08:49 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Tue, 27 Feb 2024 11:08:49 -0800 Received: from cavium-OptiPlex-5090-BM14.. (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 65F1E3F7095; Tue, 27 Feb 2024 10:38:14 -0800 (PST) From: Amit Prakash Shukla To: Cheng Jiang , Chengwen Feng CC: , , , Kevin Laatz , Bruce Richardson , "Pavan Nikhilesh" , Gowrishankar Muthukrishnan , Amit Prakash Shukla Subject: [PATCH v10 2/4] app/dma-perf: add PCI device support Date: Wed, 28 Feb 2024 00:05:53 +0530 Message-ID: <20240227183555.3932711-3-amitprakashs@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240227183555.3932711-1-amitprakashs@marvell.com> References: <20240227160031.3931694-1-amitprakashs@marvell.com> <20240227183555.3932711-1-amitprakashs@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: u-iRx1TlnyfWsn4jcOKYIkGavzoY8b0j X-Proofpoint-GUID: u-iRx1TlnyfWsn4jcOKYIkGavzoY8b0j X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-27_06,2024-02-27_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support to test performance for "device to memory" and "memory to device" data transfer. Signed-off-by: Amit Prakash Shukla Acked-by: Anoob Joseph Acked-by: Chengwen Feng --- v10: - PCI config parsing using kvargs. app/test-dma-perf/benchmark.c | 117 ++++++++++++++++++++++++++++++---- app/test-dma-perf/config.ini | 33 ++++++++++ app/test-dma-perf/main.c | 77 ++++++++++++++++++++++ app/test-dma-perf/main.h | 7 ++ 4 files changed, 222 insertions(+), 12 deletions(-) diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c index 9b1f58c78c..4370d71134 100644 --- a/app/test-dma-perf/benchmark.c +++ b/app/test-dma-perf/benchmark.c @@ -127,17 +127,54 @@ cache_flush_buf(__rte_unused struct rte_mbuf **array, #endif } +static int +vchan_data_populate(uint32_t dev_id, struct rte_dma_vchan_conf *qconf, + struct test_configure *cfg) +{ + struct rte_dma_info info; + + qconf->direction = cfg->transfer_dir; + + rte_dma_info_get(dev_id, &info); + if (!(RTE_BIT64(qconf->direction) & info.dev_capa)) + return -1; + + qconf->nb_desc = cfg->ring_size.cur; + + switch (qconf->direction) { + case RTE_DMA_DIR_MEM_TO_DEV: + qconf->dst_port.pcie.vfen = 1; + qconf->dst_port.port_type = RTE_DMA_PORT_PCIE; + qconf->dst_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid; + qconf->dst_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid; + qconf->dst_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid; + break; + case RTE_DMA_DIR_DEV_TO_MEM: + qconf->src_port.pcie.vfen = 1; + qconf->src_port.port_type = RTE_DMA_PORT_PCIE; + qconf->src_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid; + qconf->src_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid; + qconf->src_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid; + break; + case RTE_DMA_DIR_MEM_TO_MEM: + case RTE_DMA_DIR_DEV_TO_DEV: + break; + } + + return 0; +} + /* Configuration of device. */ static void -configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size) +configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg) { uint16_t vchan = 0; struct rte_dma_info info; struct rte_dma_conf dev_config = { .nb_vchans = 1 }; - struct rte_dma_vchan_conf qconf = { - .direction = RTE_DMA_DIR_MEM_TO_MEM, - .nb_desc = ring_size - }; + struct rte_dma_vchan_conf qconf = { 0 }; + + if (vchan_data_populate(dev_id, &qconf, cfg) != 0) + rte_exit(EXIT_FAILURE, "Error with vchan data populate.\n"); if (rte_dma_configure(dev_id, &dev_config) != 0) rte_exit(EXIT_FAILURE, "Error with dma configure.\n"); @@ -159,7 +196,6 @@ configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size) static int config_dmadevs(struct test_configure *cfg) { - uint32_t ring_size = cfg->ring_size.cur; struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map; uint32_t nb_workers = ldm->cnt; uint32_t i; @@ -176,7 +212,7 @@ config_dmadevs(struct test_configure *cfg) } ldm->dma_ids[i] = dev_id; - configure_dmadev_queue(dev_id, ring_size); + configure_dmadev_queue(dev_id, cfg); ++nb_dmadevs; } @@ -302,13 +338,23 @@ do_cpu_mem_copy(void *p) return 0; } +static void +dummy_free_ext_buf(void *addr, void *opaque) +{ + RTE_SET_USED(addr); + RTE_SET_USED(opaque); +} + static int setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, struct rte_mbuf ***dsts) { - unsigned int buf_size = cfg->buf_size.cur; + static struct rte_mbuf_ext_shared_info *ext_buf_info; + unsigned int cur_buf_size = cfg->buf_size.cur; + unsigned int buf_size = cur_buf_size + RTE_PKTMBUF_HEADROOM; unsigned int nr_sockets; uint32_t nr_buf = cfg->nr_buf; + uint32_t i; nr_sockets = rte_socket_count(); if (cfg->src_numa_node >= nr_sockets || @@ -321,7 +367,7 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, nr_buf, 0, 0, - buf_size + RTE_PKTMBUF_HEADROOM, + buf_size, cfg->src_numa_node); if (src_pool == NULL) { PRINT_ERR("Error with source mempool creation.\n"); @@ -332,7 +378,7 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, nr_buf, 0, 0, - buf_size + RTE_PKTMBUF_HEADROOM, + buf_size, cfg->dst_numa_node); if (dst_pool == NULL) { PRINT_ERR("Error with destination mempool creation.\n"); @@ -361,16 +407,49 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, return -1; } + if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM || + cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) { + ext_buf_info = rte_malloc(NULL, sizeof(struct rte_mbuf_ext_shared_info), 0); + if (ext_buf_info == NULL) { + printf("Error: ext_buf_info malloc failed.\n"); + return -1; + } + } + + if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) { + ext_buf_info->free_cb = dummy_free_ext_buf; + ext_buf_info->fcb_opaque = NULL; + for (i = 0; i < nr_buf; i++) { + /* Using mbuf structure to hold remote iova address. */ + rte_pktmbuf_attach_extbuf((*srcs)[i], (void *)(cfg->vchan_dev.raddr + + (i * buf_size)), (rte_iova_t)(cfg->vchan_dev.raddr + + (i * buf_size)), 0, ext_buf_info); + rte_mbuf_ext_refcnt_update(ext_buf_info, 1); + } + } + + if (cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) { + ext_buf_info->free_cb = dummy_free_ext_buf; + ext_buf_info->fcb_opaque = NULL; + for (i = 0; i < nr_buf; i++) { + /* Using mbuf structure to hold remote iova address. */ + rte_pktmbuf_attach_extbuf((*dsts)[i], (void *)(cfg->vchan_dev.raddr + + (i * buf_size)), (rte_iova_t)(cfg->vchan_dev.raddr + + (i * buf_size)), 0, ext_buf_info); + rte_mbuf_ext_refcnt_update(ext_buf_info, 1); + } + } + return 0; } void mem_copy_benchmark(struct test_configure *cfg, bool is_dma) { - uint16_t i; + uint32_t i; uint32_t offset; unsigned int lcore_id = 0; - struct rte_mbuf **srcs = NULL, **dsts = NULL; + struct rte_mbuf **srcs = NULL, **dsts = NULL, **m = NULL; struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map; unsigned int buf_size = cfg->buf_size.cur; uint16_t kick_batch = cfg->kick_batch.cur; @@ -476,6 +555,20 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) avg_cycles_total / nb_workers, bandwidth_total, mops_total); out: + + if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) + m = srcs; + else if (cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) + m = dsts; + + if (m) { + for (i = 0; i < nr_buf; i++) + rte_pktmbuf_detach_extbuf(m[i]); + + if (m[0]->shinfo && rte_mbuf_ext_refcnt_read(m[0]->shinfo) == 0) + rte_free(m[0]->shinfo); + } + /* free mbufs used in the test */ if (srcs != NULL) rte_pktmbuf_free_bulk(srcs, nr_buf); diff --git a/app/test-dma-perf/config.ini b/app/test-dma-perf/config.ini index 4d59234b2a..9c8221025e 100644 --- a/app/test-dma-perf/config.ini +++ b/app/test-dma-perf/config.ini @@ -38,6 +38,23 @@ ; "skip" To skip a test-case set skip to 1. +; Parameters to be configured for data transfers from "mem to dev" and "dev to mem": +; ================================================================================== +; "direction" denotes the direction of data transfer. It can take 3 values: +; mem2mem - mem to mem transfer +; mem2dev - mem to dev transfer +; dev2mem - dev to mem transfer +; If not specified the default value is mem2mem transfer. + +; "vchan_dev comma separated bus related config parameter for mem2dev and dev2mem dma transfer. Ex:" +; vchan_dev=raddr=0x400000,coreid=1,pfid=2,vfid=3 +; "raddr" remote iova address for mem2dev and dev2mem transfer. +; "coreid" denotes PCIe core index. +; "pfid" denotes PF-id to be used for data transfer +; "vfid" denotes VF-id of PF-id to be used for data transfer. + +; =========== End of "mem2dev" and "dev2mem" config parameters. ============== + [case1] type=DMA_MEM_COPY mem_size=10 @@ -52,6 +69,22 @@ lcore_dma=lcore10@0000:00:04.2, lcore11@0000:00:04.3 eal_args=--in-memory --file-prefix=test [case2] +skip=1 +type=DMA_MEM_COPY +direction=dev2mem +vchan_dev=raddr=0x200000000,coreid=1,pfid=2,vfid=3 +mem_size=10 +buf_size=64,4096,2,MUL +dma_ring_size=1024 +kick_batch=32 +src_numa_node=0 +dst_numa_node=0 +cache_flush=0 +test_seconds=2 +lcore_dma=lcore10@0000:00:04.2, lcore11@0000:00:04.3 +eal_args=--in-memory --file-prefix=test + +[case3] type=CPU_MEM_COPY mem_size=10 buf_size=64,8192,2,MUL diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c index e9e40e72e7..051f76a6f9 100644 --- a/app/test-dma-perf/main.c +++ b/app/test-dma-perf/main.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include "main.h" @@ -325,6 +327,28 @@ parse_entry(const char *value, struct test_configure_entry *entry) return args_nr; } +static int populate_pcie_config(const char *key, const char *value, void *test) +{ + struct test_configure *test_case = (struct test_configure *)test; + char *endptr; + int ret = 0; + + if (strcmp(key, "raddr") == 0) + test_case->vchan_dev.raddr = strtoull(value, &endptr, 16); + else if (strcmp(key, "coreid") == 0) + test_case->vchan_dev.port.pcie.coreid = (uint8_t)atoi(value); + else if (strcmp(key, "vfid") == 0) + test_case->vchan_dev.port.pcie.vfid = (uint16_t)atoi(value); + else if (strcmp(key, "pfid") == 0) + test_case->vchan_dev.port.pcie.pfid = (uint16_t)atoi(value); + else { + printf("Invalid config param: %s\n", key); + ret = -1; + } + + return ret; +} + static uint16_t load_configs(const char *path) { @@ -333,9 +357,12 @@ load_configs(const char *path) struct test_configure *test_case; char section_name[CFG_NAME_LEN]; const char *case_type; + const char *transfer_dir; const char *lcore_dma; const char *mem_size_str, *buf_size_str, *ring_size_str, *kick_batch_str; const char *skip; + struct rte_kvargs *kvlist; + const char *vchan_dev; int args_nr, nb_vp; bool is_dma; @@ -373,6 +400,22 @@ load_configs(const char *path) if (strcmp(case_type, DMA_MEM_COPY) == 0) { test_case->test_type = TEST_TYPE_DMA_MEM_COPY; test_case->test_type_str = DMA_MEM_COPY; + + transfer_dir = rte_cfgfile_get_entry(cfgfile, section_name, "direction"); + if (transfer_dir == NULL) { + printf("Transfer direction not configured." + " Defaulting it to MEM to MEM transfer.\n"); + test_case->transfer_dir = RTE_DMA_DIR_MEM_TO_MEM; + } else { + if (strcmp(transfer_dir, "mem2dev") == 0) + test_case->transfer_dir = RTE_DMA_DIR_MEM_TO_DEV; + else if (strcmp(transfer_dir, "dev2mem") == 0) + test_case->transfer_dir = RTE_DMA_DIR_DEV_TO_MEM; + else { + printf("Defaulting the test to MEM to MEM transfer\n"); + test_case->transfer_dir = RTE_DMA_DIR_MEM_TO_MEM; + } + } is_dma = true; } else if (strcmp(case_type, CPU_MEM_COPY) == 0) { test_case->test_type = TEST_TYPE_CPU_MEM_COPY; @@ -384,6 +427,40 @@ load_configs(const char *path) continue; } + if (test_case->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV || + test_case->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) { + vchan_dev = rte_cfgfile_get_entry(cfgfile, section_name, "vchan_dev"); + if (vchan_dev == NULL) { + printf("Transfer direction mem2dev and dev2mem" + " vhcan_dev shall be configured.\n"); + test_case->is_valid = false; + continue; + } + + kvlist = rte_kvargs_parse(vchan_dev, NULL); + if (kvlist == NULL) { + printf("rte_kvargs_parse() error"); + test_case->is_valid = false; + continue; + } + + if (rte_kvargs_process(kvlist, NULL, populate_pcie_config, + (void *)test_case) < 0) { + printf("rte_kvargs_process() error\n"); + rte_kvargs_free(kvlist); + test_case->is_valid = false; + continue; + } + + if (!test_case->vchan_dev.raddr) { + printf("For mem2dev and dev2mem configure raddr\n"); + rte_kvargs_free(kvlist); + test_case->is_valid = false; + continue; + } + rte_kvargs_free(kvlist); + } + test_case->src_numa_node = (int)atoi(rte_cfgfile_get_entry(cfgfile, section_name, "src_numa_node")); test_case->dst_numa_node = (int)atoi(rte_cfgfile_get_entry(cfgfile, diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h index 32670151af..745c24b7fe 100644 --- a/app/test-dma-perf/main.h +++ b/app/test-dma-perf/main.h @@ -38,10 +38,16 @@ struct lcore_dma_map_t { uint16_t cnt; }; +struct test_vchan_dev_config { + struct rte_dma_port_param port; + uintptr_t raddr; +}; + struct test_configure { bool is_valid; bool is_skip; uint8_t test_type; + uint8_t transfer_dir; const char *test_type_str; uint16_t src_numa_node; uint16_t dst_numa_node; @@ -57,6 +63,7 @@ struct test_configure { uint16_t test_secs; const char *eal_args; uint8_t scenario_id; + struct test_vchan_dev_config vchan_dev; }; void mem_copy_benchmark(struct test_configure *cfg, bool is_dma); -- 2.34.1