From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1156543C38; Tue, 5 Mar 2024 14:13:01 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CE77C40270; Tue, 5 Mar 2024 14:13:00 +0100 (CET) Received: from fout3-smtp.messagingengine.com (fout3-smtp.messagingengine.com [103.168.172.146]) by mails.dpdk.org (Postfix) with ESMTP id 2928E4026B for ; Tue, 5 Mar 2024 14:12:59 +0100 (CET) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfout.nyi.internal (Postfix) with ESMTP id B467113800DD; Tue, 5 Mar 2024 08:12:58 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Tue, 05 Mar 2024 08:12:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:message-id:mime-version:reply-to:subject:subject:to :to; s=fm1; t=1709644378; x=1709730778; bh=Rx8Z7dkuJ4MhTaL44/Pev 93HhTRY6tEQ6tVtPiVCM0A=; b=pQTXv2g6IijgCEK7etaquwwaIUIBtpB2a5Xdc Vbq0ZRe3JYVynnkpKAluMYJGUaDO56ywBGOg/x4kiAv6/HSbbQnaH8M+5glLZjO6 dXLUNdr+WeGVLQ5vt9uWSUlj+4xDW5TKf4AR0mvftHsLffqdmHeOGqiDptbcv6g9 NK/+y4D5dhpUUAmpWvqTX/qZpRWHtRlkPbmU+VQ0H0EbMpLMF8q635B1KNNN8GH0 /Sr7Z/o9Q8wwJIQZpFuNxpQmQQAGhSvfgzdWYyN7xW1vj9Ry6LW5FKV6msPlcyVJ U1WbawHiwZp2cTKcWCCbdcuPluJEHqVcRqxAXzaV2ITLTeQzg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:message-id:mime-version:reply-to:subject:subject:to :to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; t=1709644378; x=1709730778; bh=Rx8Z7dkuJ4MhTaL44/Pev93HhTRY 6tEQ6tVtPiVCM0A=; b=k5NjIjsodIOTHsWj7oCz3P0qoDEhK+N58r5vLf9Q8euN AYg+1VtJV/MSyc877zIZ2ta5bA8xo5uuat8miwe1ku9EZ8EWocHeF3oUMky6bgBU O17gbyLNWSHSA2xriHN66R6B+cCjKgJ1CyxSB2kIK18Bw3guXmuBWdAthxb+dLQv dAg4fpclFZ1WAl0AZ8DlRcrBiYJ8E1kPSOXDk+5hHrYa7lc5YOVhTJfidi5uXI3h 2RH3gujIzg17rr2zrt9rBYJ369lpRrI/kXx57gPII/Em1IEXJ5TkbW+0Gum8oHGN SHcW9w6Ue/Rl4NscriCdIxXFO2ES4nQHeAFzWB+fqg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrheelgdeghecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvfevufffkffoggfgsedtkeertdertddtnecuhfhrohhmpefvhhhomhgrshcu ofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecuggftrf grthhtvghrnhepveevfeevieeihfetudekgeekleeigeffueekveduteeuffeiudevteei udekfeelnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomh epthhhohhmrghssehmohhnjhgrlhhonhdrnhgvth X-ME-Proxy: Feedback-ID: i47234305:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 5 Mar 2024 08:12:57 -0500 (EST) From: Thomas Monjalon To: dev@dpdk.org Cc: Dariusz Sosnowski , Viacheslav Ovsiienko , Ori Kam , Suanming Mou , Matan Azrad Subject: [PATCH 1/2] net/mlx5: update speed capabilities parsing on Linux Date: Tue, 5 Mar 2024 14:12:40 +0100 Message-ID: <20240305131241.3132128-1-thomas@monjalon.net> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Ease maintenance of speed capabilities parsing from ethtool by using rte_eth_link_speed_g*(). Functions in ethdev library are simpler, more complete, and easier to maintain. Signed-off-by: Thomas Monjalon --- drivers/common/mlx5/linux/meson.build | 22 ---- drivers/net/mlx5/linux/mlx5_ethdev_os.c | 150 ++---------------------- 2 files changed, 7 insertions(+), 165 deletions(-) diff --git a/drivers/common/mlx5/linux/meson.build b/drivers/common/mlx5/linux/meson.build index b3a64547c5..cdee40c553 100644 --- a/drivers/common/mlx5/linux/meson.build +++ b/drivers/common/mlx5/linux/meson.build @@ -146,28 +146,6 @@ has_sym_args = [ 'MLX5_OPCODE_WAIT' ], [ 'HAVE_MLX5_OPCODE_ACCESS_ASO', 'infiniband/mlx5dv.h', 'MLX5_OPCODE_ACCESS_ASO' ], - [ 'HAVE_SUPPORTED_40000baseKR4_Full', 'linux/ethtool.h', - 'SUPPORTED_40000baseKR4_Full' ], - [ 'HAVE_SUPPORTED_40000baseCR4_Full', 'linux/ethtool.h', - 'SUPPORTED_40000baseCR4_Full' ], - [ 'HAVE_SUPPORTED_40000baseSR4_Full', 'linux/ethtool.h', - 'SUPPORTED_40000baseSR4_Full' ], - [ 'HAVE_SUPPORTED_40000baseLR4_Full', 'linux/ethtool.h', - 'SUPPORTED_40000baseLR4_Full' ], - [ 'HAVE_SUPPORTED_56000baseKR4_Full', 'linux/ethtool.h', - 'SUPPORTED_56000baseKR4_Full' ], - [ 'HAVE_SUPPORTED_56000baseCR4_Full', 'linux/ethtool.h', - 'SUPPORTED_56000baseCR4_Full' ], - [ 'HAVE_SUPPORTED_56000baseSR4_Full', 'linux/ethtool.h', - 'SUPPORTED_56000baseSR4_Full' ], - [ 'HAVE_SUPPORTED_56000baseLR4_Full', 'linux/ethtool.h', - 'SUPPORTED_56000baseLR4_Full' ], - [ 'HAVE_ETHTOOL_LINK_MODE_25G', 'linux/ethtool.h', - 'ETHTOOL_LINK_MODE_25000baseCR_Full_BIT' ], - [ 'HAVE_ETHTOOL_LINK_MODE_50G', 'linux/ethtool.h', - 'ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT' ], - [ 'HAVE_ETHTOOL_LINK_MODE_100G', 'linux/ethtool.h', - 'ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT' ], [ 'HAVE_IFLA_NUM_VF', 'linux/if_link.h', 'IFLA_NUM_VF' ], [ 'HAVE_IFLA_EXT_MASK', 'linux/if_link.h', diff --git a/drivers/net/mlx5/linux/mlx5_ethdev_os.c b/drivers/net/mlx5/linux/mlx5_ethdev_os.c index dd5a0c546d..25e6bbd694 100644 --- a/drivers/net/mlx5/linux/mlx5_ethdev_os.c +++ b/drivers/net/mlx5/linux/mlx5_ethdev_os.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -45,91 +46,6 @@ #include "mlx5_rxtx.h" #include "mlx5_utils.h" -/* Supported speed values found in /usr/include/linux/ethtool.h */ -#ifndef HAVE_SUPPORTED_40000baseKR4_Full -#define SUPPORTED_40000baseKR4_Full (1 << 23) -#endif -#ifndef HAVE_SUPPORTED_40000baseCR4_Full -#define SUPPORTED_40000baseCR4_Full (1 << 24) -#endif -#ifndef HAVE_SUPPORTED_40000baseSR4_Full -#define SUPPORTED_40000baseSR4_Full (1 << 25) -#endif -#ifndef HAVE_SUPPORTED_40000baseLR4_Full -#define SUPPORTED_40000baseLR4_Full (1 << 26) -#endif -#ifndef HAVE_SUPPORTED_56000baseKR4_Full -#define SUPPORTED_56000baseKR4_Full (1 << 27) -#endif -#ifndef HAVE_SUPPORTED_56000baseCR4_Full -#define SUPPORTED_56000baseCR4_Full (1 << 28) -#endif -#ifndef HAVE_SUPPORTED_56000baseSR4_Full -#define SUPPORTED_56000baseSR4_Full (1 << 29) -#endif -#ifndef HAVE_SUPPORTED_56000baseLR4_Full -#define SUPPORTED_56000baseLR4_Full (1 << 30) -#endif - -/* Add defines in case the running kernel is not the same as user headers. */ -#ifndef ETHTOOL_GLINKSETTINGS -struct ethtool_link_settings { - uint32_t cmd; - uint32_t speed; - uint8_t duplex; - uint8_t port; - uint8_t phy_address; - uint8_t autoneg; - uint8_t mdio_support; - uint8_t eth_to_mdix; - uint8_t eth_tp_mdix_ctrl; - int8_t link_mode_masks_nwords; - uint32_t reserved[8]; - uint32_t link_mode_masks[]; -}; - -/* The kernel values can be found in /include/uapi/linux/ethtool.h */ -#define ETHTOOL_GLINKSETTINGS 0x0000004c -#define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5 -#define ETHTOOL_LINK_MODE_Autoneg_BIT 6 -#define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17 -#define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18 -#define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19 -#define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20 -#define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21 -#define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22 -#define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23 -#define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24 -#define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25 -#define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26 -#define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27 -#define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28 -#define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29 -#define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30 -#endif -#ifndef HAVE_ETHTOOL_LINK_MODE_25G -#define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31 -#define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32 -#define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33 -#endif -#ifndef HAVE_ETHTOOL_LINK_MODE_50G -#define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34 -#define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35 -#endif -#ifndef HAVE_ETHTOOL_LINK_MODE_100G -#define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36 -#define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37 -#define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38 -#define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39 -#endif -#ifndef HAVE_ETHTOOL_LINK_MODE_200G -#define ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT 62 -#define ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT 63 -#define ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT 0 /* 64 - 64 */ -#define ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT 1 /* 65 - 64 */ -#define ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT 2 /* 66 - 64 */ -#endif - /* Get interface index from SubFunction device name. */ int mlx5_auxiliary_get_ifindex(const char *sf_name) @@ -444,22 +360,12 @@ mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev, dev_link.link_speed = RTE_ETH_SPEED_NUM_UNKNOWN; else dev_link.link_speed = link_speed; - priv->link_speed_capa = 0; - if (edata.supported & (SUPPORTED_1000baseT_Full | - SUPPORTED_1000baseKX_Full)) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_1G; - if (edata.supported & SUPPORTED_10000baseKR_Full) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_10G; - if (edata.supported & (SUPPORTED_40000baseKR4_Full | - SUPPORTED_40000baseCR4_Full | - SUPPORTED_40000baseSR4_Full | - SUPPORTED_40000baseLR4_Full)) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_40G; dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ? RTE_ETH_LINK_HALF_DUPLEX : RTE_ETH_LINK_FULL_DUPLEX); dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & RTE_ETH_LINK_SPEED_FIXED); *link = dev_link; + priv->link_speed_capa = rte_eth_link_speed_gset(edata.supported); return 0; } @@ -484,7 +390,6 @@ mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev, struct ifreq ifr; struct rte_eth_link dev_link; struct rte_eth_dev *master = NULL; - uint64_t sc; int ret; ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr); @@ -546,59 +451,18 @@ mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev, dev->data->port_id, strerror(rte_errno)); return ret; } + dev_link.link_speed = (ecmd->speed == UINT32_MAX) ? RTE_ETH_SPEED_NUM_UNKNOWN : ecmd->speed; - sc = ecmd->link_mode_masks[0] | - ((uint64_t)ecmd->link_mode_masks[1] << 32); - priv->link_speed_capa = 0; - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_1G; - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_10G; - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_20G; - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_40G; - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_56G; - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_25G; - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_50G; - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_100G; - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_200G; - - sc = ecmd->link_mode_masks[2] | - ((uint64_t)ecmd->link_mode_masks[3] << 32); - if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT) | - MLX5_BITSHIFT - (ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT) | - MLX5_BITSHIFT(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT))) - priv->link_speed_capa |= RTE_ETH_LINK_SPEED_200G; dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ? RTE_ETH_LINK_HALF_DUPLEX : RTE_ETH_LINK_FULL_DUPLEX); dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & RTE_ETH_LINK_SPEED_FIXED); *link = dev_link; + + priv->link_speed_capa = rte_eth_link_speed_glink(ecmd->link_mode_masks, + ecmd->link_mode_masks_nwords); + return 0; } -- 2.43.0