From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A40A543C94; Tue, 12 Mar 2024 19:09:37 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DAAC342E61; Tue, 12 Mar 2024 19:08:19 +0100 (CET) Received: from smtp-fw-52005.amazon.com (smtp-fw-52005.amazon.com [52.119.213.156]) by mails.dpdk.org (Postfix) with ESMTP id 244D742E60 for ; Tue, 12 Mar 2024 19:08:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1710266892; x=1741802892; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=wglF1FOUVFVsi3SN5vF/fcXUTnQk3TUXxuchcU4t1Jc=; b=CUkUl4qrQOfkYQVw6GOfGHnl8bKxytQVQaYZ3BKw3BMVAKBDjM2qt885 T+JMUvogU+ErWpcud3qlsHyazNIzKkAg+tKLHOXpSndHSA2XG9zfqD7ym w28tqdk5lEf2yBQed1lZYhPZKYONi7HBZZmHiKuuNQHruGJc8TGN+ZTml M=; X-IronPort-AV: E=Sophos;i="6.07,119,1708387200"; d="scan'208";a="640378436" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-52005.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2024 18:08:10 +0000 Received: from EX19MTAEUC002.ant.amazon.com [10.0.10.100:40347] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.41.28:2525] with esmtp (Farcaster) id d9c411ad-2a2d-4ad2-b44c-46abbee2fe26; Tue, 12 Mar 2024 18:08:08 +0000 (UTC) X-Farcaster-Flow-ID: d9c411ad-2a2d-4ad2-b44c-46abbee2fe26 Received: from EX19D007EUB002.ant.amazon.com (10.252.51.117) by EX19MTAEUC002.ant.amazon.com (10.252.51.245) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Tue, 12 Mar 2024 18:08:08 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB002.ant.amazon.com (10.252.51.117) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Tue, 12 Mar 2024 18:08:08 +0000 Received: from HFA15-CG15235BS.amazon.com (10.85.143.174) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Tue, 12 Mar 2024 18:08:06 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v4 20/31] net/ena/base: rework Rx ring submission queue Date: Tue, 12 Mar 2024 20:07:05 +0200 Message-ID: <20240312180716.8515-21-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240312180716.8515-1-shaibran@amazon.com> References: <20240312180716.8515-1-shaibran@amazon.com> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes RX ring submission queue descriptors are always located in host memory This optimization replaces the generic update tail method with a tailored method for host memory type descriptors to avoid unnecessary if statement. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/base/ena_eth_com.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/net/ena/base/ena_eth_com.c b/drivers/net/ena/base/ena_eth_com.c index f672df1001..ce25e60ac4 100644 --- a/drivers/net/ena/base/ena_eth_com.c +++ b/drivers/net/ena/base/ena_eth_com.c @@ -209,11 +209,8 @@ static int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq) return ENA_COM_OK; } -static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq) +static int ena_com_sq_update_reqular_queue_tail(struct ena_com_io_sq *io_sq) { - if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) - return ena_com_sq_update_llq_tail(io_sq); - io_sq->tail++; /* Switch phase bit in case of wrap around */ @@ -223,6 +220,14 @@ static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq) return ENA_COM_OK; } +static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq) +{ + if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) + return ena_com_sq_update_llq_tail(io_sq); + + return ena_com_sq_update_reqular_queue_tail(io_sq); +} + static struct ena_eth_io_rx_cdesc_base * ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx) { @@ -661,7 +666,7 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq, desc->buff_addr_hi = ((ena_buf->paddr & GENMASK_ULL(io_sq->dma_addr_bits - 1, 32)) >> 32); - return ena_com_sq_update_tail(io_sq); + return ena_com_sq_update_reqular_queue_tail(io_sq); } bool ena_com_cq_empty(struct ena_com_io_cq *io_cq) -- 2.17.1