From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D05F643E01; Fri, 5 Apr 2024 14:52:49 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BE3F840693; Fri, 5 Apr 2024 14:52:49 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mails.dpdk.org (Postfix) with ESMTP id F2D4C406BC for ; Fri, 5 Apr 2024 14:52:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1712321568; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CJD4x8VcBLPEWhuIzkPaW7WlACfAbgs0vpUr9QWshSA=; b=iEvCQVHlF39rVg/cz2e3AexzY8R6X3qimviL+Uqdbiz+KS8MgE3YvSfD19sb5rxqkAxTGX XjWixhTJSpO6Fkeu+gslcmjEXCHebhHy5nkgSY+7eNdL/Sr/NiHe0b+SYyIhNNcS8O4WKo RgnY1pGjoE4VpV4JBgtjR/h8bDPVLE4= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-425-3lwf0DBENm-Ov0yYgh0Y5w-1; Fri, 05 Apr 2024 08:52:43 -0400 X-MC-Unique: 3lwf0DBENm-Ov0yYgh0Y5w-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id E299F845DC0; Fri, 5 Apr 2024 12:52:42 +0000 (UTC) Received: from dmarchan.redhat.com (unknown [10.45.225.49]) by smtp.corp.redhat.com (Postfix) with ESMTP id 00D061C060CE; Fri, 5 Apr 2024 12:52:40 +0000 (UTC) From: David Marchand To: dev@dpdk.org Cc: thomas@monjalon.net, ferruh.yigit@amd.com, stable@dpdk.org, Jun Wang , Yuying Zhang , Beilei Xing , Jie Wang Subject: [PATCH 6/8] net/i40e: fix outer UDP checksum offload for X710 Date: Fri, 5 Apr 2024 14:49:45 +0200 Message-ID: <20240405125039.897933-7-david.marchand@redhat.com> In-Reply-To: <20240405125039.897933-1-david.marchand@redhat.com> References: <20240405125039.897933-1-david.marchand@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.7 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org According to the X710 datasheet (and confirmed on the field..), X710 devices do not support outer checksum offload. """ 8.4.4.2 Transmit L3 and L4 Integrity Offload Tunneling UDP headers and GRE header are not offloaded while the X710/XXV710/XL710 leaves their checksum field as is. If a checksum is required, software should provide it as well as the inner checksum value(s) that are required for the outer checksum. """ Fix Tx offload capabilities according to the hardware. X722 may support such offload by setting I40E_TXD_CTX_QW0_L4T_CS_MASK. Bugzilla ID: 1406 Fixes: 8cc79a1636cd ("net/i40e: fix forward outer IPv6 VXLAN") Cc: stable@dpdk.org Reported-by: Jun Wang Signed-off-by: David Marchand --- Note: I do not have X722 nic. Please Intel devs, check for both X710 and X722 series. --- .mailmap | 1 + drivers/net/i40e/i40e_ethdev.c | 6 +++++- drivers/net/i40e/i40e_rxtx.c | 9 +++++++++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/.mailmap b/.mailmap index 3843868716..091766eca7 100644 --- a/.mailmap +++ b/.mailmap @@ -719,6 +719,7 @@ Junjie Wan Jun Qiu Jun W Zhou Junxiao Shi +Jun Wang Jun Yang Junyu Jiang Juraj Linkeš diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 380ce1a720..6535c7c178 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -3862,8 +3862,12 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO | RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO | RTE_ETH_TX_OFFLOAD_MULTI_SEGS | - RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM | dev_info->tx_queue_offload_capa; + if (hw->mac.type == I40E_MAC_X722) { + dev_info->tx_offload_capa |= + RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM; + } + dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index 5d25ab4d3a..a649911494 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -295,6 +295,15 @@ i40e_parse_tunneling_params(uint64_t ol_flags, */ *cd_tunneling |= (tx_offload.l2_len >> 1) << I40E_TXD_CTX_QW0_NATLEN_SHIFT; + + /** + * Calculate the tunneling UDP checksum (only supported with X722). + * Shall be set only if L4TUNT = 01b and EIPT is not zero + */ + if (!(*cd_tunneling & I40E_TXD_CTX_QW0_EXT_IP_MASK) && + (*cd_tunneling & I40E_TXD_CTX_UDP_TUNNELING) && + (ol_flags & RTE_MBUF_F_TX_OUTER_UDP_CKSUM)) + *cd_tunneling |= I40E_TXD_CTX_QW0_L4T_CS_MASK; } static inline void -- 2.44.0