* [PATCH 1/4] net/mlx5: fix secondary process port close
2024-04-16 15:30 [PATCH 0/4] net/mlx5: some unrelated fixes and improvements Michael Baum
@ 2024-04-16 15:30 ` Michael Baum
2024-04-16 15:30 ` [PATCH 2/4] net/mlx5/hws: fix GENEVE option class partial mask Michael Baum
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Michael Baum @ 2024-04-16 15:30 UTC (permalink / raw)
To: dev
Cc: Matan Azrad, Dariusz Sosnowski, Raslan Darawsheh,
Viacheslav Ovsiienko, Ori Kam, Suanming Mou, michaelba, stable
The "mlx5_dev_close()" function is used for both primary and secondary
processes.
If secondary process use this function after primary process is closed,
the priv structure isn't valid anymore.
The function is accessing priv structure to get "sh" pointer in part
shared between processes causing a crash for secondary.
This patch avoids this access and print warning in this case.
Fixes: f5177bdc8b76 ("net/mlx5: add GENEVE TLV options parser API")
Cc: michaelba@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
drivers/net/mlx5/mlx5.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index d1a63822a5..585b4d5497 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -2295,11 +2295,13 @@ int
mlx5_dev_close(struct rte_eth_dev *dev)
{
struct mlx5_priv *priv = dev->data->dev_private;
- struct mlx5_dev_ctx_shared *sh = priv->sh;
+ struct mlx5_dev_ctx_shared *sh;
unsigned int i;
int ret;
if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
+ if (!priv)
+ DRV_LOG(WARNING, "primary process is already closed");
/* Check if process_private released. */
if (!dev->process_private)
return 0;
@@ -2308,6 +2310,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
rte_eth_dev_release_port(dev);
return 0;
}
+ sh = priv->sh;
if (!sh)
return 0;
if (priv->shared_refcnt) {
@@ -2326,9 +2329,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
}
#endif
DRV_LOG(DEBUG, "port %u closing device \"%s\"",
- dev->data->port_id,
- ((priv->sh->cdev->ctx != NULL) ?
- mlx5_os_get_ctx_device_name(priv->sh->cdev->ctx) : ""));
+ dev->data->port_id, sh->ibdev_name);
/*
* If default mreg copy action is removed at the stop stage,
* the search will return none and nothing will be done anymore.
@@ -2402,7 +2403,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
mlx5_free(priv->rss_conf.rss_key);
if (priv->reta_idx != NULL)
mlx5_free(priv->reta_idx);
- if (priv->sh->dev_cap.vf)
+ if (sh->dev_cap.vf)
mlx5_os_mac_addr_flush(dev);
if (priv->nl_socket_route >= 0)
close(priv->nl_socket_route);
@@ -2445,7 +2446,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
if (priv->hrxqs)
mlx5_list_destroy(priv->hrxqs);
mlx5_free(priv->ext_rxqs);
- priv->sh->port[priv->dev_port - 1].nl_ih_port_id = RTE_MAX_ETHPORTS;
+ sh->port[priv->dev_port - 1].nl_ih_port_id = RTE_MAX_ETHPORTS;
/*
* The interrupt handler port id must be reset before priv is reset
* since 'mlx5_dev_interrupt_nl_cb' uses priv.
@@ -2457,7 +2458,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
* mlx5_os_mac_addr_flush() uses ibdev_path for retrieving
* ifindex if Netlink fails.
*/
- mlx5_free_shared_dev_ctx(priv->sh);
+ mlx5_free_shared_dev_ctx(sh);
if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
unsigned int c = 0;
uint16_t port_id;
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 2/4] net/mlx5/hws: fix GENEVE option class partial mask
2024-04-16 15:30 [PATCH 0/4] net/mlx5: some unrelated fixes and improvements Michael Baum
2024-04-16 15:30 ` [PATCH 1/4] net/mlx5: fix secondary process port close Michael Baum
@ 2024-04-16 15:30 ` Michael Baum
2024-04-16 15:30 ` [PATCH 3/4] net/mlx5/hws: add fragment packet ID matching support Michael Baum
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Michael Baum @ 2024-04-16 15:30 UTC (permalink / raw)
To: dev
Cc: Matan Azrad, Dariusz Sosnowski, Raslan Darawsheh,
Viacheslav Ovsiienko, Ori Kam, Suanming Mou, valex, stable
When GENEVE option parser is configured, the class field has 3 optional
modes:
1. ignored - ignore this field.
2. fixed - this field is part of option identifier along with type
field. In this mode, the exact value is provided in "spec"
field during pattern template creation and mask must be 0xffff.
3. matchable - class field isn't part of the identifier and only mask is
provided in pattern template creation. The mask can be
any value like all other fields.
In current implementation, when class mask isn't 0, pattern template
creation is failed for mask != 0xffff regardless to class mode.
This patch fixes this validation to be only when class mode is fixed.
Fixes: 8f8dad4289e0 ("net/mlx5/hws: support GENEVE options matching")
Cc: valex@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 35a2ed2048..f1f544deab 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -2500,11 +2500,6 @@ mlx5dr_definer_conv_item_geneve_opt(struct mlx5dr_definer_conv_data *cd,
goto out_not_supp;
}
- if (m->option_class && m->option_class != RTE_BE16(UINT16_MAX)) {
- DR_LOG(ERR, "Geneve option class has invalid mask");
- goto out_not_supp;
- }
-
ret = mlx5_get_geneve_hl_data(cd->ctx,
v->option_type,
v->option_class,
@@ -2517,6 +2512,11 @@ mlx5dr_definer_conv_item_geneve_opt(struct mlx5dr_definer_conv_data *cd,
goto out_not_supp;
}
+ if (ok_bit_on_class && m->option_class != RTE_BE16(UINT16_MAX)) {
+ DR_LOG(ERR, "Geneve option class has invalid mask");
+ goto out_not_supp;
+ }
+
if (!ok_bit_on_class && m->option_class) {
/* DW0 is used, we will match type, class */
if (!num_of_dws || hl_dws[0].dw_mask != UINT32_MAX) {
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 3/4] net/mlx5/hws: add fragment packet ID matching support
2024-04-16 15:30 [PATCH 0/4] net/mlx5: some unrelated fixes and improvements Michael Baum
2024-04-16 15:30 ` [PATCH 1/4] net/mlx5: fix secondary process port close Michael Baum
2024-04-16 15:30 ` [PATCH 2/4] net/mlx5/hws: fix GENEVE option class partial mask Michael Baum
@ 2024-04-16 15:30 ` Michael Baum
2024-04-16 15:30 ` [PATCH 4/4] net/mlx5/hws: remove table type DONTCARE Michael Baum
2024-04-29 7:46 ` [PATCH 0/4] net/mlx5: some unrelated fixes and improvements Raslan Darawsheh
4 siblings, 0 replies; 6+ messages in thread
From: Michael Baum @ 2024-04-16 15:30 UTC (permalink / raw)
To: dev
Cc: Matan Azrad, Dariusz Sosnowski, Raslan Darawsheh,
Viacheslav Ovsiienko, Ori Kam, Suanming Mou, Alex Vesker
Add HWS support of IPv4 fragment packet id field matching.
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 11 ++++++++++-
drivers/net/mlx5/hws/mlx5dr_definer.h | 2 ++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index f1f544deab..7bb328e85e 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -171,6 +171,7 @@ struct mlx5dr_definer_conv_data {
X(SET, ipv4_version, STE_IPV4, rte_ipv4_hdr) \
X(SET_BE16, ipv4_frag, v->fragment_offset, rte_ipv4_hdr) \
X(SET_BE16, ipv4_len, v->total_length, rte_ipv4_hdr) \
+ X(SET_BE16, ipv4_identification, v->packet_id, rte_ipv4_hdr) \
X(SET, ip_fragmented, !!v->fragment_offset, rte_ipv4_hdr) \
X(SET_BE16, ipv6_payload_len, v->hdr.payload_len, rte_flow_item_ipv6) \
X(SET, ipv6_proto, v->hdr.proto, rte_flow_item_ipv6) \
@@ -1026,7 +1027,7 @@ mlx5dr_definer_conv_item_ipv4(struct mlx5dr_definer_conv_data *cd,
if (!m)
return 0;
- if (m->packet_id || m->hdr_checksum ||
+ if (m->hdr_checksum ||
(l && (l->next_proto_id || l->type_of_service))) {
rte_errno = ENOTSUP;
return rte_errno;
@@ -1060,6 +1061,14 @@ mlx5dr_definer_conv_item_ipv4(struct mlx5dr_definer_conv_data *cd,
DR_CALC_SET(fc, eth_l3, protocol_next_header, inner);
}
+ if (m->packet_id) {
+ fc = &cd->fc[DR_CALC_FNAME(IP_ID, inner)];
+ fc->item_idx = item_idx;
+ fc->is_range = l && l->packet_id;
+ fc->tag_set = &mlx5dr_definer_ipv4_identification_set;
+ DR_CALC_SET(fc, eth_l3, identification, inner);
+ }
+
if (m->total_length) {
fc = &cd->fc[DR_CALC_FNAME(IP_LEN, inner)];
fc->item_idx = item_idx;
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.h b/drivers/net/mlx5/hws/mlx5dr_definer.h
index ca530ebf30..a42ba9b81a 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.h
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.h
@@ -75,6 +75,8 @@ enum mlx5dr_definer_fname {
MLX5DR_DEFINER_FNAME_IP_VERSION_I,
MLX5DR_DEFINER_FNAME_IP_FRAG_O,
MLX5DR_DEFINER_FNAME_IP_FRAG_I,
+ MLX5DR_DEFINER_FNAME_IP_ID_O,
+ MLX5DR_DEFINER_FNAME_IP_ID_I,
MLX5DR_DEFINER_FNAME_IP_LEN_O,
MLX5DR_DEFINER_FNAME_IP_LEN_I,
MLX5DR_DEFINER_FNAME_IP_TOS_O,
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 4/4] net/mlx5/hws: remove table type DONTCARE
2024-04-16 15:30 [PATCH 0/4] net/mlx5: some unrelated fixes and improvements Michael Baum
` (2 preceding siblings ...)
2024-04-16 15:30 ` [PATCH 3/4] net/mlx5/hws: add fragment packet ID matching support Michael Baum
@ 2024-04-16 15:30 ` Michael Baum
2024-04-29 7:46 ` [PATCH 0/4] net/mlx5: some unrelated fixes and improvements Raslan Darawsheh
4 siblings, 0 replies; 6+ messages in thread
From: Michael Baum @ 2024-04-16 15:30 UTC (permalink / raw)
To: dev
Cc: Matan Azrad, Dariusz Sosnowski, Raslan Darawsheh,
Viacheslav Ovsiienko, Ori Kam, Suanming Mou, Alex Vesker
This patch removes the "MLX5DR_TABLE_TYPE_DONTCARE" enum value and use
the correct type instead even for places the type is "don't care".
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr.h | 1 -
drivers/net/mlx5/hws/mlx5dr_definer.c | 26 +++++++++++---------------
drivers/net/mlx5/mlx5_flow.h | 2 +-
3 files changed, 12 insertions(+), 17 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index 80e118a980..36ecccf9ac 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -18,7 +18,6 @@ enum mlx5dr_table_type {
MLX5DR_TABLE_TYPE_NIC_TX,
MLX5DR_TABLE_TYPE_FDB,
MLX5DR_TABLE_TYPE_MAX,
- MLX5DR_TABLE_TYPE_DONTCARE = MLX5DR_TABLE_TYPE_MAX,
};
enum mlx5dr_matcher_resource_mode {
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 7bb328e85e..a0f95c6923 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -152,6 +152,7 @@ struct mlx5dr_definer_conv_data {
uint8_t geneve_opt_ok_idx;
uint8_t geneve_opt_data_idx;
enum rte_flow_item_type last_item;
+ enum mlx5dr_table_type table_type;
};
/* Xmacro used to create generic item setter from items */
@@ -1754,7 +1755,7 @@ mlx5dr_definer_conv_item_tag(struct mlx5dr_definer_conv_data *cd,
if (item->type == RTE_FLOW_ITEM_TYPE_TAG)
reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
RTE_FLOW_ITEM_TYPE_TAG,
- MLX5DR_TABLE_TYPE_DONTCARE,
+ cd->table_type,
v->index);
else
reg = (int)v->index;
@@ -1817,8 +1818,7 @@ mlx5dr_definer_conv_item_quota(struct mlx5dr_definer_conv_data *cd,
{
int mtr_reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
RTE_FLOW_ITEM_TYPE_METER_COLOR,
- MLX5DR_TABLE_TYPE_DONTCARE,
- 0);
+ cd->table_type, 0);
struct mlx5dr_definer_fc *fc;
if (mtr_reg < 0) {
@@ -1837,7 +1837,6 @@ mlx5dr_definer_conv_item_quota(struct mlx5dr_definer_conv_data *cd,
static int
mlx5dr_definer_conv_item_metadata(struct mlx5dr_definer_conv_data *cd,
- enum mlx5dr_table_type table_domain_type,
struct rte_flow_item *item,
int item_idx)
{
@@ -1850,7 +1849,7 @@ mlx5dr_definer_conv_item_metadata(struct mlx5dr_definer_conv_data *cd,
return 0;
reg = flow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_META,
- table_domain_type, -1);
+ cd->table_type, -1);
if (reg <= 0) {
DR_LOG(ERR, "Invalid register for item metadata");
rte_errno = EINVAL;
@@ -2159,7 +2158,7 @@ mlx5dr_definer_conv_item_conntrack(struct mlx5dr_definer_conv_data *cd,
reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
RTE_FLOW_ITEM_TYPE_CONNTRACK,
- MLX5DR_TABLE_TYPE_DONTCARE, -1);
+ cd->table_type, -1);
if (reg <= 0) {
DR_LOG(ERR, "Invalid register for item conntrack");
rte_errno = EINVAL;
@@ -2302,7 +2301,7 @@ mlx5dr_definer_conv_item_meter_color(struct mlx5dr_definer_conv_data *cd,
reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
RTE_FLOW_ITEM_TYPE_METER_COLOR,
- MLX5DR_TABLE_TYPE_DONTCARE, 0);
+ cd->table_type, 0);
MLX5_ASSERT(reg > 0);
fc = mlx5dr_definer_get_register_fc(cd, reg);
@@ -2897,7 +2896,6 @@ mlx5dr_definer_conv_item_compare_field(const struct rte_flow_field_data *f,
const struct rte_flow_field_data *other_f,
struct mlx5dr_definer_conv_data *cd,
int item_idx,
- enum mlx5dr_table_type table_domain_type,
enum mlx5dr_definer_compare_dw_selectors dw_offset)
{
struct mlx5dr_definer_fc *fc = NULL;
@@ -2913,7 +2911,7 @@ mlx5dr_definer_conv_item_compare_field(const struct rte_flow_field_data *f,
case RTE_FLOW_FIELD_META:
reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
RTE_FLOW_ITEM_TYPE_META,
- table_domain_type, -1);
+ cd->table_type, -1);
if (reg <= 0) {
DR_LOG(ERR, "Invalid register for compare metadata field");
rte_errno = EINVAL;
@@ -2932,7 +2930,7 @@ mlx5dr_definer_conv_item_compare_field(const struct rte_flow_field_data *f,
case RTE_FLOW_FIELD_TAG:
reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
RTE_FLOW_ITEM_TYPE_TAG,
- MLX5DR_TABLE_TYPE_DONTCARE,
+ cd->table_type,
f->tag_index);
if (reg <= 0) {
DR_LOG(ERR, "Invalid register for compare tag field");
@@ -2988,7 +2986,6 @@ mlx5dr_definer_conv_item_compare_field(const struct rte_flow_field_data *f,
static int
mlx5dr_definer_conv_item_compare(struct mlx5dr_definer_conv_data *cd,
- enum mlx5dr_table_type table_domain_type,
struct rte_flow_item *item,
int item_idx)
{
@@ -3005,13 +3002,11 @@ mlx5dr_definer_conv_item_compare(struct mlx5dr_definer_conv_data *cd,
}
ret = mlx5dr_definer_conv_item_compare_field(a, b, cd, item_idx,
- table_domain_type,
MLX5DR_DEFINER_COMPARE_ARGUMENT_0);
if (ret)
return ret;
ret = mlx5dr_definer_conv_item_compare_field(b, NULL, cd, item_idx,
- table_domain_type,
MLX5DR_DEFINER_COMPARE_BASE_0);
if (ret)
return ret;
@@ -3034,6 +3029,7 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx,
cd.fc = fc;
cd.ctx = ctx;
cd.relaxed = mt->flags & MLX5DR_MATCH_TEMPLATE_FLAG_RELAXED_MATCH;
+ cd.table_type = matcher->tbl->type;
/* Collect all RTE fields to the field array and set header layout */
for (i = 0; items->type != RTE_FLOW_ITEM_TYPE_END; i++, items++) {
@@ -3107,7 +3103,7 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx,
item_flags |= MLX5_FLOW_ITEM_TAG;
break;
case RTE_FLOW_ITEM_TYPE_META:
- ret = mlx5dr_definer_conv_item_metadata(&cd, matcher->tbl->type, items, i);
+ ret = mlx5dr_definer_conv_item_metadata(&cd, items, i);
item_flags |= MLX5_FLOW_ITEM_METADATA;
break;
case RTE_FLOW_ITEM_TYPE_GRE:
@@ -3198,7 +3194,7 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx,
DR_LOG(ERR, "Compare matcher not supported for more than one item");
goto not_supp;
}
- ret = mlx5dr_definer_conv_item_compare(&cd, matcher->tbl->type, items, i);
+ ret = mlx5dr_definer_conv_item_compare(&cd, items, i);
item_flags |= MLX5_FLOW_ITEM_COMPARE;
matcher->flags |= MLX5DR_MATCHER_FLAGS_COMPARE;
break;
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 34b5e0f45b..ee153cb3a4 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1992,7 +1992,7 @@ flow_hw_get_reg_id(struct rte_eth_dev *dev,
{
#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
return flow_hw_get_reg_id_by_domain(dev, type,
- MLX5DR_TABLE_TYPE_DONTCARE, id);
+ MLX5DR_TABLE_TYPE_MAX, id);
#else
RTE_SET_USED(dev);
RTE_SET_USED(type);
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread