From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C71E443F49; Mon, 29 Apr 2024 12:01:09 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B5E76402BA; Mon, 29 Apr 2024 12:01:09 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mails.dpdk.org (Postfix) with ESMTP id EF4EC4025C for ; Mon, 29 Apr 2024 12:01:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1714384867; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=0d0GK3P+Skmu6vOEkNUR/jfrZVBZl7d6Kru3agGRvZA=; b=UGu9OJEzr3cMlNLkE14tUCpXrpvzAjdryenKgZH9bIvj8EWIexslbp5Hwrhzk0vgWHnMx+ PRZYpDHMI4LYNgFHXeDQKa8fUC+XcvHpFQ3kgzg48Kb6/kPcrNQRzHqMSJL0DBXDKo1JFF VaBn2/1I1I9t48NcTTBXJABzUfwpyXU= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-389-r1Np3o6eMx2YqpNGnmqEUg-1; Mon, 29 Apr 2024 06:01:03 -0400 X-MC-Unique: r1Np3o6eMx2YqpNGnmqEUg-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id E160980B3DD; Mon, 29 Apr 2024 10:01:02 +0000 (UTC) Received: from dmarchan.redhat.com (unknown [10.45.224.248]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8C9642166B31; Mon, 29 Apr 2024 10:01:01 +0000 (UTC) From: David Marchand To: dev@dpdk.org Cc: ahassick@iol.unh.edu, stable@dpdk.org, Anatoly Burakov , Chenbo Xia , Nipun Gupta Subject: [PATCH] bus/pci: fix build with musl 1.2.4 / Alpine 3.19 Date: Mon, 29 Apr 2024 12:00:59 +0200 Message-ID: <20240429100059.1316414-1-david.marchand@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.6 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII"; x-default=true X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Following an upgrade of musl, pread64/pwrite64 wrappers are not provided anymore. Switch to POSIX pread/pwrite. Bugzilla ID: 1422 Cc: stable@dpdk.org Signed-off-by: David Marchand --- drivers/bus/pci/linux/pci_vfio.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c index 87c16e6603..05b03a9667 100644 --- a/drivers/bus/pci/linux/pci_vfio.c +++ b/drivers/bus/pci/linux/pci_vfio.c @@ -80,7 +80,7 @@ pci_vfio_read_config(const struct rte_pci_device *dev, if ((uint64_t)len + offs > size) return -1; - return pread64(fd, buf, len, offset + offs); + return pread(fd, buf, len, offset + offs); } int @@ -101,7 +101,7 @@ pci_vfio_write_config(const struct rte_pci_device *dev, if ((uint64_t)len + offs > size) return -1; - return pwrite64(fd, buf, len, offset + offs); + return pwrite(fd, buf, len, offset + offs); } /* get PCI BAR number where MSI-X interrupts are */ @@ -155,7 +155,7 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd) return -1; } - ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND); + ret = pread(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND); if (ret != sizeof(cmd)) { RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n"); @@ -166,7 +166,7 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd) return 0; cmd |= RTE_PCI_COMMAND_MEMORY; - ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND); + ret = pwrite(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND); if (ret != sizeof(cmd)) { RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n"); @@ -425,7 +425,7 @@ pci_vfio_is_ioport_bar(const struct rte_pci_device *dev, int vfio_dev_fd, return -1; } - ret = pread64(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar), + ret = pread(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar), offset + RTE_PCI_BASE_ADDRESS_0 + bar_index * 4); if (ret != sizeof(ioport_bar)) { RTE_LOG(ERR, EAL, "Cannot read command (%x) from config space!\n", @@ -1276,7 +1276,7 @@ pci_vfio_ioport_read(struct rte_pci_ioport *p, if (vfio_dev_fd < 0) return; - if (pread64(vfio_dev_fd, data, + if (pread(vfio_dev_fd, data, len, p->base + offset) <= 0) RTE_LOG(ERR, EAL, "Can't read from PCI bar (%" PRIu64 ") : offset (%x)\n", @@ -1293,7 +1293,7 @@ pci_vfio_ioport_write(struct rte_pci_ioport *p, if (vfio_dev_fd < 0) return; - if (pwrite64(vfio_dev_fd, data, + if (pwrite(vfio_dev_fd, data, len, p->base + offset) <= 0) RTE_LOG(ERR, EAL, "Can't write to PCI bar (%" PRIu64 ") : offset (%x)\n", @@ -1324,7 +1324,7 @@ pci_vfio_mmio_read(const struct rte_pci_device *dev, int bar, if ((uint64_t)len + offs > size) return -1; - return pread64(fd, buf, len, offset + offs); + return pread(fd, buf, len, offset + offs); } int @@ -1344,7 +1344,7 @@ pci_vfio_mmio_write(const struct rte_pci_device *dev, int bar, if ((uint64_t)len + offs > size) return -1; - return pwrite64(fd, buf, len, offset + offs); + return pwrite(fd, buf, len, offset + offs); } int -- 2.44.0