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[204.195.96.226]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2b62886b608sm20664891a91.27.2024.05.19.15.49.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 May 2024 15:49:30 -0700 (PDT) Date: Sun, 19 May 2024 15:49:29 -0700 From: Stephen Hemminger To: Morten =?UTF-8?B?QnLDuHJ1cA==?= Cc: "Honnappa Nagarahalli" , , "nd" , "Richardson, Bruce" Subject: Re: [PATCH v6 1/9] eal: generic 64 bit counter Message-ID: <20240519154929.3435cbbf@hermes.local> In-Reply-To: <98CBD80474FA8B44BF855DF32C47DC35E9F481@smartserver.smartshare.dk> References: <20240510050507.14381-1-stephen@networkplumber.org> <20240517001302.65514-1-stephen@networkplumber.org> <20240517001302.65514-2-stephen@networkplumber.org> <48ED00A3-1CCA-4F64-ACC3-CA1F0D2B9378@arm.com> <20240516203037.73ec13e1@hermes.local> <248621D2-C402-4DDE-92D8-F5377E816533@arm.com> <98CBD80474FA8B44BF855DF32C47DC35E9F476@smartserver.smartshare.dk> <20240517091801.17fdef27@hermes.local> <98CBD80474FA8B44BF855DF32C47DC35E9F47C@smartserver.smartshare.dk> <20240519081355.6b51c3ba@hermes.local> <98CBD80474FA8B44BF855DF32C47DC35E9F481@smartserver.smartshare.dk> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Sun, 19 May 2024 19:10:30 +0200 Morten Br=C3=B8rup wrote: > Absolutely; whenever possible, local counters should be maintained inside= the loop, and added to the public counters at the end of a loop. >=20 > Please note that application counters might be spread all over memory. > E.g. per-flow in a flow structure, per QoS class in a QoS class structure= , per subscriber in a subscriber structure, etc. And a burst of packets mig= ht touch multiple of these. My point is: Atomic read-modify-write of counte= rs will cause serious stalling, waiting for memory access If an application needs to keep up at DPDK possible speeds, then it needs t= o worry about its cache access patterns. Last time I checked handling 10G 64 byte packets at = line rate without loss means a maximum of 2 cache misses. Very hard to do with any non trivial app= lication. Also, SW QoS above 1G is very hard to do with modern CPU's. Especially with= multiple flows. It maybe possible with something like FQ Codel which only keeps small amoun= t of state.