From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 96A80440DA; Mon, 27 May 2024 04:48:25 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 39D5E406B4; Mon, 27 May 2024 04:48:07 +0200 (CEST) Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2054.outbound.protection.outlook.com [40.107.93.54]) by mails.dpdk.org (Postfix) with ESMTP id E269140696 for ; Mon, 27 May 2024 04:48:03 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=IOSkG2TEXC/HEy4MSrK0lIn5g9HV0sZyllaRY4iS4qXOxRhINO4p4rwOznmxwGF6DtFJNqDonw38zgkxumPOSZ0f28UFuv46TcD/kJ3UGSVZs5JlIhCX/2e0yS+2fmPUIgR3tpq+SumYKtXmp21PrtDKDvAbyCHjW4eZ/qQRg+dsvL3wgf5QYNiDspIjn/B8vPDSeLrqHCJxN/faR0SHyO+MPehkfVo6VjT2OXoEgMPKAiqxw6USnys54+7KPYkH+U+m9CFY3sx9feaOIaOnKbamSyqLvNroKajWkhVnCD00W38EMbCAHvqvqFAAyuZ4/mafj2YbCiyxooSKmlO/FA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=IYomCShGbyW/ER6VDtfh8FSO9fkcc3PGbb7GiO46Okg=; b=jPlt4HpO6wRKEHZQ7ZSuwcyOvEEGlQzmOxEr/Z+fmE62V2Fir+r+KnGV9h5karS1grNC3XtW1fUcTL6i3Y1ibj2C6PuuWljhGWktl9abl/ZLS5WWhN5zhNMeRV+McfoE9DIG7Nac52J2lwEIBllw8OfTPlYRHoGgxkVZo6F7TTbx30U1qPW+MBOPNpXhBPdcFXIg8Iz7OFKS+Jpt13MzCNoOeAzoJ+IhNJENU/vAAJRr2OQ4RQFisUpP8uQnMN+6605US34KuDHYshMJdXOa8OarfZ5J5TBokg1qfX9lmQv9tDbvViKyCWKdICiR0fFgcNc7SswfDlhNCPhwxgvSdQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=IYomCShGbyW/ER6VDtfh8FSO9fkcc3PGbb7GiO46Okg=; b=OZtSCI/q8TyD83M8nyxPxTXX9twpxDtmvifi8BUnfeh4Dvt22tpPdrUf3dG05tVkWlXPIbeXt+K1w9W+9K8M/B3zta5b55CLSlYu+gdKq+EyS8mNHbH1n8VNeBCr1DY64PRyvhzGYICEZxc40k48tBD6gK/tjYVLRkbjfKnmjAEUan3VJZAFDyG0s9dgwu8F86K7e/x8Qqrhu7zCviBsMdhODA3LEZHtEyoY0fcQ4JWG7zvj7yQ4+sZv6L4bFhgoeSV2MV2btqPRTOeViTEKco54exvuj3wG9jIs3MDx7ZIqxvPLrECLHayeRU9hmAJCu0evJt+Rn8K7R0KHc/IokA== Received: from BYAPR08CA0016.namprd08.prod.outlook.com (2603:10b6:a03:100::29) by DS7PR12MB6287.namprd12.prod.outlook.com (2603:10b6:8:94::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7611.29; Mon, 27 May 2024 02:47:59 +0000 Received: from SJ5PEPF000001D6.namprd05.prod.outlook.com (2603:10b6:a03:100:cafe::6a) by BYAPR08CA0016.outlook.office365.com (2603:10b6:a03:100::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7611.30 via Frontend Transport; Mon, 27 May 2024 02:47:58 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by SJ5PEPF000001D6.mail.protection.outlook.com (10.167.242.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7633.15 via Frontend Transport; Mon, 27 May 2024 02:47:58 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 26 May 2024 19:47:48 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 26 May 2024 19:47:45 -0700 From: Rongwei Liu To: , , , , , CC: Dariusz Sosnowski Subject: [PATCH v2 4/4] net/mlx5: implement VXLAN last reserved modification Date: Mon, 27 May 2024 05:47:20 +0300 Message-ID: <20240527024720.1099161-5-rongweil@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20240527024720.1099161-1-rongweil@nvidia.com> References: <20240527024720.1099161-1-rongweil@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001D6:EE_|DS7PR12MB6287:EE_ X-MS-Office365-Filtering-Correlation-Id: ece9dd59-4db4-49e4-3a59-08dc7df76b20 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230031|36860700004|376005|82310400017|1800799015; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?jStuNf/5exzaCgsi3mseuerw7hvaRXaCkfe4mxnf5GM+ax7nqZ8HbJa6FKZH?= =?us-ascii?Q?9uh4w1uTKr9nMaztQIpL6isPter4nF9ODmsq+yW3hGaZbfJt2caDJfgrvCIy?= =?us-ascii?Q?A7+Ou1CFZJKTxX4Cxa59UBHKznqxVyhJFtxdAofWV9x7cZ+3PMnXBM4DBi20?= =?us-ascii?Q?h9OzQ2j8R/GGayum2GodH9nVT1aP2E9uVYNGqVDiKtWDsMveOFzavxBgxbnr?= =?us-ascii?Q?nJXdHE7Q7sifQ48ddE3XAuiQyB6SHwqHo9MoD/fLcD33iZ29GxdXuPiH4Nqs?= =?us-ascii?Q?2p2uvMFgGpwjJD9168o2GsRZQzjPI2PsIKITMxGarC4TtD04GFI74mjW+BSN?= =?us-ascii?Q?bgmDon+yLO7lW0O+E0EwGIthECK2j7fVbeK4Nt+dghBlWUJ9/W5heMvi1C37?= =?us-ascii?Q?wjQsuAcaMFfC6+LKLhnK0zbaWhS01jI0Gp+sy/O/DKr0kYsYKXQT6Dp1q6KJ?= =?us-ascii?Q?/cuso0D7gR38HYDHbbpkNWPw3pxemP5y3SK45vJEJ9Pjc97jaW0iB9hCFKi/?= =?us-ascii?Q?nyWEwY41awyCJu3I37tV5saH4c5ivkfkJoJi4qSLZLXq/pFpvNu1A2LldaFI?= =?us-ascii?Q?URLYE3Zl8PuqnIDEmiovsFKRQNlEvBaMgWj8xbcXs7hYfDRrbbvLZ/tRcbKd?= =?us-ascii?Q?33gzaCHg1g2wzpBKogIaxKLxL2Vq7ip5TGJv6ZSaXYrF6e2utDdVHB90m1tA?= =?us-ascii?Q?8JxnrOGUYurj2wF2IeoT57ajWeGrN4owt+V9kCMpzrZAEqA0UzUpRF73Q1bk?= =?us-ascii?Q?zbz1cCnsl1+Ps+LF/tS21LwnbXGpVOI2KBMWKRV/QOvvcKw/f3tCL+gd6Kmf?= =?us-ascii?Q?02U96dlLVATi5AUNV0XlL4aMnXAA0zTMoxYhFABtzlCHz9CVW5mPaY0vSDo0?= =?us-ascii?Q?BxWEAaQ3kjS/OdzsQqFDz6Dy7UztnBFSlRXx1DWXDSom3Hf7wWUMi8IsjbTg?= =?us-ascii?Q?YvuiHYL0K/c3q2KEgD7+1g2tQ8ctqj1kcRaCaapn3n0bJwFhwXeqCkO/5/9G?= =?us-ascii?Q?KJ20m5bE5b6HYxDS+TBivbAc6Qi35wM20JLCJnabdYCGtLdKqQGnJDyEx1H7?= =?us-ascii?Q?IEj+Pyngws0z7a5nRDDCG0oBXtn3ujlOWM5YtRqNDjx73eziRt3rxXvFrLW+?= =?us-ascii?Q?SoL+HBcMCIlXibqgsR/O5MBq6S/EA5hM9BN6SqtYAQcdlkwDBM7IxXNwTO7G?= =?us-ascii?Q?EN/MkzVx3x+g7qG/fWoz41qPaHLH+LxijnrXIUjrnFUstEH4oO99mmo0DKXB?= =?us-ascii?Q?RFbvdnuheOmjQzl13MH5EaMHS61AOt9FnF1YhHBNSiO2ivYNHo9xmLhpOCR0?= =?us-ascii?Q?ZVOvMg0QnhEuEXGSZ0u5kFc/9LWYT/Su50xwOeF6vPxjxsw6p/K/ICuAxYCG?= =?us-ascii?Q?mA8zIl8DMbofXGz/kBIiduzvl2tP?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230031)(36860700004)(376005)(82310400017)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 May 2024 02:47:58.6029 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ece9dd59-4db4-49e4-3a59-08dc7df76b20 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001D6.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6287 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Implementing the VxLAN last reserved byte modification. Following the RFC, the field is only 1 byte and needs to use the field_length as 8 instead of the real dst_field->size. Signed-off-by: Rongwei Liu Acked-by: Dariusz Sosnowski --- doc/guides/nics/mlx5.rst | 5 +++++ drivers/net/mlx5/mlx5_flow_dv.c | 12 ++++++++++++ drivers/net/mlx5/mlx5_flow_hw.c | 5 +++++ 3 files changed, 22 insertions(+) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index dcc1beb812..afa35bf1e6 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -685,6 +685,11 @@ Limitations - Second tunnel fields are not supported. - Encapsulation levels greater than ``2`` are not supported. + - Modification of the VXLAN header is supported with below limitations: + + - Only in HW steering (``dv_flow_en=2``). + - Support VNI and rsvd1 modifications for traffic with default VXLAN/VXLAN-GPE/VXLAN-GBP + UDP destination port. - Age action: diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index f9c56af86c..7645369533 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1439,6 +1439,8 @@ mlx5_flow_item_field_width(struct rte_eth_dev *dev, case RTE_FLOW_FIELD_VXLAN_VNI: case RTE_FLOW_FIELD_GENEVE_VNI: return 24; + case RTE_FLOW_FIELD_VXLAN_RSVD1: + return 8; case RTE_FLOW_FIELD_GTP_TEID: case RTE_FLOW_FIELD_MPLS: case RTE_FLOW_FIELD_TAG: @@ -2038,6 +2040,16 @@ mlx5_flow_field_id_to_modify_info else info[idx].offset = off_be; break; + case RTE_FLOW_FIELD_VXLAN_RSVD1: + MLX5_ASSERT(data->offset + width <= 8); + /* Last_rsvd is on bits 7-0 of TUNNEL_HDR_DW_1. */ + off_be = 8 - (data->offset + width); + info[idx] = (struct field_modify_info){1, 0, MLX5_MODI_TUNNEL_HDR_DW_1}; + if (mask) + mask[idx] = flow_modify_info_mask_8(width, off_be); + else + info[idx].offset = off_be; + break; case RTE_FLOW_FIELD_GENEVE_OPT_TYPE: MLX5_ASSERT(data->offset + width <= 8); modi_id = flow_geneve_opt_modi_field_get(priv, data); diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 80efcf44fa..e2d41707c8 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -1363,6 +1363,10 @@ flow_hw_modify_field_compile(struct rte_eth_dev *dev, value = *(const uint8_t *)item.spec; value = rte_cpu_to_be_32(value << 8); item.spec = &value; + } else if (conf->dst.field == RTE_FLOW_FIELD_VXLAN_RSVD1) { + value = *(const uint8_t *)item.spec << 24; + value = rte_cpu_to_be_32(value); + item.spec = &value; } } else { type = conf->operation == RTE_FLOW_MODIFY_SET ? @@ -5494,6 +5498,7 @@ flow_hw_validate_modify_field_level(const struct rte_flow_field_data *data, case RTE_FLOW_FIELD_ESP_SPI: case RTE_FLOW_FIELD_ESP_SEQ_NUM: case RTE_FLOW_FIELD_VXLAN_VNI: + case RTE_FLOW_FIELD_VXLAN_RSVD1: case RTE_FLOW_FIELD_GENEVE_VNI: case RTE_FLOW_FIELD_GENEVE_OPT_TYPE: case RTE_FLOW_FIELD_GENEVE_OPT_CLASS: -- 2.27.0