From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 91D15440F2; Tue, 28 May 2024 10:17:58 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C406B40DDA; Tue, 28 May 2024 10:17:31 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by mails.dpdk.org (Postfix) with ESMTP id B081140A6F for ; Tue, 28 May 2024 10:17:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716884249; x=1748420249; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=w7jyvgufW9+FqmT/ev1OAiTDwZRhWueQj5Q+RkGb6S4=; b=hoYSJ5FzvnCuKUjFxStpPL+pIc18ZiLoXRRu+SZAndSrFoFPvLf3CLBf ewd9hjLaSlel22LGXdVLl1vffjAbufFqn58k/be41DOZzbwHcXShNXZri U1OhgBaBeMYaT9cI3pVpNJbvwZNKbqCvad4HmAQ0DbpuLIjdXKHZYoCkX yusbK3OYhDckMF423+iQYx/9NBpJ6M+C2HlGaOtqny8J86QXoyMLsmNV9 7qQtPJJFgvgGxLwAi8cGHdD38dsP3fsNfkB4O54DD5Bo1Ccy+tR1ZkpSv LgkKT3ccSyoKvRVqfgQhET2265tTBZYvji8hMEgmC9TIvNuryVvAtTQW9 g==; X-CSE-ConnectionGUID: LaeSuZNgQkW+WE7XyjZBhw== X-CSE-MsgGUID: XA4BQ75iRh2+3PTc8BeOqg== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="35728410" X-IronPort-AV: E=Sophos;i="6.08,194,1712646000"; d="scan'208";a="35728410" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 01:17:29 -0700 X-CSE-ConnectionGUID: mxUqf5PgQdCHnhl5aAQXxw== X-CSE-MsgGUID: f1J+qxtGQrmK/4MvUakGyQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,194,1712646000"; d="scan'208";a="34976587" Received: from unknown (HELO npf-hyd-clx-03..) ([10.145.170.182]) by fmviesa008.fm.intel.com with ESMTP; 28 May 2024 01:17:28 -0700 From: Soumyadeep Hore To: jingjing.wu@intel.com Cc: dev@dpdk.org Subject: [PATCH 15/25] common/idpf: add wmb before tail Date: Tue, 28 May 2024 07:35:55 +0000 Message-ID: <20240528073559.867121-6-soumyadeep.hore@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240528073559.867121-1-soumyadeep.hore@intel.com> References: <20240528073559.867121-1-soumyadeep.hore@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Introduced through customer's feedback in their attempt to address some bugs this introduces a memory barrier before posting ctlq tail. This makes sure memory writes have a chance to take place before HW starts messing with the descriptors. Signed-off-by: Soumyadeep Hore --- drivers/common/idpf/base/idpf_controlq.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c index d2e9fdc06d..6807e83f18 100644 --- a/drivers/common/idpf/base/idpf_controlq.c +++ b/drivers/common/idpf/base/idpf_controlq.c @@ -625,6 +625,8 @@ int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_ctlq_info *cq, /* Wrap to end of end ring since current ntp is 0 */ cq->next_to_post = cq->ring_size - 1; + idpf_wmb(); + wr32(hw, cq->reg.tail, cq->next_to_post); } -- 2.43.0