[PATCH] net/mlx5: fix non-template HWS RSS action configuration

[Maayan Kashani <mkashani@nvidia.com>]

From: Gregory Etelson <getelson@nvidia.com>

SWS mode checks flow items to adjust RSS action configuration.

HWS mode relies on the application to provide the correct
RSS configuration.

The patch allows PMD in the non-template HWS mode to reconfigure RSS
action according to items.

Fixes: b73a84345231 ("net/mlx5: initial design of non template to hws")
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
---
Depends-on: series-196920 ("net/mlx5: initial design of non template to hws")
---
 drivers/net/mlx5/mlx5_nta_rss.c | 31 ++++++++++++++++++++++++-------
 1 file changed, 24 insertions(+), 7 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_nta_rss.c b/drivers/net/mlx5/mlx5_nta_rss.c
index 1f0085ff06..56368f5efa 100644
--- a/drivers/net/mlx5/mlx5_nta_rss.c
+++ b/drivers/net/mlx5/mlx5_nta_rss.c
@@ -436,7 +436,7 @@ flow_nta_handle_rss(struct rte_eth_dev *dev,
 		    struct rte_flow_error *error)
 {
 	struct rte_flow_hw *rss_base = NULL, *rss_next = NULL, *rss_miss = NULL;
-	struct rte_flow_action_rss ptype_rss_conf;
+	struct rte_flow_action_rss ptype_rss_conf = *rss_conf;
 	struct mlx5_nta_rss_ctx rss_ctx;
 	uint64_t rss_types = rte_eth_rss_hf_refine(rss_conf->types);
 	bool inner_rss = rss_conf->level > 1;
@@ -478,6 +478,7 @@ flow_nta_handle_rss(struct rte_eth_dev *dev,
 		[MLX5_RSS_PTYPE_ACTION_INDEX + 1] = { .type = RTE_FLOW_ACTION_TYPE_END }
 	};
 
+	ptype_rss_conf.types = rss_types;
 	if (l4_item) {
 		/*
 		 * Original flow pattern extended up to L4 level.
@@ -500,10 +501,27 @@ flow_nta_handle_rss(struct rte_eth_dev *dev,
 			/*
 			 * Original flow pattern extended up to L3 level.
 			 * RSS action was not set for L4 hash.
-			 * Original pattern does not need expansion.
 			 */
-			rte_flow_error_set(error, 0, RTE_FLOW_ERROR_TYPE_NONE, NULL, NULL);
-			return NULL;
+			bool ip6_item =
+				(outer_rss && (item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)) ||
+				(inner_rss && (item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6));
+			bool ip6_hash = rss_types & RTE_ETH_RSS_IPV6;
+
+			if (ip6_item && ip6_hash) {
+				/*
+				 * MLX5 HW will not activate TIR IPv6 hash
+				 * if that TIR has also IPv4 hash
+				 */
+				ptype_rss_conf.types &= ~MLX5_IPV4_LAYER_TYPES;
+			} else {
+				/*
+				 * The original pattern does not need expansion.
+				 */
+				rte_flow_error_set(error, 0,
+						   RTE_FLOW_ERROR_TYPE_NONE,
+						   NULL, NULL);
+				return NULL;
+			}
 		}
 	}
 	/* Create RSS expansions in dedicated PTYPE flow group */
@@ -513,11 +531,10 @@ flow_nta_handle_rss(struct rte_eth_dev *dev,
 				   NULL, "cannot get RSS PTYPE group");
 		return NULL;
 	}
-	ptype_rss_conf = *rss_conf;
 	mlx5_nta_rss_init_ptype_ctx(&rss_ctx, dev, &ptype_attr, ptype_pattern,
-				    ptype_actions, rss_conf, &expansion_head,
+				    ptype_actions, &ptype_rss_conf, &expansion_head,
 				    error, item_flags, flow_type, external);
-	rss_miss = mlx5_hw_rss_ptype_create_miss_flow(dev, rss_conf, ptype_attr.group,
+	rss_miss = mlx5_hw_rss_ptype_create_miss_flow(dev, &ptype_rss_conf, ptype_attr.group,
 						      external, error);
 	if (!rss_miss)
 		goto error;
-- 
2.25.1