From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C033944145; Mon, 3 Jun 2024 12:51:00 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7807542E6D; Mon, 3 Jun 2024 12:50:01 +0200 (CEST) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2062.outbound.protection.outlook.com [40.107.94.62]) by mails.dpdk.org (Postfix) with ESMTP id 07BCD42E48 for ; Mon, 3 Jun 2024 12:50:00 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=nRsUkPO8xhYL0LFvayf85Xwbk/zbWZvGL1tjOvY5RvSiMw5JzYHmwYXp+1T6fIkvB/wMcDjG6wvwEpiPyN0Gz3oF45fvr/TEGjhjN3UK7sIkVEJ5Stne+tkeI6KlhrLTQ0WZEjfQnwZ4n3HBAzZhHH1w1j4EO2y1FUHLLQtNqytcIzN9GdC3mza+MUaOoq+BY16TNae0pUvC0gCci7sG6d1tKL8ctDCiFS4VcsN5g2+oPJnwZgPqktSihnZmlfTz9zVhyy3GV2cE74rbgTnxLl34pk7/eaJz7w2G1vJb3/jHpu18XRpFoL3IwPKn/OaMwOoceP+IL6H6Wr5qyxalhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=D7uc6GGFLKx/zTtQRS4X7Yhv/4p8Zeg0EdbhSH/VqHc=; b=ZAeSRy/eR91R3bQ85smoKXvfTLGBhZDoJkZtvqHWfu5snr8OhL31nG3RuQ+I8n9sT4mdlFX8L5Eb0baogC5+vu8IBUir63uBTUf56d1gWumEKBFVr+3HMRkAWmWNMu60V5KKg9Ji5LRBdSbipmbu336Vh3va1MNdQj3jO4solI21iryYH6nfNEos3bt4/dbU7nzavpRmGmuQQJeS4kw3cZFqcDKYnTcLGoZ1mb0K3+ukWcpE9E+B5xV5x9BbRtpiBvF9ipblXqIgsAiZqUkDZE5xJNgxUYjuNIJKvvQCwpdnlua5HcpIV2Ebc0BhPn8toLw/LOzdXYtF10Z6BvuOsw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=D7uc6GGFLKx/zTtQRS4X7Yhv/4p8Zeg0EdbhSH/VqHc=; b=n80G5VUNnEoOktG1CnnpLndMxBp1hYDECyqAMTPW8RtR3lrpWukcYV+U6rrXJq+Kfj+EMHUDjQPjcjOyc6l7e6vRT5cBUoj5cwjSYeYuMCo1aM3bJ6wSXABIWt428qxQYwMKpcWQ1IS7g+xL+8dY9BcpAsJjDcHQgfV2saaN7V5bV0bP9P5/2OSyWJRHykd6jBWXmmiwOMx91z41omGtDzDJzBqUfVRgn1qnZPOb5kpnCcft0Hca+6/Fm1wfDrZJedvSxghgOg6FfzrhfAHZUJ0c0RgY5JOUjq21mzGNLBzmPdx3dsofpTLvJDQHszgNbTyV54AqH9Lkor5PrQLqXw== Received: from BN9PR03CA0938.namprd03.prod.outlook.com (2603:10b6:408:108::13) by SN7PR12MB7854.namprd12.prod.outlook.com (2603:10b6:806:32b::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7611.22; Mon, 3 Jun 2024 10:49:55 +0000 Received: from BN3PEPF0000B074.namprd04.prod.outlook.com (2603:10b6:408:108:cafe::43) by BN9PR03CA0938.outlook.office365.com (2603:10b6:408:108::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7633.27 via Frontend Transport; Mon, 3 Jun 2024 10:49:55 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN3PEPF0000B074.mail.protection.outlook.com (10.167.243.119) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7633.15 via Frontend Transport; Mon, 3 Jun 2024 10:49:55 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 3 Jun 2024 03:49:38 -0700 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail204.nvidia.com (10.129.68.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 3 Jun 2024 03:49:37 -0700 Received: from nvidia.com (10.127.8.14) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4 via Frontend Transport; Mon, 3 Jun 2024 03:49:35 -0700 From: Maayan Kashani To: CC: , , , Viacheslav Ovsiienko , Ori Kam , Suanming Mou , Matan Azrad Subject: [PATCH v3 10/11] net/mlx5: use non const max number for ASO actions Date: Mon, 3 Jun 2024 13:48:49 +0300 Message-ID: <20240603104850.9935-10-mkashani@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20240603104850.9935-1-mkashani@nvidia.com> References: <20240602102802.196920-1-mkashani@nvidia.com> <20240603104850.9935-1-mkashani@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B074:EE_|SN7PR12MB7854:EE_ X-MS-Office365-Filtering-Correlation-Id: 89d06738-206f-4076-e6db-08dc83bae7ae X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230031|1800799015|82310400017|36860700004|376005; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?R+lBKzKGEDCChFx095PyssZYBipjN4GpKSi4CG3wuUkR6EHBho03+YmtY2is?= =?us-ascii?Q?WVBIcysXgcjixId6r+/PjdXV2Ft7/ZGgn3TXFYpIZkGHjw/R1tcZj66FgSZS?= =?us-ascii?Q?9fkNErxjxe6b45vhJ969iBN5IiRk1elTGi9IA4bcBOmxOJ9EIKOGW8/cfpna?= =?us-ascii?Q?OBe0gxtdExgG4//WbCen6K7gq6Kc9IGR/YVvQFPUtMmWRMzAaanIpYC3WRoe?= =?us-ascii?Q?XwJMLiNdPenGZPSBEp1GiB+0Fc2kQs69ThR0VcVG8DXGM3nCv+BjccllgkIV?= =?us-ascii?Q?zJfpPiRUErPdrbvkBVIpo/So1XG+U8KzR/+IJMSt8b4wL733+Yjr2psW3N7f?= =?us-ascii?Q?DQnfzOs787r6Gxd7FQL3bEdE0OF6/J/T/oew3ta/twNKDzffGifO3PD0cefn?= =?us-ascii?Q?AD74SVNNImEnMCvXamjAmKyGP5pY5FAjYPThlEod18as6BrJQEZAVX3DjYpv?= =?us-ascii?Q?/Kh062BzQE7qonNoZUvNetfboKIGlobfCJEMPuue/ArUsOcBrT8T3+yEDOHw?= =?us-ascii?Q?um48YrWEYo7AwYf+q3jyg3YRYh+DGxRZRobDw2S+9AckMx3qBSnEgiGm5CqL?= =?us-ascii?Q?Tzvos8CL7ijOB+W5D6gs8JFsOBtP7G7054gPWHv/1hdAM+zcMeqnt1tH+RZ8?= =?us-ascii?Q?Zm7BGOSSzXDolrT2yluYua2eHf7Io8dYGeqHcZqE5vouMKyIrGCYCIXKYlC6?= =?us-ascii?Q?Gu/5WKm7DUElJddoIUD5am+S04avLZIKAGndnaxaX5IhrFanztZXpqM2K0dl?= =?us-ascii?Q?Bq7g29meFh1P2CIEqJrFIqFc1P/w53mOdPGIW4PpqFbrI3QRok8+9Jw8/kc+?= =?us-ascii?Q?+vcIBiLZ0o1Ln7vffOdHpbaPYaWmvTlUABszauod5Bd/RJpF3mTdrNoBlra3?= =?us-ascii?Q?gtUUIieruiGvOzMqnvlHP5nRc+PL1HFkRyPMKyAMU8qNxLgkmyLAmRcKi0RQ?= =?us-ascii?Q?KxzBrmA++r2Ena8JFk1MYY19eYsVQBc6q4jqWKlcDptr1IkjlIsGzfjfh+BC?= =?us-ascii?Q?XjjLKP+ilpEUeNRs+8/d19L+YU9dlmSNAKyC7lbtWVxA5kZ1w1CTShJrGExi?= =?us-ascii?Q?RiQ44p85ZOPeFWRr8aLXPtHdE3mRlxsozs9aQcsdOHZUVOhvYYOHE7vo2mG+?= =?us-ascii?Q?lvCcOMBN90jllPkR4EAaZpyFgMzY+V4xK4G7ZnwWDLRQ6S5KSpRQWWPlUotz?= =?us-ascii?Q?ahu8wJa64xSyT4JUwhRryS//FLQ6X+FoggAqB+Rs5h9ImJOhxjVoCcZUo5gJ?= =?us-ascii?Q?kvyL/JKTvfg8iYDlDN/S3GYTTP40P7oUqz9FhNnNBPeUpMzcQ2kFx54wyYGr?= =?us-ascii?Q?EhUirkmpjOHjSeyYnab9PuE9/OM++k7yRdQ9s78zQX3XhBX2XSx8ytdzdksi?= =?us-ascii?Q?RJTf4wY=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230031)(1800799015)(82310400017)(36860700004)(376005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jun 2024 10:49:55.1578 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 89d06738-206f-4076-e6db-08dc83bae7ae X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B074.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7854 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org For ASO max allocations in non-template mode, Read FW capabilities instead of using consts. Signed-off-by: Maayan Kashani --- drivers/net/mlx5/mlx5.h | 17 ++++++++++++----- drivers/net/mlx5/mlx5_flow_hw.c | 13 +++++++++---- drivers/net/mlx5/mlx5_flow_meter.c | 25 +++++++++++++++++++++---- 3 files changed, 42 insertions(+), 13 deletions(-) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 67986a00b4..e635907c52 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -792,12 +792,18 @@ struct mlx5_dev_shared_port { /* Only yellow color valid. */ #define MLX5_MTR_POLICY_MODE_OY 3 +/* Max number of meters. */ +#define MLX5_MTR_MAX(priv) (mlx5_flow_mtr_max_get(priv)) /* Max number of meters allocated in non template mode. */ -#define MLX5_MTR_NT_MAX (1 << 23) -/* Max number of connection tracking allocated in non template mode */ -#define MLX5_CT_NT_MAX (1 << 23) -/* Max number of counters allocated in non template mode */ -#define MLX5_CNT_MAX (1 << 23) +#define MLX5_MTR_NT_MAX(priv) (MLX5_MTR_MAX(priv) >> 1) +/* Max number of connection tracking. */ +#define MLX5_CT_MAX(priv) (1 << (priv)->sh->cdev->config.hca_attr.log_max_conn_track_offload) +/* Max number of connection tracking allocated in non template mode. */ +#define MLX5_CT_NT_MAX(priv) (MLX5_CT_MAX(priv) >> 1) +/* Max number of counters. */ +#define MLX5_CNT_MAX(priv) ((priv)->sh->hws_max_nb_counters) +/* Max number of counters allocated in non template mode. */ +#define MLX5_CNT_NT_MAX(priv) (MLX5_CNT_MAX(priv) >> 1) enum mlx5_meter_domain { MLX5_MTR_DOMAIN_INGRESS, @@ -2423,6 +2429,7 @@ mlx5_flow_meter_hierarchy_get_final_policy(struct rte_eth_dev *dev, int mlx5_flow_meter_flush(struct rte_eth_dev *dev, struct rte_mtr_error *error); void mlx5_flow_meter_rxq_flush(struct rte_eth_dev *dev); +uint32_t mlx5_flow_mtr_max_get(struct mlx5_priv *priv); /* mlx5_os.c */ diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 41f20ed222..3022a86344 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -12522,6 +12522,7 @@ static int flow_hw_ensure_action_pools_allocated(struct rte_eth_dev *dev, bool actions_end = false; struct mlx5_priv *priv = dev->data->dev_private; int ret; + uint obj_num; for (; !actions_end; actions++) { switch ((int)actions->type) { @@ -12530,7 +12531,8 @@ static int flow_hw_ensure_action_pools_allocated(struct rte_eth_dev *dev, if (!priv->hws_age_req) { /* If no counters were previously allocated. */ if (!priv->hws_cpool) { - ret = mlx5_hws_cnt_pool_create(dev, MLX5_CNT_MAX, + obj_num = MLX5_CNT_NT_MAX(priv); + ret = mlx5_hws_cnt_pool_create(dev, obj_num, priv->nb_queue, NULL); if (ret) goto err; @@ -12548,7 +12550,8 @@ static int flow_hw_ensure_action_pools_allocated(struct rte_eth_dev *dev, case RTE_FLOW_ACTION_TYPE_COUNT: /* If no counters were previously allocated. */ if (!priv->hws_cpool) { - ret = mlx5_hws_cnt_pool_create(dev, MLX5_CNT_MAX, + obj_num = MLX5_CNT_NT_MAX(priv); + ret = mlx5_hws_cnt_pool_create(dev, obj_num, priv->nb_queue, NULL); if (ret) goto err; @@ -12557,7 +12560,8 @@ static int flow_hw_ensure_action_pools_allocated(struct rte_eth_dev *dev, case RTE_FLOW_ACTION_TYPE_CONNTRACK: /* If no CT were previously allocated. */ if (!priv->hws_ctpool) { - ret = mlx5_flow_ct_init(dev, MLX5_CT_NT_MAX, priv->nb_queue); + obj_num = MLX5_CT_NT_MAX(priv); + ret = mlx5_flow_ct_init(dev, obj_num, priv->nb_queue); if (ret) goto err; } @@ -12565,7 +12569,8 @@ static int flow_hw_ensure_action_pools_allocated(struct rte_eth_dev *dev, case RTE_FLOW_ACTION_TYPE_METER_MARK: /* If no meters were previously allocated. */ if (!priv->hws_mpool) { - ret = mlx5_flow_meter_init(dev, MLX5_MTR_NT_MAX, 0, 0, + obj_num = MLX5_MTR_NT_MAX(priv); + ret = mlx5_flow_meter_init(dev, obj_num, 0, 0, priv->nb_queue); if (ret) goto err; diff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c index da3289b218..19d8607070 100644 --- a/drivers/net/mlx5/mlx5_flow_meter.c +++ b/drivers/net/mlx5/mlx5_flow_meter.c @@ -704,6 +704,26 @@ mlx5_flow_meter_param_fill(struct mlx5_flow_meter_profile *fmp, return 0; } +/** + * Callback to get MTR maximum objects number. + * + * @param[in] priv + * Pointer to Ethernet device. + * + * @return + * Max number of meters. + */ +uint32_t +mlx5_flow_mtr_max_get(struct mlx5_priv *priv) +{ + struct mlx5_hca_qos_attr *qattr = &priv->sh->cdev->config.hca_attr.qos; + + /* Max number of meters. */ + return ((priv->sh->meter_aso_en) ? + 1 << (qattr->log_max_num_meter_aso + 1) : + qattr->log_max_flow_meter); +} + /** * Callback to get MTR capabilities. * @@ -730,14 +750,11 @@ mlx5_flow_mtr_cap_get(struct rte_eth_dev *dev, RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL, "Meter is not supported"); memset(cap, 0, sizeof(*cap)); + cap->n_max = mlx5_flow_mtr_max_get(priv); if (priv->sh->meter_aso_en) { - /* 2 meters per one ASO cache line. */ - cap->n_max = 1 << (qattr->log_max_num_meter_aso + 1); cap->srtcm_rfc2697_packet_mode_supported = 1; cap->trtcm_rfc2698_packet_mode_supported = 1; cap->trtcm_rfc4115_packet_mode_supported = 1; - } else { - cap->n_max = 1 << qattr->log_max_flow_meter; } cap->srtcm_rfc2697_byte_mode_supported = 1; cap->trtcm_rfc2698_byte_mode_supported = 1; -- 2.25.1