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From: Maayan Kashani <mkashani@nvidia.com>
To: <dev@dpdk.org>
Cc: <mkashani@nvidia.com>, <dsosnowski@nvidia.com>,
	<rasland@nvidia.com>, Gregory Etelson <getelson@nvidia.com>,
	Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
	Ori Kam <orika@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>,
	Matan Azrad <matan@nvidia.com>
Subject: [PATCH v4 3/6] net/mlx5: support indirect actions in non-template setup
Date: Thu, 6 Jun 2024 13:12:11 +0300	[thread overview]
Message-ID: <20240606101214.172057-4-mkashani@nvidia.com> (raw)
In-Reply-To: <20240606101214.172057-1-mkashani@nvidia.com>

From: Gregory Etelson <getelson@nvidia.com>

Add support for the RSS, AGE, COUNT and CONNTRACK indirect flow
actions for the non-template flow rules.

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_hw.c | 111 +++++++++++++++++++++++++-------
 1 file changed, 89 insertions(+), 22 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 7984bf2f73..9f43fbfb35 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -12431,6 +12431,91 @@ flow_hw_encap_decap_resource_register
 	return 0;
 }
 
+static enum rte_flow_action_type
+flow_nta_get_indirect_action_type(const struct rte_flow_action *action)
+{
+	switch (MLX5_INDIRECT_ACTION_TYPE_GET(action->conf)) {
+	case MLX5_INDIRECT_ACTION_TYPE_RSS:
+		return RTE_FLOW_ACTION_TYPE_RSS;
+	case MLX5_INDIRECT_ACTION_TYPE_AGE:
+		return RTE_FLOW_ACTION_TYPE_AGE;
+	case MLX5_INDIRECT_ACTION_TYPE_COUNT:
+		return RTE_FLOW_ACTION_TYPE_COUNT;
+	case MLX5_INDIRECT_ACTION_TYPE_CT:
+		return RTE_FLOW_ACTION_TYPE_CONNTRACK;
+	default:
+		break;
+	}
+	return RTE_FLOW_ACTION_TYPE_END;
+}
+
+static void
+flow_nta_set_mh_mask_conf(const struct rte_flow_action_modify_field *action_conf,
+			  struct rte_flow_action_modify_field *mask_conf)
+{
+	memset(mask_conf, 0xff, sizeof(*mask_conf));
+	mask_conf->operation = action_conf->operation;
+	mask_conf->dst.field = action_conf->dst.field;
+	mask_conf->src.field = action_conf->src.field;
+}
+
+union actions_conf {
+	struct rte_flow_action_modify_field modify_field;
+	struct rte_flow_action_raw_encap raw_encap;
+	struct rte_flow_action_vxlan_encap vxlan_encap;
+	struct rte_flow_action_nvgre_encap nvgre_encap;
+};
+
+static int
+flow_nta_build_template_mask(const struct rte_flow_action actions[],
+			     struct rte_flow_action masks[MLX5_HW_MAX_ACTS],
+			     union actions_conf mask_conf[MLX5_HW_MAX_ACTS])
+{
+	int i;
+
+	for (i = 0; i == 0 || actions[i - 1].type != RTE_FLOW_ACTION_TYPE_END; i++) {
+		const struct rte_flow_action *action = &actions[i];
+		struct rte_flow_action *mask = &masks[i];
+		union actions_conf *conf = &mask_conf[i];
+
+		mask->type = action->type;
+		switch (action->type) {
+		case RTE_FLOW_ACTION_TYPE_INDIRECT:
+			mask->type = flow_nta_get_indirect_action_type(action);
+			if (!mask->type)
+				return -EINVAL;
+			break;
+		case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
+			flow_nta_set_mh_mask_conf(action->conf, (void *)conf);
+			mask->conf = conf;
+			break;
+		case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
+			/* This mask will set this action as shared. */
+			memset(conf, 0xff, sizeof(struct rte_flow_action_raw_encap));
+			mask->conf = conf;
+			break;
+		case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
+			/* This mask will set this action as shared. */
+			conf->vxlan_encap.definition =
+				((const struct rte_flow_action_vxlan_encap *)
+					action->conf)->definition;
+			mask->conf = conf;
+			break;
+		case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
+			/* This mask will set this action as shared. */
+			conf->nvgre_encap.definition =
+				((const struct rte_flow_action_nvgre_encap *)
+					action->conf)->definition;
+			mask->conf = conf;
+			break;
+		default:
+			break;
+		}
+	}
+	return 0;
+#undef NTA_CHECK_CONF_BUF_SIZE
+}
+
 static int
 flow_hw_translate_flow_actions(struct rte_eth_dev *dev,
 			  const struct rte_flow_attr *attr,
@@ -12454,30 +12539,12 @@ flow_hw_translate_flow_actions(struct rte_eth_dev *dev,
 		.transfer = attr->transfer,
 	};
 	struct rte_flow_action masks[MLX5_HW_MAX_ACTS];
-	struct rte_flow_action_raw_encap encap_conf;
-	struct rte_flow_action_modify_field mh_conf[MLX5_HW_MAX_ACTS];
+	union actions_conf mask_conf[MLX5_HW_MAX_ACTS];
 
-	memset(&masks, 0, sizeof(masks));
-	int i = -1;
-	do {
-		i++;
-		masks[i].type = actions[i].type;
-		if (masks[i].type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
-			memset(&encap_conf, 0x00, sizeof(encap_conf));
-			encap_conf.size = ((const struct rte_flow_action_raw_encap *)
-				(actions[i].conf))->size;
-			masks[i].conf = &encap_conf;
-		}
-		if (masks[i].type == RTE_FLOW_ACTION_TYPE_MODIFY_FIELD) {
-			const struct rte_flow_action_modify_field *conf = actions[i].conf;
-			memset(&mh_conf, 0xff, sizeof(mh_conf[i]));
-			mh_conf[i].operation = conf->operation;
-			mh_conf[i].dst.field = conf->dst.field;
-			mh_conf[i].src.field = conf->src.field;
-			masks[i].conf = &mh_conf[i];
-		}
-	} while (masks[i].type != RTE_FLOW_ACTION_TYPE_END);
 	RTE_SET_USED(action_flags);
+	memset(masks, 0, sizeof(masks));
+	memset(mask_conf, 0, sizeof(mask_conf));
+	flow_nta_build_template_mask(actions, masks, mask_conf);
 	/* The group in the attribute translation was done in advance. */
 	ret = __translate_group(dev, attr, external, attr->group, &src_group, error);
 	if (ret)
-- 
2.21.0


  parent reply	other threads:[~2024-06-06 10:12 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-02 10:28 [PATCH 1/6] net/mlx5: update NTA rule pattern and actions flags Maayan Kashani
2024-06-03  8:10 ` [PATCH v2 16/34] " Maayan Kashani
2024-06-03  8:10   ` [PATCH v2 17/34] net/mlx5: support RSS expansion in non-template HWS setup Maayan Kashani
2024-06-03  8:10   ` [PATCH v2 18/34] net/mlx5: support indirect actions in non-template setup Maayan Kashani
2024-06-03  8:10   ` [PATCH v2 19/34] net/mlx5: update ASO resources " Maayan Kashani
2024-06-03  8:10   ` [PATCH v2 20/34] net/mlx5: update HWS ASO actions validation Maayan Kashani
2024-06-03  8:10   ` [PATCH v2 21/34] net/mlx5: support FDB in non-template mode Maayan Kashani
2024-06-03 10:52 ` [PATCH v3 1/6] net/mlx5: update NTA rule pattern and actions flags Maayan Kashani
2024-06-03 10:52   ` [PATCH v3 2/6] net/mlx5: support RSS expansion in non-template HWS setup Maayan Kashani
2024-06-03 10:52   ` [PATCH v3 3/6] net/mlx5: support indirect actions in non-template setup Maayan Kashani
2024-06-03 10:52   ` [PATCH v3 4/6] net/mlx5: update ASO resources " Maayan Kashani
2024-06-03 10:52   ` [PATCH v3 5/6] net/mlx5: update HWS ASO actions validation Maayan Kashani
2024-06-03 10:52   ` [PATCH v3 6/6] net/mlx5: support FDB in non-template mode Maayan Kashani
2024-06-06 10:12   ` [PATCH v4 0/6] non-template pmd advanced Maayan Kashani
2024-06-06 10:12     ` [PATCH v4 1/6] net/mlx5: update NTA rule pattern and actions flags Maayan Kashani
2024-06-06 10:12     ` [PATCH v4 2/6] net/mlx5: support RSS expansion in non-template HWS setup Maayan Kashani
2024-06-06 10:12     ` Maayan Kashani [this message]
2024-06-06 10:12     ` [PATCH v4 4/6] net/mlx5: update ASO resources in non-template setup Maayan Kashani
2024-06-06 10:12     ` [PATCH v4 5/6] net/mlx5: update HWS ASO actions validation Maayan Kashani
2024-06-06 10:12     ` [PATCH v4 6/6] net/mlx5: support FDB in non-template mode Maayan Kashani
2024-06-10  8:50     ` [PATCH v5 1/6] net/mlx5: update NTA rule pattern and actions flags Maayan Kashani
2024-06-10  8:50       ` [PATCH v5 2/6] net/mlx5: support RSS expansion in non-template HWS setup Maayan Kashani
2024-06-10  8:50       ` [PATCH v5 3/6] net/mlx5: support indirect actions in non-template setup Maayan Kashani
2024-06-10  8:50       ` [PATCH v5 4/6] net/mlx5: update ASO resources " Maayan Kashani
2024-06-10  8:50       ` [PATCH v5 5/6] net/mlx5: update HWS ASO actions validation Maayan Kashani
2024-06-10  8:50       ` [PATCH v5 6/6] net/mlx5: support FDB in non-template mode Maayan Kashani
2024-06-11 11:20       ` [PATCH v5 1/6] net/mlx5: update NTA rule pattern and actions flags Raslan Darawsheh

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