From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EF07645450; Wed, 19 Jun 2024 00:58:16 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C66A340291; Wed, 19 Jun 2024 00:58:16 +0200 (CEST) Received: from mail-lj1-f179.google.com (mail-lj1-f179.google.com [209.85.208.179]) by mails.dpdk.org (Postfix) with ESMTP id 10C864021D for ; Wed, 19 Jun 2024 00:58:15 +0200 (CEST) Received: by mail-lj1-f179.google.com with SMTP id 38308e7fff4ca-2eabd22d3f4so70797701fa.1 for ; Tue, 18 Jun 2024 15:58:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1718751494; x=1719356294; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NGIup+T2JynH/QFL5OCO45mug/AQ4rh0uBH/lZPsamI=; b=Az+p0P/QKidbXbsxtKHCxV/ZNRpmElDvufKx4ON83bCraLItMP3A8gLDVuL+Clw2x2 WVAhvxirzaWhDm36U+0DmjNjiZVOhP+gdHC+o7t+A0QMOjWeSbbz/Gea6DG006SlxRtF syXKysNaKbKeP0ATsDnGkw3XMi6//uu5e8NDodxkLJmFtvsDlhwkp4iCjYEMJ99720Hf 3daSVn6TXDpQWE88vSWmEGYEDbkzJ6VpDSgWwSjdKsPK/tCtKNFVWl5U6KPiOoVJjWsc Z0MZm4JB8fxWwFUvcdhhYsL0knTW3h5emBn6WuswRnschhxkrAOV/aOcDCCVe5PRdmCQ AblQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718751494; x=1719356294; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NGIup+T2JynH/QFL5OCO45mug/AQ4rh0uBH/lZPsamI=; b=JW25x5abhr5OO8a6CQ08N5b+Lfd3BoCTxGyj99nOW7PQF17rsiYxOyjqnjph5bcAMP fV7zKcri//6UvZUHGRF3+nBlVF0qNk+KEP71TwiS0gUb4dJZ4piljsPowXnRrOSr7dXl fmp7bKk2h2VPauACAcAOjZEl8Kg2BUj6u22p0e6BVeg5FcvFD69wusr5rIsMPd4cAUUW 6GxWqHwYhnVdHiE3pipi9TtWPKHroj44++Ss9981LezYJmoCvw+YP46wcXyk+Fz1FlEQ Nvdm3iXSMypAog6NjO9fPyocgKDUjvneNHoNrCH1dr690VgeYB0QW0JPas0byCBKjryG 7EfQ== X-Gm-Message-State: AOJu0YyOoN+9Qt+2nxIaB/E3OD6U28BmoKmxPbpARc8n+xuKE3Z1E6hN YvuI0WYNMFljwheJE25C8CtyDSTFrHbaWHuVxNvsDwTuTVZF/zGG X-Google-Smtp-Source: AGHT+IH7sYSNCIs1cgZC4d6aY/6zV6x558FcSGw6Ic0EIv6F0c0hiwmh4UITNqR/44N3VBwAq7aIGw== X-Received: by 2002:a2e:9d96:0:b0:2eb:e505:ebea with SMTP id 38308e7fff4ca-2ec3ced5ad7mr5944501fa.25.1718751494006; Tue, 18 Jun 2024 15:58:14 -0700 (PDT) Received: from saturn.. ([85.174.194.30]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ec05c783e3sm18032881fa.77.2024.06.18.15.58.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Jun 2024 15:58:13 -0700 (PDT) From: Igor Gutorov To: viacheslavo@nvidia.com Cc: dev@dpdk.org, dsosnowski@nvidia.com, igootorov@gmail.com, matan@nvidia.com, orika@nvidia.com, suanmingm@nvidia.com Subject: [PATCH v2 0/1] net/mlx5: fix incorrect rx/tx descriptor limitations in rte_eth_dev_info Date: Wed, 19 Jun 2024 01:56:41 +0300 Message-ID: <20240618225642.1036624-1-igootorov@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi, Slava > 1. The absolute max descriptor number supported by ConnectX hardware is 32768. > 2. The actual max descriptor number supported by the port (and its related representors) > reported in log_max_wq_sz in HCA.caps. This value should be queried and save in mlx5_devx_cmd_query_hca_attr() routine. > 3. mlx5_rx_queue_pre_setup() should check requested descriptor number and reject if it exceeds log_max_wq_sz Thank you for the guidelines! I've also added the same check to mlx5_tx_queue_pre_setup(), I'm assuming log_max_wq_sz can be used for both RX and TX. Is an `int` appropriate for `log_max_wq_sz`? Seems like a `uint8_t` is sufficient, but I've left it an `int` for consistency with the other `log_max_*` values. Also, I've noticed a similar issue with MTU, it is also reported as 65535 in `rte_eth_dev_info.max_mtu`. I'd like to send a separate patch to fix that too. What's the procedure for reading max supported MTU? > 4. Please, format your patch according to the "fix" template. I've reworded the commit message a little bit. But I don't see these issues on Bugzilla, I've stumbled upon them independently. If you'd like the bug reports to be created, let me know. Sincerely, Igor Igor Gutorov (1): net/mlx5: fix incorrect rx/tx descriptor limitations in rte_eth_dev_info drivers/common/mlx5/mlx5_devx_cmds.c | 1 + drivers/common/mlx5/mlx5_devx_cmds.h | 1 + drivers/net/mlx5/mlx5_ethdev.c | 4 ++++ drivers/net/mlx5/mlx5_rxq.c | 8 ++++++++ drivers/net/mlx5/mlx5_txq.c | 8 ++++++++ 5 files changed, 22 insertions(+) -- 2.45.2