From: Serhii Iliushyk <sil-plv@napatech.com>
To: dev@dpdk.org
Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com,
andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com
Subject: [PATCH v4 06/23] net/ntnic: add NT NIC driver dependencies
Date: Wed, 26 Jun 2024 21:55:16 +0200 [thread overview]
Message-ID: <20240626195545.1793419-6-sil-plv@napatech.com> (raw)
In-Reply-To: <20240626195545.1793419-1-sil-plv@napatech.com>
Add structures and interfaces specific for NT smartNiC
Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com>
---
drivers/net/ntnic/include/ntdrv_4ga.h | 17 ++
drivers/net/ntnic/include/ntos_drv.h | 33 ++++
drivers/net/ntnic/include/ntos_system.h | 21 ++
drivers/net/ntnic/meson.build | 1 +
drivers/net/ntnic/ntnic_ethdev.c | 243 +++++++++++++++++++++++-
5 files changed, 314 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ntnic/include/ntdrv_4ga.h
create mode 100644 drivers/net/ntnic/include/ntos_drv.h
create mode 100644 drivers/net/ntnic/include/ntos_system.h
diff --git a/drivers/net/ntnic/include/ntdrv_4ga.h b/drivers/net/ntnic/include/ntdrv_4ga.h
new file mode 100644
index 0000000000..bcb7ddc242
--- /dev/null
+++ b/drivers/net/ntnic/include/ntdrv_4ga.h
@@ -0,0 +1,17 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTDRV_4GA_H__
+#define __NTDRV_4GA_H__
+
+
+typedef struct ntdrv_4ga_s {
+ uint32_t pciident;
+ char *p_drv_name;
+
+ volatile bool b_shutdown;
+} ntdrv_4ga_t;
+
+#endif /* __NTDRV_4GA_H__ */
diff --git a/drivers/net/ntnic/include/ntos_drv.h b/drivers/net/ntnic/include/ntos_drv.h
new file mode 100644
index 0000000000..aed9e83c8d
--- /dev/null
+++ b/drivers/net/ntnic/include/ntos_drv.h
@@ -0,0 +1,33 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTOS_DRV_H__
+#define __NTOS_DRV_H__
+
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <inttypes.h>
+
+#include <rte_ether.h>
+
+#define NUM_MAC_ADDRS_PER_PORT (16U)
+#define NUM_MULTICAST_ADDRS_PER_PORT (16U)
+
+#define NUM_ADAPTER_MAX (8)
+#define NUM_ADAPTER_PORTS_MAX (128)
+
+struct pmd_internals {
+ const struct rte_pci_device *pci_dev;
+ char name[20];
+ int n_intf_no;
+ int if_index;
+ uint32_t port;
+ uint32_t port_id;
+ struct drv_s *p_drv;
+ struct pmd_internals *next;
+};
+
+#endif /* __NTOS_DRV_H__ */
diff --git a/drivers/net/ntnic/include/ntos_system.h b/drivers/net/ntnic/include/ntos_system.h
new file mode 100644
index 0000000000..74d7edf313
--- /dev/null
+++ b/drivers/net/ntnic/include/ntos_system.h
@@ -0,0 +1,21 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTOS_SYSTEM_H__
+#define __NTOS_SYSTEM_H__
+
+#include "ntdrv_4ga.h"
+
+struct drv_s {
+ int adapter_no;
+ struct rte_pci_device *p_dev;
+ struct ntdrv_4ga_s ntdrv;
+
+ int n_eth_dev_init_count;
+ int probe_finished;
+ int setup_finished;
+};
+
+#endif /* __NTOS_SYSTEM_H__ */
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 145f586a92..ff5dd81a37 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -15,6 +15,7 @@ cflags += [
# includes
includes = [
include_directories('.'),
+ include_directories('include'),
include_directories('ntlog/include'),
include_directories('ntutil/include'),
]
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c
index a4e32c30fa..7571fce12e 100644
--- a/drivers/net/ntnic/ntnic_ethdev.c
+++ b/drivers/net/ntnic/ntnic_ethdev.c
@@ -11,37 +11,240 @@
#include "ntlog.h"
+#include "ntdrv_4ga.h"
+#include "ntos_drv.h"
+#include "ntos_system.h"
#include "ntnic_vfio.h"
#include "nt_util.h"
#define EXCEPTION_PATH_HID 0
/* Global static variables: */
+static rte_spinlock_t hwlock = RTE_SPINLOCK_INITIALIZER;
+
+/*
+ * Store and get adapter info
+ */
+
+static struct drv_s *_g_p_drv[NUM_ADAPTER_MAX] = { NULL };
+
+static void
+store_pdrv(struct drv_s *p_drv)
+{
+ if (p_drv->adapter_no > NUM_ADAPTER_MAX) {
+ NT_LOG(ERR, NTNIC,
+ "Internal error adapter number %u out of range. Max number of adapters: %u\n",
+ p_drv->adapter_no, NUM_ADAPTER_MAX);
+ return;
+ }
+
+ if (_g_p_drv[p_drv->adapter_no] != 0) {
+ NT_LOG(WRN, NTNIC,
+ "Overwriting adapter structure for PCI " PCIIDENT_PRINT_STR
+ " with adapter structure for PCI " PCIIDENT_PRINT_STR "\n",
+ PCIIDENT_TO_DOMAIN(_g_p_drv[p_drv->adapter_no]->ntdrv.pciident),
+ PCIIDENT_TO_BUSNR(_g_p_drv[p_drv->adapter_no]->ntdrv.pciident),
+ PCIIDENT_TO_DEVNR(_g_p_drv[p_drv->adapter_no]->ntdrv.pciident),
+ PCIIDENT_TO_FUNCNR(_g_p_drv[p_drv->adapter_no]->ntdrv.pciident),
+ PCIIDENT_TO_DOMAIN(p_drv->ntdrv.pciident),
+ PCIIDENT_TO_BUSNR(p_drv->ntdrv.pciident),
+ PCIIDENT_TO_DEVNR(p_drv->ntdrv.pciident),
+ PCIIDENT_TO_FUNCNR(p_drv->ntdrv.pciident));
+ }
+
+ rte_spinlock_lock(&hwlock);
+ _g_p_drv[p_drv->adapter_no] = p_drv;
+ rte_spinlock_unlock(&hwlock);
+}
+
+static void
+clear_pdrv(struct drv_s *p_drv)
+{
+ if (p_drv->adapter_no > NUM_ADAPTER_MAX)
+ return;
+
+ rte_spinlock_lock(&hwlock);
+ _g_p_drv[p_drv->adapter_no] = NULL;
+ rte_spinlock_unlock(&hwlock);
+}
+
+static struct drv_s *
+get_pdrv_from_pci(struct rte_pci_addr addr)
+{
+ int i;
+ struct drv_s *p_drv = NULL;
+ rte_spinlock_lock(&hwlock);
+
+ for (i = 0; i < NUM_ADAPTER_MAX; i++) {
+ if (_g_p_drv[i]) {
+ if (PCIIDENT_TO_DOMAIN(_g_p_drv[i]->ntdrv.pciident) == addr.domain &&
+ PCIIDENT_TO_BUSNR(_g_p_drv[i]->ntdrv.pciident) == addr.bus) {
+ p_drv = _g_p_drv[i];
+ break;
+ }
+ }
+ }
+
+ rte_spinlock_unlock(&hwlock);
+ return p_drv;
+}
+
+static int
+eth_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *dev_info)
+{
+ struct pmd_internals *internals = (struct pmd_internals *)eth_dev->data->dev_private;
+
+ dev_info->if_index = internals->if_index;
+ dev_info->driver_name = internals->name;
+
+ return 0;
+}
+
+static int
+eth_dev_configure(struct rte_eth_dev *eth_dev)
+{
+ struct pmd_internals *internals = (struct pmd_internals *)eth_dev->data->dev_private;
+ struct drv_s *p_drv = internals->p_drv;
+
+ NT_LOG_DBGX(DEBUG, NTNIC, "Called for eth_dev %p\n", eth_dev);
+
+ p_drv->probe_finished = 1;
+
+ /* The device is ALWAYS running promiscuous mode. */
+ eth_dev->data->promiscuous ^= ~eth_dev->data->promiscuous;
+ return 0;
+}
+
+static int
+eth_dev_start(struct rte_eth_dev *eth_dev)
+{
+ struct pmd_internals *internals = (struct pmd_internals *)eth_dev->data->dev_private;
+
+ NT_LOG_DBGX(DEBUG, NTNIC, "Port %u, %u\n", internals->n_intf_no, internals->if_index);
+
+ return 0;
+}
+
+static int
+eth_dev_stop(struct rte_eth_dev *eth_dev)
+{
+ struct pmd_internals *internals = (struct pmd_internals *)eth_dev->data->dev_private;
+
+ NT_LOG_DBGX(DEBUG, NTNIC, "Port %u, %u\n",
+ internals->n_intf_no, internals->if_index);
+
+ eth_dev->data->dev_link.link_status = RTE_ETH_LINK_DOWN;
+ return 0;
+}
+
+static void
+drv_deinit(struct drv_s *p_drv)
+{
+ if (p_drv == NULL)
+ return;
+ /*
+ * Mark the global pdrv for cleared. Used by some threads to terminate.
+ * 1 second to give the threads a chance to see the termonation.
+ */
+ clear_pdrv(p_drv);
+ nt_os_wait_usec(1000000);
+
+ /* clean memory */
+ rte_free(p_drv);
+ p_drv = NULL;
+}
+
+static int
+eth_dev_close(struct rte_eth_dev *eth_dev)
+{
+ struct pmd_internals *internals = (struct pmd_internals *)eth_dev->data->dev_private;
+ struct drv_s *p_drv = internals->p_drv;
+
+ internals->p_drv = NULL;
+
+ rte_free(internals);
+ internals = NULL;
+ eth_dev->data->dev_private = NULL;
+ eth_dev->data->mac_addrs = NULL;
+
+ rte_eth_dev_release_port(eth_dev);
+
+ /* decrease initialized ethernet devices */
+ p_drv->n_eth_dev_init_count--;
+
+ /*
+ * rte_pci_dev has no private member for p_drv
+ * wait until all rte_eth_dev's are closed - then close adapters via p_drv
+ */
+ if (!p_drv->n_eth_dev_init_count && p_drv)
+ drv_deinit(p_drv);
+
+ return 0;
+}
+
+static struct eth_dev_ops nthw_eth_dev_ops = {
+ .dev_configure = eth_dev_configure,
+ .dev_start = eth_dev_start,
+ .dev_stop = eth_dev_stop,
+ .dev_close = eth_dev_close,
+ .dev_infos_get = eth_dev_infos_get,
+};
static int
nthw_pci_dev_init(struct rte_pci_device *pci_dev)
{
nt_vfio_init();
+ struct drv_s *p_drv;
+ ntdrv_4ga_t *p_nt_drv;
uint32_t n_port_mask = -1; /* All ports enabled by default */
+ uint32_t nb_rx_queues = 1;
+ uint32_t nb_tx_queues = 1;
int n_phy_ports;
NT_LOG_DBGX(DEBUG, NTNIC, "Dev %s PF #%i Init : %02x:%02x:%i\n", pci_dev->name,
pci_dev->addr.function, pci_dev->addr.bus, pci_dev->addr.devid,
pci_dev->addr.function);
+ /* alloc */
+ p_drv = rte_zmalloc_socket(pci_dev->name, sizeof(struct drv_s), RTE_CACHE_LINE_SIZE,
+ pci_dev->device.numa_node);
+
+ if (!p_drv) {
+ NT_LOG_DBGX(ERR, NTNIC, "%s: error %d\n",
+ (pci_dev->name[0] ? pci_dev->name : "NA"), -1);
+ return -1;
+ }
+
/* Setup VFIO context */
int vfio = nt_vfio_setup(pci_dev);
if (vfio < 0) {
NT_LOG_DBGX(ERR, TNIC, "%s: vfio_setup error %d\n",
(pci_dev->name[0] ? pci_dev->name : "NA"), -1);
+ rte_free(p_drv);
return -1;
}
+ /* context */
+ p_nt_drv = &p_drv->ntdrv;
+
+ p_drv->p_dev = pci_dev;
+
+ /* Set context for NtDrv */
+ p_nt_drv->pciident = BDF_TO_PCIIDENT(pci_dev->addr.domain, pci_dev->addr.bus,
+ pci_dev->addr.devid, pci_dev->addr.function);
+
+
+ p_nt_drv->b_shutdown = false;
+
+ /* store context */
+ store_pdrv(p_drv);
+
n_phy_ports = 0;
for (int n_intf_no = 0; n_intf_no < n_phy_ports; n_intf_no++) {
+ struct pmd_internals *internals = NULL;
struct rte_eth_dev *eth_dev = NULL;
char name[32];
@@ -50,6 +253,33 @@ nthw_pci_dev_init(struct rte_pci_device *pci_dev)
snprintf(name, sizeof(name), "ntnic%d", n_intf_no);
+ internals = rte_zmalloc_socket(name, sizeof(struct pmd_internals),
+ RTE_CACHE_LINE_SIZE, pci_dev->device.numa_node);
+
+ if (!internals) {
+ NT_LOG_DBGX(ERR, NTNIC, "%s: %s: error=%d\n",
+ (pci_dev->name[0] ? pci_dev->name : "NA"), name, -1);
+ return -1;
+ }
+
+ internals->pci_dev = pci_dev;
+ internals->n_intf_no = n_intf_no;
+ internals->if_index = n_intf_no;
+
+
+ /* Setup queue_ids */
+ if (nb_rx_queues > 1) {
+ NT_LOG(DBG, NTNIC,
+ "(%i) NTNIC configured with Rx multi queues. %i queues\n",
+ 0 /*port*/, nb_rx_queues);
+ }
+
+ if (nb_tx_queues > 1) {
+ NT_LOG(DBG, NTNIC,
+ "(%i) NTNIC configured with Tx multi queues. %i queues\n",
+ 0 /*port*/, nb_tx_queues);
+ }
+
eth_dev = rte_eth_dev_allocate(name); /* TODO: name */
if (!eth_dev) {
@@ -61,6 +291,11 @@ nthw_pci_dev_init(struct rte_pci_device *pci_dev)
NT_LOG_DBGX(DEBUG, NTNIC, "eth_dev %p, port_id %u, if_index %u\n",
eth_dev, eth_dev->data->port_id, n_intf_no);
+ /* connect structs */
+ internals->p_drv = p_drv;
+ eth_dev->data->dev_private = internals;
+
+ internals->port_id = eth_dev->data->port_id;
struct rte_eth_link pmd_link;
pmd_link.link_speed = RTE_ETH_SPEED_NUM_NONE;
@@ -71,7 +306,7 @@ nthw_pci_dev_init(struct rte_pci_device *pci_dev)
eth_dev->device = &pci_dev->device;
eth_dev->data->dev_link = pmd_link;
eth_dev->data->numa_node = pci_dev->device.numa_node;
- eth_dev->dev_ops = NULL;
+ eth_dev->dev_ops = &nthw_eth_dev_ops;
eth_dev->state = RTE_ETH_DEV_ATTACHED;
rte_eth_copy_pci_info(eth_dev, pci_dev);
@@ -79,8 +314,11 @@ nthw_pci_dev_init(struct rte_pci_device *pci_dev)
eth_dev_pci_specific_init(eth_dev, pci_dev);
/* increase initialized ethernet devices - PF */
+ p_drv->n_eth_dev_init_count++;
}
+ p_drv->setup_finished = 1;
+
return 0;
}
@@ -156,6 +394,9 @@ nthw_pci_remove(struct rte_pci_device *pci_dev)
{
NT_LOG_DBGX(DEBUG, NTNIC);
+ struct drv_s *p_drv = get_pdrv_from_pci(pci_dev->addr);
+ drv_deinit(p_drv);
+
return rte_eth_dev_pci_generic_remove(pci_dev, nthw_pci_dev_deinit);
}
--
2.45.0
next prev parent reply other threads:[~2024-06-26 19:56 UTC|newest]
Thread overview: 101+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-30 14:48 [PATCH v1 01/17] net/ntnic: Add registers for NapaTech SmartNiC Serhii Iliushyk
2024-05-30 14:48 ` [PATCH v1 02/17] net/ntnic: add core platform functionality Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 03/17] net/ntnic: add interfaces for " Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 04/17] net/ntnic: add FPGA model implementation Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 05/17] net/ntnic: add NTNIC adapter interfaces Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 06/17] net/ntnic: add interfaces for PMD driver modules Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 07/17] net/ntnic: add API " Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 08/17] net/ntnic: add interfaces for flow API engine Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 09/17] net/ntnic: add VFIO module Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 10/17] net/ntnic: add Logs and utilities implementation Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 11/17] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 12/17] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 13/17] net/ntnic: add adapter initialization Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 14/17] net/ntnic: add adapter initialization API Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 15/17] net/ntnic: add link management module Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 16/17] net/ntnic: add link 100G module Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 17/17] net/ntnic: add NIM module Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 01/17] net/ntnic: Add registers for NapaTech SmartNiC Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 02/17] net/ntnic: add core platform functionality Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 03/17] net/ntnic: add interfaces for " Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 04/17] net/ntnic: add FPGA model implementation Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 05/17] net/ntnic: add NTNIC adapter interfaces Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 06/17] net/ntnic: add interfaces for PMD driver modules Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 07/17] net/ntnic: add API " Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 08/17] net/ntnic: add interfaces for flow API engine Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 09/17] net/ntnic: add VFIO module Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 10/17] net/ntnic: add Logs and utilities implementation Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 11/17] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 12/17] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 13/17] net/ntnic: add adapter initialization Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 14/17] net/ntnic: add adapter initialization API Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 15/17] net/ntnic: add link management module Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 16/17] net/ntnic: add link 100G module Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 17/17] net/ntnic: add NIM module Serhii Iliushyk
2024-06-03 16:17 ` [PATCH v3 01/17] net/ntnic: Add registers for NapaTech SmartNiC Serhii Iliushyk
2024-06-03 16:17 ` [PATCH v3 02/17] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 03/17] net/ntnic: add interfaces for " Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 04/17] net/ntnic: add FPGA model implementation Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 05/17] net/ntnic: add NTNIC adapter interfaces Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 06/17] net/ntnic: add interfaces for PMD driver modules Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 07/17] net/ntnic: add API " Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 08/17] net/ntnic: add interfaces for flow API engine Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 09/17] net/ntnic: add VFIO module Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 10/17] net/ntnic: add Logs and utilities implementation Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 11/17] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 12/17] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 13/17] net/ntnic: add adapter initialization Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 14/17] net/ntnic: add adapter initialization API Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 15/17] net/ntnic: add link management module Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 16/17] net/ntnic: add link 100G module Serhii Iliushyk
2024-06-03 16:18 ` [PATCH v3 17/17] net/ntnic: add NIM module Serhii Iliushyk
2024-06-04 10:29 ` [PATCH v3 01/17] net/ntnic: Add registers for NapaTech SmartNiC Mykola Kostenok
2024-06-07 13:03 ` Serhii Iliushyk
2024-06-12 8:50 ` Ferruh Yigit
2024-06-12 8:55 ` Ferruh Yigit
2024-06-26 19:55 ` [PATCH v4 01/23] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 02/23] net/ntnic: add logging implementation Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 03/23] net/ntnic: add minimal initialization for PCI device Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 04/23] net/ntnic: add NT utilities implementation Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 05/23] net/ntnic: add VFIO module Serhii Iliushyk
2024-06-26 19:55 ` Serhii Iliushyk [this message]
2024-06-26 19:55 ` [PATCH v4 07/23] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 08/23] net/ntnic: add adapter initialization Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 09/23] net/ntnic: add registers and FPGA model for NapaTech NIC Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 10/23] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 11/23] net/ntnic: add FPGA initialization functionality Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 12/23] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 13/23] net/ntnic: add reset module for " Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 14/23] net/ntnic: add clock profiles " Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 15/23] net/ntnic: add MAC and packet features Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 16/23] net/ntnic: add link management module Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 17/23] net/ntnic: add link 100G module Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 18/23] net/ntnic: add NIM module Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 19/23] net/ntnic: add QSFP support Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 20/23] net/ntnic: add QSFP28 support Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 21/23] net/ntnic: add GPIO PHY module Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 22/23] net/ntnic: add MAC PCS register interface module Serhii Iliushyk
2024-06-26 19:55 ` [PATCH v4 23/23] net/ntnic: add GMF (Generic MAC Feeder) module Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 01/23] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 02/23] net/ntnic: add logging implementation Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 03/23] net/ntnic: add minimal initialization for PCI device Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 04/23] net/ntnic: add NT utilities implementation Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 05/23] net/ntnic: add VFIO module Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 06/23] net/ntnic: add NT NIC driver dependencies Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 07/23] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 08/23] net/ntnic: add adapter initialization Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 09/23] net/ntnic: add registers and FPGA model for NapaTech NIC Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 10/23] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 11/23] net/ntnic: add FPGA initialization functionality Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 12/23] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 13/23] net/ntnic: add reset module for " Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 14/23] net/ntnic: add clock profiles " Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 15/23] net/ntnic: add MAC and packet features Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 16/23] net/ntnic: add link management module Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 17/23] net/ntnic: add link 100G module Serhii Iliushyk
2024-06-27 7:38 ` [PATCH v5 18/23] net/ntnic: add NIM module Serhii Iliushyk
2024-06-27 7:39 ` [PATCH v5 19/23] net/ntnic: add QSFP support Serhii Iliushyk
2024-06-27 7:39 ` [PATCH v5 20/23] net/ntnic: add QSFP28 support Serhii Iliushyk
2024-06-27 7:39 ` [PATCH v5 21/23] net/ntnic: add GPIO PHY module Serhii Iliushyk
2024-06-27 7:39 ` [PATCH v5 22/23] net/ntnic: add MAC PCS register interface module Serhii Iliushyk
2024-06-27 7:39 ` [PATCH v5 23/23] net/ntnic: add GMF (Generic MAC Feeder) module Serhii Iliushyk
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