From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A7C8845546; Tue, 2 Jul 2024 05:59:19 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EC0CD4066A; Tue, 2 Jul 2024 05:59:09 +0200 (CEST) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id DB2A140395 for ; Tue, 2 Jul 2024 05:59:07 +0200 (CEST) Received: from mail.maildlp.com (unknown [172.19.163.252]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4WCq093VfGznXjd; Tue, 2 Jul 2024 11:58:49 +0800 (CST) Received: from kwepemm600004.china.huawei.com (unknown [7.193.23.242]) by mail.maildlp.com (Postfix) with ESMTPS id 64D6718007E; Tue, 2 Jul 2024 11:59:04 +0800 (CST) Received: from localhost.localdomain (10.28.79.22) by kwepemm600004.china.huawei.com (7.193.23.242) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Tue, 2 Jul 2024 11:59:03 +0800 From: Huisong Li To: CC: , , , , , , , , , Subject: [PATCH v5 2/2] examples/l3fwd-power: add PM QoS configuration Date: Tue, 2 Jul 2024 11:50:10 +0800 Message-ID: <20240702035010.4874-3-lihuisong@huawei.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20240702035010.4874-1-lihuisong@huawei.com> References: <20240320105529.5626-1-lihuisong@huawei.com> <20240702035010.4874-1-lihuisong@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.28.79.22] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemm600004.china.huawei.com (7.193.23.242) X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add PM QoS configuration to declease the delay after sleep in case of entering deeper idle state. Signed-off-by: Huisong Li Acked-by: Morten Brørup --- examples/l3fwd-power/main.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c index fba11da7ca..74a07afc6c 100644 --- a/examples/l3fwd-power/main.c +++ b/examples/l3fwd-power/main.c @@ -47,6 +47,7 @@ #include #include #include +#include #include "perf_core.h" #include "main.h" @@ -2259,6 +2260,24 @@ init_power_library(void) return -1; } } + + RTE_LCORE_FOREACH(lcore_id) { + if (rte_lcore_is_enabled(lcore_id) == 0) + continue; + /* + * Set the worker lcore's to have strict latency limit to allow + * the CPU to enter the shallowest idle state. + */ + ret = rte_power_qos_set_cpu_resume_latency(lcore_id, + RTE_POWER_QOS_STRICT_LATENCY_VALUE); + if (ret < 0) { + RTE_LOG(ERR, L3FWD_POWER, + "Failed to set strict resume latency on CPU%u.\n", + lcore_id); + return ret; + } + } + return ret; } @@ -2298,6 +2317,15 @@ deinit_power_library(void) } } } + + RTE_LCORE_FOREACH(lcore_id) { + if (rte_lcore_is_enabled(lcore_id) == 0) + continue; + /* Restore the original value in kernel. */ + rte_power_qos_set_cpu_resume_latency(lcore_id, + RTE_POWER_QOS_RESUME_LATENCY_NO_CONSTRAINT); + } + return ret; } -- 2.22.0