From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C4F714554D; Tue, 2 Jul 2024 16:40:52 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 58AE2402B1; Tue, 2 Jul 2024 16:40:52 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id F2BD1402AD for ; Tue, 2 Jul 2024 16:40:50 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4626FRt5020675 for ; Tue, 2 Jul 2024 07:40:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=w r5Hi+HvaFJHEGODeEx1gVZSeHBOy09I5YqUA/SNulc=; b=f2MuQxdxv89Gwl38l mlHPaxU4+SxykFK5HICMQITFoZSxnqp1vW51n+qPaRGeEmPOLC7lYqxXuMJrmFSz NE0pUFud6znodBKMrAwNk4YB83mWlqdWbyoEBHncuyPJlbZoRzJ8NcLDE9udV8e+ DA0xfKX+ZOEkIrX27y2gdU5zGD/P5jnHk+Ux4ai3VNqJmw0IJXSyA2w29Sq7kJuv sOeZ4Hm5CkNSiLZbhdbzGhVLaGm3VblKMPY3KCG1n/5B+w/FtyweE2wP5u64WD2V jBCXpaedzgizd+8S5uRVhq7SgR4KSba9iGTnuuzEeVUVlMLoKTyKY6OY5OqJFvMJ myaWA== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 404c49a1fa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 02 Jul 2024 07:40:49 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 2 Jul 2024 07:40:49 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Tue, 2 Jul 2024 07:40:49 -0700 Received: from localhost.localdomain (unknown [10.28.36.158]) by maili.marvell.com (Postfix) with ESMTP id 890173F709E; Tue, 2 Jul 2024 07:40:46 -0700 (PDT) From: Rahul Bhansali To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: , Rahul Bhansali Subject: [PATCH v2 1/2] common/cnxk: enable second pass RQ in mask config Date: Tue, 2 Jul 2024 20:10:32 +0530 Message-ID: <20240702144033.3345075-1-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240627090859.2860207-1-rbhansali@marvell.com> References: <20240627090859.2860207-1-rbhansali@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: dtc1nLiSRl8K-Q-ECbbaHsdLDy5RgjCX X-Proofpoint-GUID: dtc1nLiSRl8K-Q-ECbbaHsdLDy5RgjCX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_10,2024-07-02_02,2024-05-17_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This will enable second pass RQ and drop interrupt by default in mask configuration to avoid buffer leak possibilities during dev stop and interrupts to indicate drops if any. Signed-off-by: Rahul Bhansali --- Changes in v2: No change. drivers/common/cnxk/roc_features.h | 6 ++++++ drivers/common/cnxk/roc_nix_inl.c | 9 ++++++++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_features.h b/drivers/common/cnxk/roc_features.h index 3b512be132..6abb35c296 100644 --- a/drivers/common/cnxk/roc_features.h +++ b/drivers/common/cnxk/roc_features.h @@ -90,4 +90,10 @@ roc_feature_nix_has_rx_inject(void) return (roc_model_is_cn10ka_b0() || roc_model_is_cn10kb()); } +static inline bool +roc_feature_nix_has_second_pass_drop(void) +{ + return 0; +} + #endif diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c index 74a688abbd..a984ac56d9 100644 --- a/drivers/common/cnxk/roc_nix_inl.c +++ b/drivers/common/cnxk/roc_nix_inl.c @@ -734,6 +734,13 @@ nix_inl_rq_mask_cfg(struct roc_nix *roc_nix, bool enable) msk_req->rq_set.xqe_drop_ena = 0; msk_req->rq_set.spb_ena = 1; + if (!roc_feature_nix_has_second_pass_drop()) { + msk_req->rq_set.ena = 1; + msk_req->rq_set.rq_int_ena = 1; + msk_req->rq_mask.ena = 0; + msk_req->rq_mask.rq_int_ena = 0; + } + msk_req->rq_mask.len_ol3_dis = 0; msk_req->rq_mask.len_ol4_dis = 0; msk_req->rq_mask.len_il3_dis = 0; @@ -1467,7 +1474,7 @@ roc_nix_inl_rq_ena_dis(struct roc_nix *roc_nix, bool enable) if (!idev) return -EFAULT; - if (roc_feature_nix_has_inl_rq_mask()) { + if (roc_feature_nix_has_inl_rq_mask() && enable) { rc = nix_inl_rq_mask_cfg(roc_nix, enable); if (rc) { plt_err("Failed to get rq mask rc=%d", rc); -- 2.25.1