[PATCH 00/15] net/ena: driver release 2.10.0

[PATCH 00/15] net/ena: driver release 2.10.0

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Hi all,
This release contains:
1. HAL upgrade to latest divided into separate patches.
2. three bug fixes.
3. restructuring of the Rx checksum code for readability
4. restructuring of the device uninit flow which is also needed
   for adding hot un/plug support later.
5. modification of logs on the datapath that leads to improved performance.

Will appreciate your feedbacks!
All the best and thanks in advance,
Shai

Shai Brandes (15):
  net/ena/base: add descriptor dump capability
  net/ena/base: remove unused param
  net/ena/base: remove redundant assert checks
  net/ena/base: update memory barrier comment
  net/ena/base: add method to check used entries
  net/ena/base: add an additional reset reason
  net/ena/base: update copyrights comments
  net/ena/base: add macro for bitfield access
  net/ena: logger change to improve performance
  net/ena: rework device uninit
  net/ena: fix bad checksum handling
  net/ena: fix invalid return value check
  net/ena: fix wrong handling of checksum
  net/ena: rework Rx checksum inspection
  net/ena: upgrade driver version to 2.10.0

 doc/guides/rel_notes/release_24_07.rst        |  11 +
 drivers/net/ena/base/ena_com.c                | 167 +++++++------
 drivers/net/ena/base/ena_com.h                |  14 +-
 .../net/ena/base/ena_defs/ena_admin_defs.h    |   5 +-
 .../net/ena/base/ena_defs/ena_common_defs.h   |   4 +-
 .../net/ena/base/ena_defs/ena_eth_io_defs.h   |   5 +-
 drivers/net/ena/base/ena_defs/ena_includes.h  |   4 +-
 drivers/net/ena/base/ena_defs/ena_regs_defs.h |   5 +-
 drivers/net/ena/base/ena_eth_com.c            | 231 +++++++++++-------
 drivers/net/ena/base/ena_eth_com.h            |  33 ++-
 drivers/net/ena/base/ena_plat.h               |   4 +-
 drivers/net/ena/base/ena_plat_dpdk.h          |  24 +-
 drivers/net/ena/ena_ethdev.c                  | 134 +++++-----
 13 files changed, 374 insertions(+), 267 deletions(-)

-- 
2.17.1

[PATCH 01/15] net/ena/base: add descriptor dump capability

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

This patch adds the capability to print rx/tx descriptors.
This patch introduces a new function ena_com_tx_cdesc_idx_to_ptr
which is the equivalent of ena_com_rx_cdesc_idx_to_ptr but for tx cdesc.

Finally, this patch moves the io_cq header incrementation in
ena_com_cdesc_rx_pkt_get() function to be after the possible if fail
cases since it makes more sense to point into the next descriptor only
if the last one is valid.

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 drivers/net/ena/base/ena_eth_com.c | 56 +++++++++++++++++++++++++++---
 drivers/net/ena/base/ena_eth_com.h |  8 +++++
 2 files changed, 60 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ena/base/ena_eth_com.c b/drivers/net/ena/base/ena_eth_com.c
index 0de736fbe0..9ba0beb868 100644
--- a/drivers/net/ena/base/ena_eth_com.c
+++ b/drivers/net/ena/base/ena_eth_com.c
@@ -5,8 +5,7 @@
 
 #include "ena_eth_com.h"
 
-static struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(
-	struct ena_com_io_cq *io_cq)
+struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(struct ena_com_io_cq *io_cq)
 {
 	struct ena_eth_io_rx_cdesc_base *cdesc;
 	u16 expected_phase, head_masked;
@@ -32,6 +31,55 @@ static struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(
 	return cdesc;
 }
 
+void ena_com_dump_single_rx_cdesc(struct ena_com_io_cq *io_cq,
+				  struct ena_eth_io_rx_cdesc_base *desc)
+{
+	if (desc) {
+		uint32_t *desc_arr = (uint32_t *)desc;
+
+		ena_trc_err(ena_com_io_cq_to_ena_dev(io_cq),
+			    "RX descriptor value[0x%08x 0x%08x 0x%08x 0x%08x] phase[%u] first[%u] last[%u] MBZ7[%u] MZB17[%u]\n",
+			    desc_arr[0], desc_arr[1], desc_arr[2], desc_arr[3],
+			    ENA_FIELD_GET(desc->status, (uint32_t)ENA_ETH_IO_RX_DESC_PHASE_MASK,
+					  0),
+			    ENA_FIELD_GET(desc->status, (uint32_t)ENA_ETH_IO_RX_DESC_FIRST_MASK,
+					  ENA_ETH_IO_RX_DESC_FIRST_SHIFT),
+			    ENA_FIELD_GET(desc->status, (uint32_t)ENA_ETH_IO_RX_DESC_LAST_MASK,
+					  ENA_ETH_IO_RX_DESC_LAST_SHIFT),
+			    ENA_FIELD_GET(desc->status,
+					  (uint32_t)ENA_ETH_IO_RX_CDESC_BASE_MBZ7_MASK,
+					  ENA_ETH_IO_RX_CDESC_BASE_MBZ7_SHIFT),
+			    ENA_FIELD_GET(desc->status,
+					  (uint32_t)ENA_ETH_IO_RX_CDESC_BASE_MBZ17_MASK,
+					  ENA_ETH_IO_RX_CDESC_BASE_MBZ17_SHIFT));
+	}
+}
+
+void ena_com_dump_single_tx_cdesc(struct ena_com_io_cq *io_cq,
+				  struct ena_eth_io_tx_cdesc *desc)
+{
+	if (desc) {
+		uint32_t *desc_arr = (uint32_t *)desc;
+
+		ena_trc_err(ena_com_io_cq_to_ena_dev(io_cq),
+			    "TX descriptor value[0x%08x 0x%08x] phase[%u] MBZ6[%u]\n",
+			    desc_arr[0], desc_arr[1],
+			    ENA_FIELD_GET(desc->flags, (uint32_t)ENA_ETH_IO_TX_CDESC_PHASE_MASK,
+					  0),
+			    ENA_FIELD_GET(desc->flags, (uint32_t)ENA_ETH_IO_TX_CDESC_MBZ6_MASK,
+					  ENA_ETH_IO_TX_CDESC_MBZ6_SHIFT));
+	}
+}
+
+struct ena_eth_io_tx_cdesc *ena_com_tx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx)
+{
+	idx &= (io_cq->q_depth - 1);
+
+	return (struct ena_eth_io_tx_cdesc *)
+		((uintptr_t)io_cq->cdesc_addr.virt_addr +
+		idx * io_cq->cdesc_entry_size_in_bytes);
+}
+
 static void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq)
 {
 	u16 tail_masked;
@@ -228,7 +276,7 @@ static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq)
 	return ena_com_sq_update_reqular_queue_tail(io_sq);
 }
 
-static struct ena_eth_io_rx_cdesc_base *
+struct ena_eth_io_rx_cdesc_base *
 	ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx)
 {
 	idx &= (io_cq->q_depth - 1);
@@ -254,7 +302,6 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
 			break;
 		status = READ_ONCE32(cdesc->status);
 
-		ena_com_cq_inc_head(io_cq);
 		if (unlikely((status & ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK) >>
 		    ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT && count != 0)) {
 			ena_trc_err(dev,
@@ -272,6 +319,7 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
 			return ENA_COM_FAULT;
 		}
 
+		ena_com_cq_inc_head(io_cq);
 		count++;
 		last = (status & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) >>
 			ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT;
diff --git a/drivers/net/ena/base/ena_eth_com.h b/drivers/net/ena/base/ena_eth_com.h
index 2fac10e678..4e3d0fb6fd 100644
--- a/drivers/net/ena/base/ena_eth_com.h
+++ b/drivers/net/ena/base/ena_eth_com.h
@@ -16,6 +16,14 @@ extern "C" {
 #define ENA_LLQ_HEADER		(128UL - ENA_LLQ_ENTRY_DESC_CHUNK_SIZE)
 #define ENA_LLQ_LARGE_HEADER	(256UL - ENA_LLQ_ENTRY_DESC_CHUNK_SIZE)
 
+void ena_com_dump_single_rx_cdesc(struct ena_com_io_cq *io_cq,
+				  struct ena_eth_io_rx_cdesc_base *desc);
+void ena_com_dump_single_tx_cdesc(struct ena_com_io_cq *io_cq,
+				  struct ena_eth_io_tx_cdesc *desc);
+struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(struct ena_com_io_cq *io_cq);
+struct ena_eth_io_rx_cdesc_base *ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx);
+struct ena_eth_io_tx_cdesc *ena_com_tx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx);
+
 struct ena_com_tx_ctx {
 	struct ena_com_tx_meta ena_meta;
 	struct ena_com_buf *ena_bufs;
-- 
2.17.1

[PATCH 02/15] net/ena/base: remove unused param

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Remove an unused dev_node parameter when allocating DMA memory.

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 drivers/net/ena/base/ena_com.c       |  9 ++-------
 drivers/net/ena/base/ena_plat_dpdk.h | 11 +++++------
 2 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c
index 24756e5e76..9e1fa40c0c 100644
--- a/drivers/net/ena/base/ena_com.c
+++ b/drivers/net/ena/base/ena_com.c
@@ -328,7 +328,6 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev,
 			      struct ena_com_io_sq *io_sq)
 {
 	size_t size;
-	int dev_node = 0;
 
 	memset(&io_sq->desc_addr, 0x0, sizeof(io_sq->desc_addr));
 
@@ -347,8 +346,7 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev,
 					    io_sq->desc_addr.virt_addr,
 					    io_sq->desc_addr.phys_addr,
 					    io_sq->desc_addr.mem_handle,
-					    ctx->numa_node,
-					    dev_node);
+					    ctx->numa_node);
 		if (!io_sq->desc_addr.virt_addr) {
 			ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev,
 					       size,
@@ -377,8 +375,7 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev,
 		ENA_MEM_ALLOC_NODE(ena_dev->dmadev,
 				   size,
 				   io_sq->bounce_buf_ctrl.base_buffer,
-				   ctx->numa_node,
-				   dev_node);
+				   ctx->numa_node);
 		if (!io_sq->bounce_buf_ctrl.base_buffer)
 			io_sq->bounce_buf_ctrl.base_buffer = ENA_MEM_ALLOC(ena_dev->dmadev, size);
 
@@ -417,7 +414,6 @@ static int ena_com_init_io_cq(struct ena_com_dev *ena_dev,
 			      struct ena_com_io_cq *io_cq)
 {
 	size_t size;
-	int prev_node = 0;
 
 	memset(&io_cq->cdesc_addr, 0x0, sizeof(io_cq->cdesc_addr));
 
@@ -436,7 +432,6 @@ static int ena_com_init_io_cq(struct ena_com_dev *ena_dev,
 					    io_cq->cdesc_addr.phys_addr,
 					    io_cq->cdesc_addr.mem_handle,
 					    ctx->numa_node,
-					    prev_node,
 					    ENA_CDESC_RING_SIZE_ALIGNMENT);
 	if (!io_cq->cdesc_addr.virt_addr) {
 		ENA_MEM_ALLOC_COHERENT_ALIGNED(ena_dev->dmadev,
diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h
index dffe60705d..eaa509bc2a 100644
--- a/drivers/net/ena/base/ena_plat_dpdk.h
+++ b/drivers/net/ena/base/ena_plat_dpdk.h
@@ -240,23 +240,22 @@ ena_mem_alloc_coherent(struct rte_eth_dev_data *data, size_t size,
 		   rte_memzone_free(mem_handle); })
 
 #define ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED(				       \
-	dmadev, size, virt, phys, mem_handle, node, dev_node, alignment)       \
+	dmadev, size, virt, phys, mem_handle, node, alignment)			\
 	do {								       \
 		void *virt_addr;					       \
 		dma_addr_t phys_addr;					       \
-		ENA_TOUCH(dev_node);					       \
 		(mem_handle) = ena_mem_alloc_coherent((dmadev), (size),	       \
 			(node), (alignment), &virt_addr, &phys_addr);      \
 		(virt) = virt_addr;					       \
 		(phys) = phys_addr;					       \
 	} while (0)
 #define ENA_MEM_ALLOC_COHERENT_NODE(					       \
-	dmadev, size, virt, phys, mem_handle, node, dev_node)		       \
+	dmadev, size, virt, phys, mem_handle, node)				\
 		ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED(dmadev, size, virt,	phys,  \
-			mem_handle, node, dev_node, RTE_CACHE_LINE_SIZE)
-#define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node)		       \
+			mem_handle, node, RTE_CACHE_LINE_SIZE)
+#define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node)				\
 	do {								       \
-		ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);			       \
+		ENA_TOUCH(dmadev);						\
 		virt = rte_zmalloc_socket(NULL, size, 0, node);		       \
 	} while (0)
 
-- 
2.17.1

[PATCH 03/15] net/ena/base: remove redundant assert checks

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Remove ENA_WARN checks from ena_com_wait_and_process_admin_cq_polling
since once the execution flow reaches the check, it must be
ENA_CMD_COMPLETED because it can't be either of the other options:
1. ENA_CMD_ABORTED - in such case it will perform "goto err" in the "if"
   block above, thus skipping the ENA_WARN check.
2. ENA_CMD_SUBMITTED - in such case it will timeout inside the while(1)
   loop above and perform "goto err", thus skipping the ENA_WARN check.

Remove ENA_WARN check from ena_com_wait_and_process_admin_cq_interrupts
since once the execution flow reaches the check, it must be
ENA_CMD_COMPLETED because it can't be either of the other options:
1. ENA_CMD_ABORTED - same as above, i will perform "goto err" in the
   "if" block above, thus skipping the ENA_WARN check.
2. ENA_CMD_SUBMITTED - in such case it will perform "goto err" in the
   nested if block above, since "admin_queue->polling" is false (because
   of the interrupt mode execution of admin commands)

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 drivers/net/ena/base/ena_com.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c
index 9e1fa40c0c..f9dd086484 100644
--- a/drivers/net/ena/base/ena_com.c
+++ b/drivers/net/ena/base/ena_com.c
@@ -598,10 +598,6 @@ static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_c
 		goto err;
 	}
 
-	ENA_WARN(comp_ctx->status != ENA_CMD_COMPLETED,
-		 admin_queue->ena_dev, "Invalid comp status %d\n",
-		 comp_ctx->status);
-
 	ret = ena_com_comp_status_to_errno(admin_queue, comp_ctx->comp_status);
 err:
 	comp_ctxt_release(admin_queue, comp_ctx);
@@ -828,10 +824,6 @@ static int ena_com_wait_and_process_admin_cq_interrupts(struct ena_comp_ctx *com
 		goto err;
 	}
 
-	ENA_WARN(comp_ctx->status != ENA_CMD_COMPLETED,
-		 admin_queue->ena_dev, "Invalid comp status %d\n",
-		 comp_ctx->status);
-
 	ret = ena_com_comp_status_to_errno(admin_queue, comp_ctx->comp_status);
 err:
 	comp_ctxt_release(admin_queue, comp_ctx);
-- 
2.17.1

[PATCH 04/15] net/ena/base: update memory barrier comment

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Update the comment above the phase bit descriptor
read in AENQ processing.

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 drivers/net/ena/base/ena_com.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c
index f9dd086484..ad4f3f9431 100644
--- a/drivers/net/ena/base/ena_com.c
+++ b/drivers/net/ena/base/ena_com.c
@@ -2409,8 +2409,12 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data)
 	/* Go over all the events */
 	while ((READ_ONCE8(aenq_common->flags) &
 		ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) == phase) {
-		/* Make sure the device finished writing the rest of the descriptor
-		 * before reading it.
+		/* When the phase bit of the AENQ descriptor aligns with the driver's phase bit,
+		 * it signifies the readiness of the entire AENQ descriptor.
+		 * The driver should proceed to read the descriptor's data only after confirming
+		 * and synchronizing the phase bit.
+		 * This memory fence guarantees the correct sequence of accesses to the
+		 * descriptor's memory.
 		 */
 		dma_rmb();
 
@@ -2468,8 +2472,12 @@ bool ena_com_aenq_has_keep_alive(struct ena_com_dev *ena_dev)
 	/* Go over all the events */
 	while ((READ_ONCE8(aenq_common->flags) &
 		ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) == phase) {
-		/* Make sure the device finished writing the rest of the descriptor
-		 * before reading it.
+		/* When the phase bit of the AENQ descriptor aligns with the driver's phase bit,
+		 * it signifies the readiness of the entire AENQ descriptor.
+		 * The driver should proceed to read the descriptor's data only after confirming
+		 * and synchronizing the phase bit.
+		 * This memory fence guarantees the correct sequence of accesses to the
+		 * descriptor's memory.
 		 */
 		dma_rmb();
 
-- 
2.17.1

[PATCH 05/15] net/ena/base: add method to check used entries

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Provide a method to check the number of used entries in the send queue

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 drivers/net/ena/base/ena_eth_com.h | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ena/base/ena_eth_com.h b/drivers/net/ena/base/ena_eth_com.h
index 4e3d0fb6fd..877668612c 100644
--- a/drivers/net/ena/base/ena_eth_com.h
+++ b/drivers/net/ena/base/ena_eth_com.h
@@ -82,15 +82,14 @@ static inline void ena_com_unmask_intr(struct ena_com_io_cq *io_cq,
 	ENA_REG_WRITE32(io_cq->bus, intr_reg->intr_control, io_cq->unmask_reg);
 }
 
-static inline int ena_com_free_q_entries(struct ena_com_io_sq *io_sq)
+static inline u16 ena_com_used_q_entries(struct ena_com_io_sq *io_sq)
 {
-	u16 tail, next_to_comp, cnt;
-
-	next_to_comp = io_sq->next_to_comp;
-	tail = io_sq->tail;
-	cnt = tail - next_to_comp;
+	return io_sq->tail - io_sq->next_to_comp;
+}
 
-	return io_sq->q_depth - 1 - cnt;
+static inline int ena_com_free_q_entries(struct ena_com_io_sq *io_sq)
+{
+	return io_sq->q_depth - 1 - ena_com_used_q_entries(io_sq);
 }
 
 /* Check if the submission queue has enough space to hold required_buffers */
-- 
2.17.1

[PATCH 06/15] net/ena/base: add an additional reset reason

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

This commit adds the support for a new reset reason
for `MISS_FIRST_INTERRUPT` in order to distinguish
between resets where no interrupts have been received
and sporadic missed interrupts.

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 drivers/net/ena/base/ena_defs/ena_regs_defs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ena/base/ena_defs/ena_regs_defs.h b/drivers/net/ena/base/ena_defs/ena_regs_defs.h
index dd9b629f10..e12a578fac 100644
--- a/drivers/net/ena/base/ena_defs/ena_regs_defs.h
+++ b/drivers/net/ena/base/ena_defs/ena_regs_defs.h
@@ -26,6 +26,7 @@ enum ena_regs_reset_reason_types {
 	ENA_REGS_RESET_TX_DESCRIPTOR_MALFORMED	    = 17,
 	ENA_REGS_RESET_MISSING_ADMIN_INTERRUPT      = 18,
 	ENA_REGS_RESET_DEVICE_REQUEST               = 19,
+	ENA_REGS_RESET_MISS_FIRST_INTERRUPT         = 20,
 	ENA_REGS_RESET_LAST,
 };
 
-- 
2.17.1

[PATCH 07/15] net/ena/base: update copyrights comments

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

copyright dates are not mandatory to be maintained,
therefore the range of years was removed.
In addition, the copyrights lines were separated
into two comments.

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 drivers/net/ena/base/ena_com.c                  | 4 ++--
 drivers/net/ena/base/ena_com.h                  | 4 ++--
 drivers/net/ena/base/ena_defs/ena_admin_defs.h  | 5 +++--
 drivers/net/ena/base/ena_defs/ena_common_defs.h | 4 ++--
 drivers/net/ena/base/ena_defs/ena_eth_io_defs.h | 5 +++--
 drivers/net/ena/base/ena_defs/ena_includes.h    | 4 ++--
 drivers/net/ena/base/ena_defs/ena_regs_defs.h   | 4 ++--
 drivers/net/ena/base/ena_eth_com.c              | 4 ++--
 drivers/net/ena/base/ena_eth_com.h              | 4 ++--
 drivers/net/ena/base/ena_plat.h                 | 4 ++--
 drivers/net/ena/base/ena_plat_dpdk.h            | 4 ++--
 11 files changed, 24 insertions(+), 22 deletions(-)

diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c
index ad4f3f9431..5f46e692b3 100644
--- a/drivers/net/ena/base/ena_com.c
+++ b/drivers/net/ena/base/ena_com.c
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 
diff --git a/drivers/net/ena/base/ena_com.h b/drivers/net/ena/base/ena_com.h
index 737747f64b..5d38b69c0f 100644
--- a/drivers/net/ena/base/ena_com.h
+++ b/drivers/net/ena/base/ena_com.h
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 
diff --git a/drivers/net/ena/base/ena_defs/ena_admin_defs.h b/drivers/net/ena/base/ena_defs/ena_admin_defs.h
index cff6451c96..8a1bb0bb76 100644
--- a/drivers/net/ena/base/ena_defs/ena_admin_defs.h
+++ b/drivers/net/ena/base/ena_defs/ena_admin_defs.h
@@ -1,7 +1,8 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
+
 #ifndef _ENA_ADMIN_H_
 #define _ENA_ADMIN_H_
 
diff --git a/drivers/net/ena/base/ena_defs/ena_common_defs.h b/drivers/net/ena/base/ena_defs/ena_common_defs.h
index d1ee40de32..ed5359cb99 100644
--- a/drivers/net/ena/base/ena_defs/ena_common_defs.h
+++ b/drivers/net/ena/base/ena_defs/ena_common_defs.h
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 
diff --git a/drivers/net/ena/base/ena_defs/ena_eth_io_defs.h b/drivers/net/ena/base/ena_defs/ena_eth_io_defs.h
index f811dd261e..c93cd85632 100644
--- a/drivers/net/ena/base/ena_defs/ena_eth_io_defs.h
+++ b/drivers/net/ena/base/ena_defs/ena_eth_io_defs.h
@@ -1,7 +1,8 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
+
 #ifndef _ENA_ETH_IO_H_
 #define _ENA_ETH_IO_H_
 
diff --git a/drivers/net/ena/base/ena_defs/ena_includes.h b/drivers/net/ena/base/ena_defs/ena_includes.h
index 20dba04d52..4bcb1e3a4a 100644
--- a/drivers/net/ena/base/ena_defs/ena_includes.h
+++ b/drivers/net/ena/base/ena_defs/ena_includes.h
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2019 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 
diff --git a/drivers/net/ena/base/ena_defs/ena_regs_defs.h b/drivers/net/ena/base/ena_defs/ena_regs_defs.h
index e12a578fac..823dccd841 100644
--- a/drivers/net/ena/base/ena_defs/ena_regs_defs.h
+++ b/drivers/net/ena/base/ena_defs/ena_regs_defs.h
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 #ifndef _ENA_REGS_H_
diff --git a/drivers/net/ena/base/ena_eth_com.c b/drivers/net/ena/base/ena_eth_com.c
index 9ba0beb868..e26678827c 100644
--- a/drivers/net/ena/base/ena_eth_com.c
+++ b/drivers/net/ena/base/ena_eth_com.c
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 
diff --git a/drivers/net/ena/base/ena_eth_com.h b/drivers/net/ena/base/ena_eth_com.h
index 877668612c..f91cf67c09 100644
--- a/drivers/net/ena/base/ena_eth_com.h
+++ b/drivers/net/ena/base/ena_eth_com.h
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 
diff --git a/drivers/net/ena/base/ena_plat.h b/drivers/net/ena/base/ena_plat.h
index abd2d8b6c4..52104f3029 100644
--- a/drivers/net/ena/base/ena_plat.h
+++ b/drivers/net/ena/base/ena_plat.h
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2019 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 
diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h
index eaa509bc2a..87f7083ce9 100644
--- a/drivers/net/ena/base/ena_plat_dpdk.h
+++ b/drivers/net/ena/base/ena_plat_dpdk.h
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright (c) Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 
-- 
2.17.1

[PATCH 08/15] net/ena/base: add macro for bitfield access

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Add ENA_FIELD_GET and ENA_FIELD_PREP macro to make access to
fields more readable.

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 drivers/net/ena/base/ena_com.c       | 111 ++++++++++++--------
 drivers/net/ena/base/ena_com.h       |  10 +-
 drivers/net/ena/base/ena_eth_com.c   | 146 +++++++++++++++------------
 drivers/net/ena/base/ena_eth_com.h   |   8 +-
 drivers/net/ena/base/ena_plat_dpdk.h |   3 +
 5 files changed, 165 insertions(+), 113 deletions(-)

diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c
index 5f46e692b3..e5f1a31c9e 100644
--- a/drivers/net/ena/base/ena_com.c
+++ b/drivers/net/ena/base/ena_com.c
@@ -162,10 +162,13 @@ static int ena_com_admin_init_aenq(struct ena_com_dev *ena_dev,
 	ENA_REG_WRITE32(ena_dev->bus, addr_high, ena_dev->reg_bar + ENA_REGS_AENQ_BASE_HI_OFF);
 
 	aenq_caps = 0;
-	aenq_caps |= ena_dev->aenq.q_depth & ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK;
-	aenq_caps |= (sizeof(struct ena_admin_aenq_entry) <<
-		ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_SHIFT) &
-		ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_MASK;
+	aenq_caps |= ENA_FIELD_PREP(ena_dev->aenq.q_depth,
+				    ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK,
+				    ENA_ZERO_SHIFT);
+
+	aenq_caps |= ENA_FIELD_PREP(sizeof(struct ena_admin_aenq_entry),
+				    ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_MASK,
+				    ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_SHIFT);
 	ENA_REG_WRITE32(ena_dev->bus, aenq_caps, ena_dev->reg_bar + ENA_REGS_AENQ_CAPS_OFF);
 
 	if (unlikely(!aenq_handlers)) {
@@ -856,8 +859,9 @@ static u32 ena_com_reg_bar_read32(struct ena_com_dev *ena_dev, u16 offset)
 	mmio_read->seq_num++;
 
 	read_resp->req_id = mmio_read->seq_num + 0xDEAD;
-	mmio_read_reg = (offset << ENA_REGS_MMIO_REG_READ_REG_OFF_SHIFT) &
-			ENA_REGS_MMIO_REG_READ_REG_OFF_MASK;
+	mmio_read_reg = ENA_FIELD_PREP(offset,
+				       ENA_REGS_MMIO_REG_READ_REG_OFF_MASK,
+				       ENA_REGS_MMIO_REG_READ_REG_OFF_SHIFT);
 	mmio_read_reg |= mmio_read->seq_num &
 			ENA_REGS_MMIO_REG_READ_REQ_ID_MASK;
 
@@ -927,9 +931,10 @@ static int ena_com_destroy_io_sq(struct ena_com_dev *ena_dev,
 	else
 		direction = ENA_ADMIN_SQ_DIRECTION_RX;
 
-	destroy_cmd.sq.sq_identity |= (direction <<
-		ENA_ADMIN_SQ_SQ_DIRECTION_SHIFT) &
-		ENA_ADMIN_SQ_SQ_DIRECTION_MASK;
+	destroy_cmd.sq.sq_identity |=
+		ENA_FIELD_PREP(direction,
+			       ENA_ADMIN_SQ_SQ_DIRECTION_MASK,
+			       ENA_ADMIN_SQ_SQ_DIRECTION_SHIFT);
 
 	destroy_cmd.sq.sq_idx = io_sq->idx;
 	destroy_cmd.aq_common_descriptor.opcode = ENA_ADMIN_DESTROY_SQ;
@@ -1267,16 +1272,18 @@ static int ena_com_create_io_sq(struct ena_com_dev *ena_dev,
 	else
 		direction = ENA_ADMIN_SQ_DIRECTION_RX;
 
-	create_cmd.sq_identity |= (direction <<
-		ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_SHIFT) &
-		ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_MASK;
+	create_cmd.sq_identity |=
+		ENA_FIELD_PREP(direction,
+			       ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_MASK,
+			       ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_SHIFT);
 
 	create_cmd.sq_caps_2 |= io_sq->mem_queue_type &
 		ENA_ADMIN_AQ_CREATE_SQ_CMD_PLACEMENT_POLICY_MASK;
 
-	create_cmd.sq_caps_2 |= (ENA_ADMIN_COMPLETION_POLICY_DESC <<
-		ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_SHIFT) &
-		ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_MASK;
+	create_cmd.sq_caps_2 |=
+		ENA_FIELD_PREP(ENA_ADMIN_COMPLETION_POLICY_DESC,
+			       ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_MASK,
+			       ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_SHIFT);
 
 	create_cmd.sq_caps_3 |=
 		ENA_ADMIN_AQ_CREATE_SQ_CMD_IS_PHYSICALLY_CONTIGUOUS_MASK;
@@ -1616,8 +1623,9 @@ int ena_com_get_dma_width(struct ena_com_dev *ena_dev)
 		return ENA_COM_TIMER_EXPIRED;
 	}
 
-	width = (caps & ENA_REGS_CAPS_DMA_ADDR_WIDTH_MASK) >>
-		ENA_REGS_CAPS_DMA_ADDR_WIDTH_SHIFT;
+	width = ENA_FIELD_GET(caps,
+			      ENA_REGS_CAPS_DMA_ADDR_WIDTH_MASK,
+			      ENA_REGS_CAPS_DMA_ADDR_WIDTH_SHIFT);
 
 	ena_trc_dbg(ena_dev, "ENA dma width: %d\n", width);
 
@@ -1651,18 +1659,26 @@ int ena_com_validate_version(struct ena_com_dev *ena_dev)
 	}
 
 	ena_trc_info(ena_dev, "ENA device version: %d.%d\n",
-		     (ver & ENA_REGS_VERSION_MAJOR_VERSION_MASK) >>
-		     ENA_REGS_VERSION_MAJOR_VERSION_SHIFT,
-		     ver & ENA_REGS_VERSION_MINOR_VERSION_MASK);
+		     ENA_FIELD_GET(ver,
+				   ENA_REGS_VERSION_MAJOR_VERSION_MASK,
+				   ENA_REGS_VERSION_MAJOR_VERSION_SHIFT),
+		     ENA_FIELD_GET(ver,
+				   ENA_REGS_VERSION_MINOR_VERSION_MASK,
+				   ENA_ZERO_SHIFT));
 
 	ena_trc_info(ena_dev, "ENA controller version: %d.%d.%d implementation version %d\n",
-		     (ctrl_ver & ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK)
-		     >> ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_SHIFT,
-		     (ctrl_ver & ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_MASK)
-		     >> ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_SHIFT,
-		     (ctrl_ver & ENA_REGS_CONTROLLER_VERSION_SUBMINOR_VERSION_MASK),
-		     (ctrl_ver & ENA_REGS_CONTROLLER_VERSION_IMPL_ID_MASK) >>
-		     ENA_REGS_CONTROLLER_VERSION_IMPL_ID_SHIFT);
+		     ENA_FIELD_GET(ctrl_ver,
+				   ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK,
+				   ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_SHIFT),
+		     ENA_FIELD_GET(ctrl_ver,
+				   ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_MASK,
+				   ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_SHIFT),
+		     ENA_FIELD_GET(ctrl_ver,
+				   ENA_REGS_CONTROLLER_VERSION_SUBMINOR_VERSION_MASK,
+				   ENA_ZERO_SHIFT),
+		     ENA_FIELD_GET(ctrl_ver,
+				   ENA_REGS_CONTROLLER_VERSION_IMPL_ID_MASK,
+				   ENA_REGS_CONTROLLER_VERSION_IMPL_ID_SHIFT));
 
 	ctrl_ver_masked =
 		(ctrl_ver & ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK) |
@@ -2117,16 +2133,20 @@ int ena_com_admin_init(struct ena_com_dev *ena_dev,
 	ENA_REG_WRITE32(ena_dev->bus, addr_high, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_HI_OFF);
 
 	aq_caps = 0;
-	aq_caps |= admin_queue->q_depth & ENA_REGS_AQ_CAPS_AQ_DEPTH_MASK;
-	aq_caps |= (sizeof(struct ena_admin_aq_entry) <<
-			ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_SHIFT) &
-			ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_MASK;
+	aq_caps |= ENA_FIELD_PREP(admin_queue->q_depth,
+				  ENA_REGS_AQ_CAPS_AQ_DEPTH_MASK,
+				  ENA_ZERO_SHIFT);
+	aq_caps |= ENA_FIELD_PREP(sizeof(struct ena_admin_aq_entry),
+				 ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_MASK,
+				 ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_SHIFT);
 
 	acq_caps = 0;
-	acq_caps |= admin_queue->q_depth & ENA_REGS_ACQ_CAPS_ACQ_DEPTH_MASK;
-	acq_caps |= (sizeof(struct ena_admin_acq_entry) <<
-		ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_SHIFT) &
-		ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_MASK;
+	acq_caps |= ENA_FIELD_PREP(admin_queue->q_depth,
+				   ENA_REGS_ACQ_CAPS_ACQ_DEPTH_MASK,
+				   ENA_ZERO_SHIFT);
+	acq_caps |= ENA_FIELD_PREP(sizeof(struct ena_admin_acq_entry),
+				   ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_MASK,
+				   ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_SHIFT);
 
 	ENA_REG_WRITE32(ena_dev->bus, aq_caps, ena_dev->reg_bar + ENA_REGS_AQ_CAPS_OFF);
 	ENA_REG_WRITE32(ena_dev->bus, acq_caps, ena_dev->reg_bar + ENA_REGS_ACQ_CAPS_OFF);
@@ -2521,8 +2541,9 @@ int ena_com_dev_reset(struct ena_com_dev *ena_dev,
 		return ENA_COM_INVAL;
 	}
 
-	timeout = (cap & ENA_REGS_CAPS_RESET_TIMEOUT_MASK) >>
-			ENA_REGS_CAPS_RESET_TIMEOUT_SHIFT;
+	timeout = ENA_FIELD_GET(cap,
+				ENA_REGS_CAPS_RESET_TIMEOUT_MASK,
+				ENA_REGS_CAPS_RESET_TIMEOUT_SHIFT);
 	if (timeout == 0) {
 		ena_trc_err(ena_dev, "Invalid timeout value\n");
 		return ENA_COM_INVAL;
@@ -2534,10 +2555,12 @@ int ena_com_dev_reset(struct ena_com_dev *ena_dev,
 	/* For backward compatibility, device will interpret
 	 * bits 24-27 as MSB, bits 28-31 as LSB
 	 */
-	reset_reason_lsb = ENA_FIELD_GET(reset_reason, ENA_RESET_REASON_LSB_MASK,
+	reset_reason_lsb = ENA_FIELD_GET(reset_reason,
+					 ENA_RESET_REASON_LSB_MASK,
 					 ENA_RESET_REASON_LSB_OFFSET);
 
-	reset_reason_msb = ENA_FIELD_GET(reset_reason, ENA_RESET_REASON_MSB_MASK,
+	reset_reason_msb = ENA_FIELD_GET(reset_reason,
+					 ENA_RESET_REASON_MSB_MASK,
 					 ENA_RESET_REASON_MSB_OFFSET);
 
 	reset_val |= reset_reason_lsb << ENA_REGS_DEV_CTL_RESET_REASON_SHIFT;
@@ -2549,8 +2572,9 @@ int ena_com_dev_reset(struct ena_com_dev *ena_dev,
 		 * extended reset reason fallback to generic
 		 */
 		reset_val = ENA_REGS_DEV_CTL_DEV_RESET_MASK;
-		reset_val |= (ENA_REGS_RESET_GENERIC << ENA_REGS_DEV_CTL_RESET_REASON_SHIFT) &
-			      ENA_REGS_DEV_CTL_RESET_REASON_MASK;
+		reset_val |= ENA_FIELD_PREP(ENA_REGS_RESET_GENERIC,
+					    ENA_REGS_DEV_CTL_RESET_REASON_MASK,
+					    ENA_REGS_DEV_CTL_RESET_REASON_SHIFT);
 	}
 	ENA_REG_WRITE32(ena_dev->bus, reset_val, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF);
 
@@ -2572,8 +2596,9 @@ int ena_com_dev_reset(struct ena_com_dev *ena_dev,
 		return rc;
 	}
 
-	timeout = (cap & ENA_REGS_CAPS_ADMIN_CMD_TO_MASK) >>
-		ENA_REGS_CAPS_ADMIN_CMD_TO_SHIFT;
+	timeout = ENA_FIELD_GET(cap,
+				ENA_REGS_CAPS_ADMIN_CMD_TO_MASK,
+				ENA_REGS_CAPS_ADMIN_CMD_TO_SHIFT);
 	if (timeout)
 		/* the resolution of timeout reg is 100ms */
 		ena_dev->admin_queue.completion_timeout = timeout * 100000;
diff --git a/drivers/net/ena/base/ena_com.h b/drivers/net/ena/base/ena_com.h
index 5d38b69c0f..fbb0ea39ec 100644
--- a/drivers/net/ena/base/ena_com.h
+++ b/drivers/net/ena/base/ena_com.h
@@ -1201,15 +1201,17 @@ static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
 		ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
 
 	intr_reg->intr_control |=
-		(tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
-		& ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
+		ENA_FIELD_PREP(tx_delay_interval,
+			       ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK,
+			       ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT);
 
 	if (unmask)
 		intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
 
 	intr_reg->intr_control |=
-		(((u32)no_moderation_update) << ENA_ETH_IO_INTR_REG_NO_MODERATION_UPDATE_SHIFT) &
-			ENA_ETH_IO_INTR_REG_NO_MODERATION_UPDATE_MASK;
+		ENA_FIELD_PREP(((u32)no_moderation_update),
+			       ENA_ETH_IO_INTR_REG_NO_MODERATION_UPDATE_MASK,
+			       ENA_ETH_IO_INTR_REG_NO_MODERATION_UPDATE_SHIFT);
 }
 
 static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl)
diff --git a/drivers/net/ena/base/ena_eth_com.c b/drivers/net/ena/base/ena_eth_com.c
index e26678827c..29cc331b1b 100644
--- a/drivers/net/ena/base/ena_eth_com.c
+++ b/drivers/net/ena/base/ena_eth_com.c
@@ -17,8 +17,9 @@ struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(struct ena_com_io_cq
 	cdesc = (struct ena_eth_io_rx_cdesc_base *)(io_cq->cdesc_addr.virt_addr
 			+ (head_masked * io_cq->cdesc_entry_size_in_bytes));
 
-	desc_phase = (READ_ONCE32(cdesc->status) & ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK) >>
-			ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT;
+	desc_phase = ENA_FIELD_GET(READ_ONCE32(cdesc->status),
+				   ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK,
+				   ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT);
 
 	if (desc_phase != expected_phase)
 		return NULL;
@@ -302,8 +303,10 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
 			break;
 		status = READ_ONCE32(cdesc->status);
 
-		if (unlikely((status & ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK) >>
-		    ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT && count != 0)) {
+		if (unlikely(ENA_FIELD_GET(status,
+					   ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK,
+					   ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT) &&
+			     count != 0)) {
 			ena_trc_err(dev,
 				    "First bit is on in descriptor #%u on q_id: %u, req_id: %u\n",
 				    count, io_cq->qid, cdesc->req_id);
@@ -321,8 +324,9 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
 
 		ena_com_cq_inc_head(io_cq);
 		count++;
-		last = (status & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) >>
-			ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT;
+		last = ENA_FIELD_GET(status,
+				     ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK,
+				     ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT);
 	} while (!last);
 
 	if (last) {
@@ -361,32 +365,37 @@ static int ena_com_create_meta(struct ena_com_io_sq *io_sq,
 	meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK;
 
 	/* bits 0-9 of the mss */
-	meta_desc->word2 |= ((u32)ena_meta->mss <<
-		ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT) &
-		ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK;
+	meta_desc->word2 |=
+		ENA_FIELD_PREP((u32)ena_meta->mss,
+			       ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK,
+			       ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT);
 	/* bits 10-13 of the mss */
-	meta_desc->len_ctrl |= ((ena_meta->mss >> 10) <<
-		ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT) &
-		ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK;
+	meta_desc->len_ctrl |=
+		ENA_FIELD_PREP((ena_meta->mss >> 10),
+			       ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK,
+			       ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT);
 
 	/* Extended meta desc */
 	meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK;
-	meta_desc->len_ctrl |= ((u32)io_sq->phase <<
-		ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT) &
-		ENA_ETH_IO_TX_META_DESC_PHASE_MASK;
+	meta_desc->len_ctrl |=
+		ENA_FIELD_PREP((u32)io_sq->phase,
+			       ENA_ETH_IO_TX_META_DESC_PHASE_MASK,
+			       ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT);
 
 	meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_FIRST_MASK;
 	meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;
 
 	meta_desc->word2 |= ena_meta->l3_hdr_len &
 		ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK;
-	meta_desc->word2 |= (ena_meta->l3_hdr_offset <<
-		ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT) &
-		ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK;
+	meta_desc->word2 |=
+		ENA_FIELD_PREP(ena_meta->l3_hdr_offset,
+			       ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK,
+			       ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT);
 
-	meta_desc->word2 |= ((u32)ena_meta->l4_hdr_len <<
-		ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT) &
-		ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK;
+	meta_desc->word2 |=
+		ENA_FIELD_PREP((u32)ena_meta->l4_hdr_len,
+			       ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK,
+			       ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT);
 
 	return ena_com_sq_update_tail(io_sq);
 }
@@ -424,21 +433,26 @@ static void ena_com_rx_set_flags(struct ena_com_io_cq *io_cq,
 	ena_rx_ctx->l3_proto = cdesc->status &
 		ENA_ETH_IO_RX_CDESC_BASE_L3_PROTO_IDX_MASK;
 	ena_rx_ctx->l4_proto =
-		(cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_MASK) >>
-		ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_SHIFT;
+		ENA_FIELD_GET(cdesc->status,
+			      ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_MASK,
+			      ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_SHIFT);
 	ena_rx_ctx->l3_csum_err =
-		!!((cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_MASK) >>
-		ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_SHIFT);
+		!!(ENA_FIELD_GET(cdesc->status,
+				 ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_MASK,
+				 ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_SHIFT));
 	ena_rx_ctx->l4_csum_err =
-		!!((cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_MASK) >>
-		ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_SHIFT);
+		!!(ENA_FIELD_GET(cdesc->status,
+				 ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_MASK,
+				 ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_SHIFT));
 	ena_rx_ctx->l4_csum_checked =
-		!!((cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_MASK) >>
-		ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_SHIFT);
+		!!(ENA_FIELD_GET(cdesc->status,
+				 ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_MASK,
+				 ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_SHIFT));
 	ena_rx_ctx->hash = cdesc->hash;
 	ena_rx_ctx->frag =
-		(cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK) >>
-		ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT;
+		ENA_FIELD_GET(cdesc->status,
+			      ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK,
+			      ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT);
 
 	ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),
 		    "l3_proto %d l4_proto %d l3_csum_err %d l4_csum_err %d hash %u frag %d cdesc_status %x\n",
@@ -523,46 +537,48 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
 	if (!have_meta)
 		desc->len_ctrl |= ENA_ETH_IO_TX_DESC_FIRST_MASK;
 
-	desc->buff_addr_hi_hdr_sz |= ((u32)header_len <<
-		ENA_ETH_IO_TX_DESC_HEADER_LENGTH_SHIFT) &
-		ENA_ETH_IO_TX_DESC_HEADER_LENGTH_MASK;
-	desc->len_ctrl |= ((u32)io_sq->phase << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &
-		ENA_ETH_IO_TX_DESC_PHASE_MASK;
+	desc->buff_addr_hi_hdr_sz |= ENA_FIELD_PREP((u32)header_len,
+						    ENA_ETH_IO_TX_DESC_HEADER_LENGTH_MASK,
+						    ENA_ETH_IO_TX_DESC_HEADER_LENGTH_SHIFT);
+
+	desc->len_ctrl |= ENA_FIELD_PREP((u32)io_sq->phase,
+					 ENA_ETH_IO_TX_DESC_PHASE_MASK,
+					 ENA_ETH_IO_TX_DESC_PHASE_SHIFT);
 
 	desc->len_ctrl |= ENA_ETH_IO_TX_DESC_COMP_REQ_MASK;
 
 	/* Bits 0-9 */
-	desc->meta_ctrl |= ((u32)ena_tx_ctx->req_id <<
-		ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT) &
-		ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK;
+	desc->meta_ctrl |= ENA_FIELD_PREP((u32)ena_tx_ctx->req_id,
+					  ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK,
+					  ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT);
 
-	desc->meta_ctrl |= (ena_tx_ctx->df <<
-		ENA_ETH_IO_TX_DESC_DF_SHIFT) &
-		ENA_ETH_IO_TX_DESC_DF_MASK;
+	desc->meta_ctrl |= ENA_FIELD_PREP(ena_tx_ctx->df,
+					  ENA_ETH_IO_TX_DESC_DF_MASK,
+					  ENA_ETH_IO_TX_DESC_DF_SHIFT);
 
 	/* Bits 10-15 */
-	desc->len_ctrl |= ((ena_tx_ctx->req_id >> 10) <<
-		ENA_ETH_IO_TX_DESC_REQ_ID_HI_SHIFT) &
-		ENA_ETH_IO_TX_DESC_REQ_ID_HI_MASK;
+	desc->len_ctrl |= ENA_FIELD_PREP((ena_tx_ctx->req_id >> 10),
+					 ENA_ETH_IO_TX_DESC_REQ_ID_HI_MASK,
+					 ENA_ETH_IO_TX_DESC_REQ_ID_HI_SHIFT);
 
 	if (ena_tx_ctx->meta_valid) {
-		desc->meta_ctrl |= (ena_tx_ctx->tso_enable <<
-			ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT) &
-			ENA_ETH_IO_TX_DESC_TSO_EN_MASK;
+		desc->meta_ctrl |= ENA_FIELD_PREP(ena_tx_ctx->tso_enable,
+						  ENA_ETH_IO_TX_DESC_TSO_EN_MASK,
+						  ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT);
 		desc->meta_ctrl |= ena_tx_ctx->l3_proto &
 			ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK;
-		desc->meta_ctrl |= (ena_tx_ctx->l4_proto <<
-			ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_SHIFT) &
-			ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_MASK;
-		desc->meta_ctrl |= (ena_tx_ctx->l3_csum_enable <<
-			ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT) &
-			ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK;
-		desc->meta_ctrl |= (ena_tx_ctx->l4_csum_enable <<
-			ENA_ETH_IO_TX_DESC_L4_CSUM_EN_SHIFT) &
-			ENA_ETH_IO_TX_DESC_L4_CSUM_EN_MASK;
-		desc->meta_ctrl |= (ena_tx_ctx->l4_csum_partial <<
-			ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_SHIFT) &
-			ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_MASK;
+		desc->meta_ctrl |= ENA_FIELD_PREP(ena_tx_ctx->l4_proto,
+						  ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_MASK,
+						  ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_SHIFT);
+		desc->meta_ctrl |= ENA_FIELD_PREP(ena_tx_ctx->l3_csum_enable,
+						  ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK,
+						  ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT);
+		desc->meta_ctrl |= ENA_FIELD_PREP(ena_tx_ctx->l4_csum_enable,
+						  ENA_ETH_IO_TX_DESC_L4_CSUM_EN_MASK,
+						  ENA_ETH_IO_TX_DESC_L4_CSUM_EN_SHIFT);
+		desc->meta_ctrl |= ENA_FIELD_PREP(ena_tx_ctx->l4_csum_partial,
+						  ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_MASK,
+						  ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_SHIFT);
 	}
 
 	for (i = 0; i < num_bufs; i++) {
@@ -581,9 +597,9 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
 
 			memset(desc, 0x0, sizeof(struct ena_eth_io_tx_desc));
 
-			desc->len_ctrl |= ((u32)io_sq->phase <<
-				ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &
-				ENA_ETH_IO_TX_DESC_PHASE_MASK;
+			desc->len_ctrl |= ENA_FIELD_PREP((u32)io_sq->phase,
+							 ENA_ETH_IO_TX_DESC_PHASE_MASK,
+							 ENA_ETH_IO_TX_DESC_PHASE_SHIFT);
 		}
 
 		desc->len_ctrl |= ena_bufs->len &
@@ -702,7 +718,9 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,
 	desc->ctrl = ENA_ETH_IO_RX_DESC_FIRST_MASK |
 		     ENA_ETH_IO_RX_DESC_LAST_MASK |
 		     ENA_ETH_IO_RX_DESC_COMP_REQ_MASK |
-		     (io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK);
+		     ENA_FIELD_GET(io_sq->phase,
+				   ENA_ETH_IO_RX_DESC_PHASE_MASK,
+				   ENA_ZERO_SHIFT);
 
 	desc->req_id = req_id;
 
diff --git a/drivers/net/ena/base/ena_eth_com.h b/drivers/net/ena/base/ena_eth_com.h
index f91cf67c09..8a12ed5fba 100644
--- a/drivers/net/ena/base/ena_eth_com.h
+++ b/drivers/net/ena/base/ena_eth_com.h
@@ -188,7 +188,9 @@ static inline void ena_com_update_numa_node(struct ena_com_io_cq *io_cq,
 	if (!io_cq->numa_node_cfg_reg)
 		return;
 
-	numa_cfg.numa_cfg = (numa_node & ENA_ETH_IO_NUMA_NODE_CFG_REG_NUMA_MASK)
+	numa_cfg.numa_cfg = (ENA_FIELD_GET(numa_node,
+					   ENA_ETH_IO_NUMA_NODE_CFG_REG_NUMA_MASK,
+					   ENA_ZERO_SHIFT))
 		| ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_MASK;
 
 	ENA_REG_WRITE32(io_cq->bus, numa_cfg.numa_cfg, io_cq->numa_node_cfg_reg);
@@ -230,7 +232,9 @@ static inline int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq,
 	 * expected, it mean that the device still didn't update
 	 * this completion.
 	 */
-	cdesc_phase = flags & ENA_ETH_IO_TX_CDESC_PHASE_MASK;
+	cdesc_phase = ENA_FIELD_GET(flags,
+				    ENA_ETH_IO_TX_CDESC_PHASE_MASK,
+				    ENA_ZERO_SHIFT);
 	if (cdesc_phase != expected_phase)
 		return ENA_COM_TRY_AGAIN;
 
diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h
index 87f7083ce9..03f29a2f1d 100644
--- a/drivers/net/ena/base/ena_plat_dpdk.h
+++ b/drivers/net/ena/base/ena_plat_dpdk.h
@@ -325,6 +325,9 @@ void ena_rss_key_fill(void *key, size_t size);
 #define ENA_BITS_PER_U64(bitmap) (ena_bits_per_u64(bitmap))
 
 #define ENA_FIELD_GET(value, mask, offset) (((value) & (mask)) >> (offset))
+#define ENA_FIELD_PREP(value, mask, offset) (((value) << (offset)) & (mask))
+
+#define ENA_ZERO_SHIFT 0
 
 static __rte_always_inline int ena_bits_per_u64(uint64_t bitmap)
 {
-- 
2.17.1

[PATCH 09/15] net/ena: logger change to improve performance

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Current implementation of ena_trc_dbg on every TX packet has a major
performance impact on DPDK TX flow.
Profiling revealed that these calls, which trigger rte_log usage,
consume a significant amount of CPU resources.

Change details:
1. Several warning prints that incorrectly used ena_trc_dbg will now be
   compiled out. They have been changed to ena_trc_warn to avoid
   compiler warnings, such as empty if/else body or unused parameter.
2. Removed variables which is used only inside prints and thus
   may be unreferenced.
3. calls for ena_trc_dbg will be enabled only if
   RTE_ETHDEV_DEBUG_TX or RTE_ETHDEV_DEBUG_RX defined

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 doc/guides/rel_notes/release_24_07.rst |  4 ++++
 drivers/net/ena/base/ena_com.c         | 19 +++++--------------
 drivers/net/ena/base/ena_eth_com.c     | 25 ++++++++++++-------------
 drivers/net/ena/base/ena_plat_dpdk.h   |  6 +++++-
 drivers/net/ena/ena_ethdev.c           |  2 +-
 5 files changed, 27 insertions(+), 29 deletions(-)

diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst
index e68a53d757..1e46a4b7c7 100644
--- a/doc/guides/rel_notes/release_24_07.rst
+++ b/doc/guides/rel_notes/release_24_07.rst
@@ -73,6 +73,10 @@ New Features
   ``bpf_obj_get()`` for an xskmap pinned (by the AF_XDP DP) inside the
   container.
 
+* **Updated Amazon ena (Elastic Network Adapter) net driver.**
+
+  * Reworked the driver logger usage in order to improve Tx performance.
+
 * **Update Tap PMD driver.**
 
   * Updated to support up to 8 queues when used by secondary process.
diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c
index e5f1a31c9e..24bad19848 100644
--- a/drivers/net/ena/base/ena_com.c
+++ b/drivers/net/ena/base/ena_com.c
@@ -1392,11 +1392,7 @@ int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
 					    comp, comp_size);
 	if (IS_ERR(comp_ctx)) {
 		ret = PTR_ERR(comp_ctx);
-		if (ret == ENA_COM_NO_DEVICE)
-			ena_trc_dbg(admin_queue->ena_dev,
-				    "Failed to submit command [%d]\n",
-				    ret);
-		else
+		if (ret != ENA_COM_NO_DEVICE)
 			ena_trc_err(admin_queue->ena_dev,
 				    "Failed to submit command [%d]\n",
 				    ret);
@@ -1408,10 +1404,8 @@ int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
 	if (unlikely(ret)) {
 		if (admin_queue->running_state)
 			ena_trc_err(admin_queue->ena_dev,
-				    "Failed to process command. ret = %d\n", ret);
-		else
-			ena_trc_dbg(admin_queue->ena_dev,
-				    "Failed to process command. ret = %d\n", ret);
+				    "Failed to process command [%d]\n",
+				    ret);
 	}
 	return ret;
 }
@@ -2416,7 +2410,6 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data)
 	struct ena_admin_aenq_entry *aenq_e;
 	struct ena_admin_aenq_common_desc *aenq_common;
 	struct ena_com_aenq *aenq  = &ena_dev->aenq;
-	u64 timestamp;
 	ena_aenq_handler handler_cb;
 	u16 masked_head, processed = 0;
 	u8 phase;
@@ -2438,13 +2431,11 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data)
 		 */
 		dma_rmb();
 
-		timestamp = (u64)aenq_common->timestamp_low |
-			((u64)aenq_common->timestamp_high << 32);
-
 		ena_trc_dbg(ena_dev, "AENQ! Group[%x] Syndrome[%x] timestamp: [%" ENA_PRIu64 "s]\n",
 			    aenq_common->group,
 			    aenq_common->syndrome,
-			    timestamp);
+			    ((u64)aenq_common->timestamp_low |
+			    ((u64)aenq_common->timestamp_high << 32)));
 
 		/* Handle specific event*/
 		handler_cb = ena_com_get_specific_aenq_cb(ena_dev,
diff --git a/drivers/net/ena/base/ena_eth_com.c b/drivers/net/ena/base/ena_eth_com.c
index 29cc331b1b..90dd85c7ff 100644
--- a/drivers/net/ena/base/ena_eth_com.c
+++ b/drivers/net/ena/base/ena_eth_com.c
@@ -426,8 +426,7 @@ static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,
 	return ENA_COM_OK;
 }
 
-static void ena_com_rx_set_flags(struct ena_com_io_cq *io_cq,
-				 struct ena_com_rx_ctx *ena_rx_ctx,
+static void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx,
 				 struct ena_eth_io_rx_cdesc_base *cdesc)
 {
 	ena_rx_ctx->l3_proto = cdesc->status &
@@ -453,16 +452,6 @@ static void ena_com_rx_set_flags(struct ena_com_io_cq *io_cq,
 		ENA_FIELD_GET(cdesc->status,
 			      ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK,
 			      ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT);
-
-	ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),
-		    "l3_proto %d l4_proto %d l3_csum_err %d l4_csum_err %d hash %u frag %d cdesc_status %x\n",
-		    ena_rx_ctx->l3_proto,
-		    ena_rx_ctx->l4_proto,
-		    ena_rx_ctx->l3_csum_err,
-		    ena_rx_ctx->l4_csum_err,
-		    ena_rx_ctx->hash,
-		    ena_rx_ctx->frag,
-		    cdesc->status);
 }
 
 /*****************************************************************************/
@@ -689,7 +678,17 @@ int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,
 		    io_sq->qid, io_sq->next_to_comp);
 
 	/* Get rx flags from the last pkt */
-	ena_com_rx_set_flags(io_cq, ena_rx_ctx, cdesc);
+	ena_com_rx_set_flags(ena_rx_ctx, cdesc);
+
+	ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),
+		    "l3_proto %d l4_proto %d l3_csum_err %d l4_csum_err %d hash %d frag %d cdesc_status %x\n",
+		    ena_rx_ctx->l3_proto,
+		    ena_rx_ctx->l4_proto,
+		    ena_rx_ctx->l3_csum_err,
+		    ena_rx_ctx->l4_csum_err,
+		    ena_rx_ctx->hash,
+		    ena_rx_ctx->frag,
+		    cdesc->status);
 
 	ena_rx_ctx->descs = nb_hw_desc;
 
diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h
index 03f29a2f1d..21b96113c7 100644
--- a/drivers/net/ena/base/ena_plat_dpdk.h
+++ b/drivers/net/ena/base/ena_plat_dpdk.h
@@ -122,7 +122,11 @@ extern int ena_logtype_com;
 			"[ENA_COM: %s]" fmt, __func__, ##arg)		       \
 	)
 
-#define ena_trc_dbg(dev, format, arg...) ena_trc_log(dev, DEBUG, format, ##arg)
+#if (defined RTE_ETHDEV_DEBUG_TX) || (defined RTE_ETHDEV_DEBUG_RX)
+#define ena_trc_dbg(dev, format, ...) ena_trc_log(dev, DEBUG, format, ##__VA_ARGS__)
+#else
+#define ena_trc_dbg(dev, format, ...)
+#endif
 #define ena_trc_info(dev, format, arg...) ena_trc_log(dev, INFO, format, ##arg)
 #define ena_trc_warn(dev, format, arg...) ena_trc_log(dev, WARNING, format, ##arg)
 #define ena_trc_err(dev, format, arg...) ena_trc_log(dev, ERR, format, ##arg)
diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c
index 66fc287faf..56dbe3b9cd 100644
--- a/drivers/net/ena/ena_ethdev.c
+++ b/drivers/net/ena/ena_ethdev.c
@@ -3124,7 +3124,7 @@ static int ena_xmit_mbuf(struct ena_ring *tx_ring, struct rte_mbuf *mbuf)
 	 */
 	if (!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
 					  mbuf->nb_segs + 2)) {
-		PMD_DRV_LOG(DEBUG, "Not enough space in the tx queue\n");
+		PMD_TX_LOG(DEBUG, "Not enough space in the tx queue\n");
 		return ENA_COM_NO_MEM;
 	}
 
-- 
2.17.1

[PATCH 10/15] net/ena: rework device uninit

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Rework device uninitialization flow to ensure complete resource
cleanup, and lay the groundwork for hot-unplug support. With this
change, `ena_destroy_device()` is removed, its functionality now
incorporated into `ena_close()`.

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 doc/guides/rel_notes/release_24_07.rst |  2 +
 drivers/net/ena/ena_ethdev.c           | 55 ++++++++++++--------------
 2 files changed, 27 insertions(+), 30 deletions(-)

diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst
index 1e46a4b7c7..a59fb2a21f 100644
--- a/doc/guides/rel_notes/release_24_07.rst
+++ b/doc/guides/rel_notes/release_24_07.rst
@@ -76,6 +76,8 @@ New Features
 * **Updated Amazon ena (Elastic Network Adapter) net driver.**
 
   * Reworked the driver logger usage in order to improve Tx performance.
+  * Reworked the device uninitialization flow to ensure complete resource
+    cleanup and lay the groundwork for hot-unplug support.
 
 * **Update Tap PMD driver.**
 
diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c
index 56dbe3b9cd..4e7171e629 100644
--- a/drivers/net/ena/ena_ethdev.c
+++ b/drivers/net/ena/ena_ethdev.c
@@ -280,8 +280,8 @@ static int ena_infos_get(struct rte_eth_dev *dev,
 static void ena_control_path_handler(void *cb_arg);
 static void ena_control_path_poll_handler(void *cb_arg);
 static void ena_timer_wd_callback(struct rte_timer *timer, void *arg);
-static void ena_destroy_device(struct rte_eth_dev *eth_dev);
 static int eth_ena_dev_init(struct rte_eth_dev *eth_dev);
+static int eth_ena_dev_uninit(struct rte_eth_dev *eth_dev);
 static int ena_xstats_get_names(struct rte_eth_dev *dev,
 				struct rte_eth_xstat_name *xstats_names,
 				unsigned int n);
@@ -880,12 +880,16 @@ static int ena_close(struct rte_eth_dev *dev)
 	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 	struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
 	struct ena_adapter *adapter = dev->data->dev_private;
+	struct ena_com_dev *ena_dev = &adapter->ena_dev;
 	int ret = 0;
 	int rc;
 
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 		return 0;
 
+	if (adapter->state == ENA_ADAPTER_STATE_CLOSED)
+		return 0;
+
 	if (adapter->state == ENA_ADAPTER_STATE_RUNNING)
 		ret = ena_stop(dev);
 	adapter->state = ENA_ADAPTER_STATE_CLOSED;
@@ -905,6 +909,19 @@ static int ena_close(struct rte_eth_dev *dev)
 	rte_free(adapter->drv_stats);
 	adapter->drv_stats = NULL;
 
+	ena_com_set_admin_running_state(ena_dev, false);
+
+	ena_com_rss_destroy(ena_dev);
+
+	ena_com_delete_debug_area(ena_dev);
+	ena_com_delete_host_info(ena_dev);
+
+	ena_com_abort_admin_commands(ena_dev);
+	ena_com_wait_for_abort_completion(ena_dev);
+	ena_com_admin_destroy(ena_dev);
+	ena_com_mmio_reg_read_request_destroy(ena_dev);
+	ena_com_delete_customer_metrics_buffer(ena_dev);
+
 	/*
 	 * MAC is not allocated dynamically. Setting NULL should prevent from
 	 * release of the resource in the rte_eth_dev_release_port().
@@ -925,7 +942,12 @@ ena_dev_reset(struct rte_eth_dev *dev)
 		return -EPERM;
 	}
 
-	ena_destroy_device(dev);
+	rc = eth_ena_dev_uninit(dev);
+	if (rc) {
+		PMD_INIT_LOG(CRIT, "Failed to un-initialize device\n");
+		return rc;
+	}
+
 	rc = eth_ena_dev_init(dev);
 	if (rc)
 		PMD_INIT_LOG(CRIT, "Cannot initialize device\n");
@@ -2434,39 +2456,12 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)
 	return rc;
 }
 
-static void ena_destroy_device(struct rte_eth_dev *eth_dev)
-{
-	struct ena_adapter *adapter = eth_dev->data->dev_private;
-	struct ena_com_dev *ena_dev = &adapter->ena_dev;
-
-	if (adapter->state == ENA_ADAPTER_STATE_FREE)
-		return;
-
-	ena_com_set_admin_running_state(ena_dev, false);
-
-	if (adapter->state != ENA_ADAPTER_STATE_CLOSED)
-		ena_close(eth_dev);
-
-	ena_com_rss_destroy(ena_dev);
-
-	ena_com_delete_debug_area(ena_dev);
-	ena_com_delete_host_info(ena_dev);
-
-	ena_com_abort_admin_commands(ena_dev);
-	ena_com_wait_for_abort_completion(ena_dev);
-	ena_com_admin_destroy(ena_dev);
-	ena_com_mmio_reg_read_request_destroy(ena_dev);
-	ena_com_delete_customer_metrics_buffer(ena_dev);
-
-	adapter->state = ENA_ADAPTER_STATE_FREE;
-}
-
 static int eth_ena_dev_uninit(struct rte_eth_dev *eth_dev)
 {
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 		return 0;
 
-	ena_destroy_device(eth_dev);
+	ena_close(eth_dev);
 
 	return 0;
 }
-- 
2.17.1

[PATCH 11/15] net/ena: fix bad checksum handling

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Removed a workaround for a false L4 bad Rx csum
indication from the device. The workaround was to set it
as unknown so the application would check it instead.
The issue was fixed in the device, thus the driver bad csum
handling should be fixed in the PMD.

Fixes: b2d2f1cf89a6 ("net/ena: fix checksum flag for L4")
Cc: stable@dpdk.org
Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 doc/guides/rel_notes/release_24_07.rst | 1 +
 drivers/net/ena/ena_ethdev.c           | 8 +-------
 2 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst
index a59fb2a21f..f000dec54b 100644
--- a/doc/guides/rel_notes/release_24_07.rst
+++ b/doc/guides/rel_notes/release_24_07.rst
@@ -78,6 +78,7 @@ New Features
   * Reworked the driver logger usage in order to improve Tx performance.
   * Reworked the device uninitialization flow to ensure complete resource
     cleanup and lay the groundwork for hot-unplug support.
+  * Removed an obsolete workaround for a false L4 bad Rx checksum indication.
 
 * **Update Tap PMD driver.**
 
diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c
index 4e7171e629..b43b913903 100644
--- a/drivers/net/ena/ena_ethdev.c
+++ b/drivers/net/ena/ena_ethdev.c
@@ -674,13 +674,7 @@ static inline void ena_rx_mbuf_prepare(struct ena_ring *rx_ring,
 	} else {
 		if (unlikely(ena_rx_ctx->l4_csum_err)) {
 			++rx_stats->l4_csum_bad;
-			/*
-			 * For the L4 Rx checksum offload the HW may indicate
-			 * bad checksum although it's valid. Because of that,
-			 * we're setting the UNKNOWN flag to let the app
-			 * re-verify the checksum.
-			 */
-			ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN;
+			ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
 		} else {
 			++rx_stats->l4_csum_good;
 			ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
-- 
2.17.1

[PATCH 12/15] net/ena: fix invalid return value check

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

Removed the sign inversion for when checking if
ena_com_set_host_attributes returns ENA_COM_UNSUPPORTED.
ENA_COM_UNSUPPORTED is defined as -EOPNOTSUPP, so the extra sign
inversion is wrong.

Fixes: 3adcba9a8987 ("net/ena: update HAL to the newer version")
Cc: stable@dpdk.org

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 doc/guides/rel_notes/release_24_07.rst | 1 +
 drivers/net/ena/ena_ethdev.c           | 4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst
index f000dec54b..24bb91ad46 100644
--- a/doc/guides/rel_notes/release_24_07.rst
+++ b/doc/guides/rel_notes/release_24_07.rst
@@ -79,6 +79,7 @@ New Features
   * Reworked the device uninitialization flow to ensure complete resource
     cleanup and lay the groundwork for hot-unplug support.
   * Removed an obsolete workaround for a false L4 bad Rx checksum indication.
+  * Fixed an invalid return value check.
 
 * **Update Tap PMD driver.**
 
diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c
index b43b913903..67a1d86f9a 100644
--- a/drivers/net/ena/ena_ethdev.c
+++ b/drivers/net/ena/ena_ethdev.c
@@ -812,7 +812,7 @@ static void ena_config_host_info(struct ena_com_dev *ena_dev)
 
 	rc = ena_com_set_host_attributes(ena_dev);
 	if (rc) {
-		if (rc == -ENA_COM_UNSUPPORTED)
+		if (rc == ENA_COM_UNSUPPORTED)
 			PMD_DRV_LOG(WARNING, "Cannot set host attributes\n");
 		else
 			PMD_DRV_LOG(ERR, "Cannot set host attributes\n");
@@ -856,7 +856,7 @@ static void ena_config_debug_area(struct ena_adapter *adapter)
 
 	rc = ena_com_set_host_attributes(&adapter->ena_dev);
 	if (rc) {
-		if (rc == -ENA_COM_UNSUPPORTED)
+		if (rc == ENA_COM_UNSUPPORTED)
 			PMD_DRV_LOG(WARNING, "Cannot set host attributes\n");
 		else
 			PMD_DRV_LOG(ERR, "Cannot set host attributes\n");
-- 
2.17.1

[PATCH 13/15] net/ena: fix wrong handling of checksum

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

This change fixes an issue where a non tcp/udp packet can be indicated
to have an invalid csum. If the device erroneously tries to verify the
csum on a non tcp/udp packet it will result in false indication that
there is a csum error. This change make the driver ignore the
indication for csum error on such packets.

Fixes: 84daba9962b5 ("net/ena: add extra Rx checksum related xstats")
Cc: stable@dpdk.org
Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 doc/guides/rel_notes/release_24_07.rst | 1 +
 drivers/net/ena/ena_ethdev.c           | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst
index 24bb91ad46..ec960d93cc 100644
--- a/doc/guides/rel_notes/release_24_07.rst
+++ b/doc/guides/rel_notes/release_24_07.rst
@@ -80,6 +80,7 @@ New Features
     cleanup and lay the groundwork for hot-unplug support.
   * Removed an obsolete workaround for a false L4 bad Rx checksum indication.
   * Fixed an invalid return value check.
+  * Fixed Rx chcecksum inspection to check only TCP/UDP packets.
 
 * **Update Tap PMD driver.**
 
diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c
index 67a1d86f9a..a18c94df28 100644
--- a/drivers/net/ena/ena_ethdev.c
+++ b/drivers/net/ena/ena_ethdev.c
@@ -669,7 +669,8 @@ static inline void ena_rx_mbuf_prepare(struct ena_ring *rx_ring,
 		packet_type |= RTE_PTYPE_L3_IPV6;
 	}
 
-	if (!ena_rx_ctx->l4_csum_checked || ena_rx_ctx->frag) {
+	if (!ena_rx_ctx->l4_csum_checked || ena_rx_ctx->frag ||
+		!(packet_type & (RTE_PTYPE_L4_TCP | RTE_PTYPE_L4_UDP))) {
 		ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN;
 	} else {
 		if (unlikely(ena_rx_ctx->l4_csum_err)) {
-- 
2.17.1

[PATCH 14/15] net/ena: rework Rx checksum inspection

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

This restructure is a simplification of the
Rx checksum inspection logic in ena_rx_mbuf_prepare.
Its purpose is to improve readability and maintainability
by consolidating conditions.

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 doc/guides/rel_notes/release_24_07.rst |  2 +
 drivers/net/ena/ena_ethdev.c           | 66 +++++++++++++++-----------
 2 files changed, 39 insertions(+), 29 deletions(-)

diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst
index ec960d93cc..d2253999fa 100644
--- a/doc/guides/rel_notes/release_24_07.rst
+++ b/doc/guides/rel_notes/release_24_07.rst
@@ -81,6 +81,8 @@ New Features
   * Removed an obsolete workaround for a false L4 bad Rx checksum indication.
   * Fixed an invalid return value check.
   * Fixed Rx chcecksum inspection to check only TCP/UDP packets.
+  * Reworked the Rx checksum inspection routine to improve
+    readability and maintainability.
 
 * **Update Tap PMD driver.**
 
diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c
index a18c94df28..feb229c5ec 100644
--- a/drivers/net/ena/ena_ethdev.c
+++ b/drivers/net/ena/ena_ethdev.c
@@ -53,8 +53,6 @@
  */
 #define ENA_CLEANUP_BUF_THRESH	256
 
-#define ENA_PTYPE_HAS_HASH	(RTE_PTYPE_L4_TCP | RTE_PTYPE_L4_UDP)
-
 struct ena_stats {
 	char name[ETH_GSTRING_LEN];
 	int stat_offset;
@@ -645,19 +643,14 @@ static inline void ena_trigger_reset(struct ena_adapter *adapter,
 
 static inline void ena_rx_mbuf_prepare(struct ena_ring *rx_ring,
 				       struct rte_mbuf *mbuf,
-				       struct ena_com_rx_ctx *ena_rx_ctx,
-				       bool fill_hash)
+				       struct ena_com_rx_ctx *ena_rx_ctx)
 {
 	struct ena_stats_rx *rx_stats = &rx_ring->rx_stats;
 	uint64_t ol_flags = 0;
 	uint32_t packet_type = 0;
 
-	if (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP)
-		packet_type |= RTE_PTYPE_L4_TCP;
-	else if (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)
-		packet_type |= RTE_PTYPE_L4_UDP;
-
-	if (ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) {
+	switch (ena_rx_ctx->l3_proto) {
+	case ENA_ETH_IO_L3_PROTO_IPV4:
 		packet_type |= RTE_PTYPE_L3_IPV4;
 		if (unlikely(ena_rx_ctx->l3_csum_err)) {
 			++rx_stats->l3_csum_bad;
@@ -665,27 +658,45 @@ static inline void ena_rx_mbuf_prepare(struct ena_ring *rx_ring,
 		} else {
 			ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
 		}
-	} else if (ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV6) {
+		break;
+	case ENA_ETH_IO_L3_PROTO_IPV6:
 		packet_type |= RTE_PTYPE_L3_IPV6;
+		break;
+	default:
+		break;
 	}
 
-	if (!ena_rx_ctx->l4_csum_checked || ena_rx_ctx->frag ||
-		!(packet_type & (RTE_PTYPE_L4_TCP | RTE_PTYPE_L4_UDP))) {
-		ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN;
-	} else {
-		if (unlikely(ena_rx_ctx->l4_csum_err)) {
-			++rx_stats->l4_csum_bad;
-			ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
+	switch (ena_rx_ctx->l4_proto) {
+	case ENA_ETH_IO_L4_PROTO_TCP:
+		packet_type |= RTE_PTYPE_L4_TCP;
+		break;
+	case ENA_ETH_IO_L4_PROTO_UDP:
+		packet_type |= RTE_PTYPE_L4_UDP;
+		break;
+	default:
+		break;
+	}
+
+	/* L4 csum is relevant only for TCP/UDP packets */
+	if ((packet_type & (RTE_PTYPE_L4_TCP | RTE_PTYPE_L4_UDP)) && !ena_rx_ctx->frag) {
+		if (ena_rx_ctx->l4_csum_checked) {
+			if (likely(!ena_rx_ctx->l4_csum_err)) {
+				++rx_stats->l4_csum_good;
+				ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
+			} else {
+				++rx_stats->l4_csum_bad;
+				ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
+			}
 		} else {
-			++rx_stats->l4_csum_good;
-			ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
+			ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN;
 		}
-	}
 
-	if (fill_hash &&
-	    likely((packet_type & ENA_PTYPE_HAS_HASH) && !ena_rx_ctx->frag)) {
-		ol_flags |= RTE_MBUF_F_RX_RSS_HASH;
-		mbuf->hash.rss = ena_rx_ctx->hash;
+		if (rx_ring->offloads & RTE_ETH_RX_OFFLOAD_RSS_HASH) {
+			ol_flags |= RTE_MBUF_F_RX_RSS_HASH;
+			mbuf->hash.rss = ena_rx_ctx->hash;
+		}
+	} else {
+		ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN;
 	}
 
 	mbuf->ol_flags = ol_flags;
@@ -2765,7 +2776,6 @@ static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 	uint16_t completed;
 	struct ena_com_rx_ctx ena_rx_ctx;
 	int i, rc = 0;
-	bool fill_hash;
 
 #ifdef RTE_ETHDEV_DEBUG_RX
 	/* Check adapter state */
@@ -2776,8 +2786,6 @@ static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 	}
 #endif
 
-	fill_hash = rx_ring->offloads & RTE_ETH_RX_OFFLOAD_RSS_HASH;
-
 	descs_in_use = rx_ring->ring_size -
 		ena_com_free_q_entries(rx_ring->ena_com_io_sq) - 1;
 	nb_pkts = RTE_MIN(descs_in_use, nb_pkts);
@@ -2823,7 +2831,7 @@ static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 		}
 
 		/* fill mbuf attributes if any */
-		ena_rx_mbuf_prepare(rx_ring, mbuf, &ena_rx_ctx, fill_hash);
+		ena_rx_mbuf_prepare(rx_ring, mbuf, &ena_rx_ctx);
 
 		if (unlikely(mbuf->ol_flags &
 				(RTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_BAD)))
-- 
2.17.1

[PATCH 15/15] net/ena: upgrade driver version to 2.10.0

[shaibran]

From: Shai Brandes <shaibran@amazon.com>

upgrade driver version to 2.10.0.

Signed-off-by: Shai Brandes <shaibran@amazon.com>
---
 drivers/net/ena/ena_ethdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c
index feb229c5ec..e0c239e88f 100644
--- a/drivers/net/ena/ena_ethdev.c
+++ b/drivers/net/ena/ena_ethdev.c
@@ -22,7 +22,7 @@
 #include <ena_eth_io_defs.h>
 
 #define DRV_MODULE_VER_MAJOR	2
-#define DRV_MODULE_VER_MINOR	9
+#define DRV_MODULE_VER_MINOR	10
 #define DRV_MODULE_VER_SUBMINOR	0
 
 #define __MERGE_64B_H_L(h, l) (((uint64_t)h << 32) | l)
-- 
2.17.1