From: Itamar Gozlan <igozlan@nvidia.com>
To: <igozlan@nvidia.com>, <erezsh@nvidia.com>, <hamdani@nvidia.com>,
<kliteyn@nvidia.com>, <valex@nvidia.com>,
<viacheslavo@nvidia.com>, <thomas@monjalon.net>,
<suanmingm@nvidia.com>, Dariusz Sosnowski <dsosnowski@nvidia.com>,
Bing Zhao <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
Matan Azrad <matan@nvidia.com>
Cc: <dev@dpdk.org>, <stable@dpdk.org>
Subject: [PATCH 8/8] net/mlx5/hws: fix NA64 copy TOS field instead of TTL
Date: Tue, 9 Jul 2024 15:31:03 +0300 [thread overview]
Message-ID: <20240709123103.2101902-9-igozlan@nvidia.com> (raw)
In-Reply-To: <20240709123103.2101902-1-igozlan@nvidia.com>
From: Erez Shitrit <erezsh@nvidia.com>
We don't have enough registers to copy TTL and TOS, so we will set TTL
to be the default value (64) and will copy TOS.
Fixes: 06d969a8c5b8 ("net/mlx5/hws: support NAT64 flow action")
Cc: erezsh@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_action.c | 66 +++++++++++++++++++++++-----
drivers/net/mlx5/hws/mlx5dr_action.h | 2 +
2 files changed, 56 insertions(+), 12 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index 8d3d0033e5..8f6be37818 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -315,21 +315,27 @@ mlx5dr_action_create_nat64_copy_state(struct mlx5dr_context *ctx,
struct mlx5dr_action *action;
uint32_t packet_len_field;
uint8_t *action_ptr;
- uint32_t ttl_field;
+ uint32_t tos_field;
+ uint32_t tos_size;
uint32_t src_addr;
uint32_t dst_addr;
bool is_v4_to_v6;
+ uint32_t ecn;
is_v4_to_v6 = attr->flags & MLX5DR_ACTION_NAT64_V4_TO_V6;
if (is_v4_to_v6) {
packet_len_field = MLX5_MODI_OUT_IPV4_TOTAL_LEN;
- ttl_field = MLX5_MODI_OUT_IPV4_TTL;
+ tos_field = MLX5_MODI_OUT_IP_DSCP;
+ tos_size = 6;
+ ecn = MLX5_MODI_OUT_IP_ECN;
src_addr = MLX5_MODI_OUT_SIPV4;
dst_addr = MLX5_MODI_OUT_DIPV4;
} else {
packet_len_field = MLX5_MODI_OUT_IPV6_PAYLOAD_LEN;
- ttl_field = MLX5_MODI_OUT_IPV6_HOPLIMIT;
+ tos_field = MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS;
+ tos_size = 8;
+ ecn = 0;
src_addr = MLX5_MODI_OUT_SIPV6_31_0;
dst_addr = MLX5_MODI_OUT_DIPV6_31_0;
}
@@ -352,7 +358,7 @@ mlx5dr_action_create_nat64_copy_state(struct mlx5dr_context *ctx,
}
/* | 8 bit - 8 bit - 16 bit |
- * | ttl - protocol - packet-len |
+ * | TOS - protocol - packet-len |
*/
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
MLX5_SET(copy_action_in, action_ptr, src_field, packet_len_field);
@@ -377,12 +383,25 @@ mlx5dr_action_create_nat64_copy_state(struct mlx5dr_context *ctx,
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
- MLX5_SET(copy_action_in, action_ptr, src_field, ttl_field);
+ MLX5_SET(copy_action_in, action_ptr, src_field, tos_field);
MLX5_SET(copy_action_in, action_ptr, dst_field,
attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
MLX5_SET(copy_action_in, action_ptr, dst_offset, 24);
- MLX5_SET(copy_action_in, action_ptr, length, 8);
+ MLX5_SET(copy_action_in, action_ptr, length, tos_size);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ /* in ipv4 TOS = {dscp (6bits) - ecn (2bits) }*/
+ if (ecn) {
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
+ MLX5_SET(copy_action_in, action_ptr, src_field, ecn);
+ MLX5_SET(copy_action_in, action_ptr, dst_field,
+ attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
+ MLX5_SET(copy_action_in, action_ptr, dst_offset, 24 + tos_size);
+ MLX5_SET(copy_action_in, action_ptr, length, MLX5DR_ACTION_NAT64_ECN_SIZE);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ }
/* set sip and dip to 0, in order to have new csum */
mlx5dr_action_create_nat64_zero_all_addr(&action_ptr, is_v4_to_v6);
@@ -543,10 +562,13 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
uint32_t packet_len_field;
uint32_t packet_len_add;
uint8_t *action_ptr;
+ uint32_t tos_field;
uint32_t ttl_field;
+ uint32_t tos_size;
uint32_t src_addr;
uint32_t dst_addr;
bool is_v4_to_v6;
+ uint32_t ecn;
is_v4_to_v6 = attr->flags & MLX5DR_ACTION_NAT64_V4_TO_V6;
@@ -557,6 +579,9 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
ttl_field = MLX5_MODI_OUT_IPV6_HOPLIMIT;
src_addr = MLX5_MODI_OUT_SIPV6_31_0;
dst_addr = MLX5_MODI_OUT_DIPV6_31_0;
+ tos_field = MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS;
+ tos_size = 8;
+ ecn = 0;
} else {
packet_len_field = MLX5_MODI_OUT_IPV4_TOTAL_LEN;
/* ipv4 len is including 20 bytes of the header, so add 20 over ipv6 len */
@@ -564,6 +589,9 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
ttl_field = MLX5_MODI_OUT_IPV4_TTL;
src_addr = MLX5_MODI_OUT_SIPV4;
dst_addr = MLX5_MODI_OUT_DIPV4;
+ tos_field = MLX5_MODI_OUT_IP_DSCP;
+ tos_size = 6;
+ ecn = MLX5_MODI_OUT_IP_ECN;
}
memset(modify_action_data, 0, sizeof(modify_action_data));
@@ -578,20 +606,34 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
MLX5_SET(copy_action_in, action_ptr, length, 16);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
- MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
- action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
-
- MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
+ MLX5_SET(set_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, action_ptr, field, ttl_field);
+ MLX5_SET(set_action_in, action_ptr, length, 8);
+ MLX5_SET(set_action_in, action_ptr, data, MLX5DR_ACTION_NAT64_TTL_DEFAULT_VAL);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ /* copy TOS */
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
MLX5_SET(copy_action_in, action_ptr, src_field,
attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
- MLX5_SET(copy_action_in, action_ptr, dst_field, ttl_field);
+ MLX5_SET(copy_action_in, action_ptr, dst_field, tos_field);
MLX5_SET(copy_action_in, action_ptr, src_offset, 24);
- MLX5_SET(copy_action_in, action_ptr, length, 8);
+ MLX5_SET(copy_action_in, action_ptr, length, tos_size);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ if (ecn) {
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
+ MLX5_SET(copy_action_in, action_ptr, src_field,
+ attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
+ MLX5_SET(copy_action_in, action_ptr, dst_field, ecn);
+ MLX5_SET(copy_action_in, action_ptr, src_offset, 24 + tos_size);
+ MLX5_SET(copy_action_in, action_ptr, length, MLX5DR_ACTION_NAT64_ECN_SIZE);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ }
+
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.h b/drivers/net/mlx5/hws/mlx5dr_action.h
index faea6bb1f4..ba4ce55228 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.h
+++ b/drivers/net/mlx5/hws/mlx5dr_action.h
@@ -79,6 +79,8 @@ enum {
MLX5DR_ACTION_NAT64_IPV4_HEADER = 5,
MLX5DR_ACTION_NAT64_IPV6_VER = 0x60000000,
MLX5DR_ACTION_NAT64_IPV4_VER = 0x45000000,
+ MLX5DR_ACTION_NAT64_TTL_DEFAULT_VAL = 64,
+ MLX5DR_ACTION_NAT64_ECN_SIZE = 2,
};
/* 3 stages for the nat64 action */
--
2.39.3
next prev parent reply other threads:[~2024-07-09 12:33 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-07 10:25 [PATCH 01/10] net/mlx5: add hairpin out of buffer counter Itamar Gozlan
2024-07-07 10:25 ` [PATCH 02/10] net/mlx5: fix matcher object memory leak Itamar Gozlan
2024-07-07 10:25 ` [PATCH 03/10] net/mlx5/hws: set eswitch owner vhc ID valid accordingly Itamar Gozlan
2024-07-07 10:25 ` [PATCH 04/10] net/mlx5/hws: fix memory leak in modify header free Itamar Gozlan
2024-07-07 10:25 ` [PATCH 05/10] net/mlx5/hws: strictly range templates check fix Itamar Gozlan
2024-07-07 10:25 ` [PATCH 06/10] net/mlx5/hws: fix deletion of action vport Itamar Gozlan
2024-07-07 10:25 ` [PATCH 07/10] net/mlx5/hws: fix incorrect port ID on root item convert Itamar Gozlan
2024-07-07 10:25 ` [PATCH 08/10] net/mlx5/hws: take out not needed variable Itamar Gozlan
2024-07-07 10:25 ` [PATCH 09/10] net/mlx5/hws: fix NAT64 csum issue Itamar Gozlan
2024-07-07 10:25 ` [PATCH 10/10] net/mlx5/hws: fix NA64 copy TOS field instead of TTL Itamar Gozlan
2024-07-09 12:30 ` [PATCH 0/8] HW steering team updates Itamar Gozlan
2024-07-09 12:30 ` [PATCH 1/8] net/mlx5/hws: set eswitch owner vhc ID valid accordingly Itamar Gozlan
2024-07-09 12:30 ` [PATCH 2/8] net/mlx5/hws: fix memory leak in modify header free Itamar Gozlan
2024-07-09 12:30 ` [PATCH 3/8] net/mlx5/hws: strictly range templates check fix Itamar Gozlan
2024-07-09 12:30 ` [PATCH 4/8] net/mlx5/hws: fix deletion of action vport Itamar Gozlan
2024-07-09 12:31 ` [PATCH 5/8] net/mlx5/hws: fix incorrect port ID on root item convert Itamar Gozlan
2024-07-09 12:31 ` [PATCH 6/8] net/mlx5/hws: take out not needed variable Itamar Gozlan
2024-07-09 12:31 ` [PATCH 7/8] net/mlx5/hws: fix NAT64 csum issue Itamar Gozlan
2024-07-09 12:31 ` Itamar Gozlan [this message]
2024-07-09 15:25 ` [PATCH 8/8] net/mlx5/hws: fix NA64 copy TOS field instead of TTL Bing Zhao
2024-07-18 7:28 ` [PATCH 0/8] HW steering team updates Raslan Darawsheh
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