From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D02CD45614; Fri, 12 Jul 2024 17:47:25 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3650042F03; Fri, 12 Jul 2024 17:46:59 +0200 (CEST) Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) by mails.dpdk.org (Postfix) with ESMTP id F2D2342ECA for ; Fri, 12 Jul 2024 17:46:54 +0200 (CEST) Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-367990aaef3so1213502f8f.0 for ; Fri, 12 Jul 2024 08:46:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance.com; s=google; t=1720799214; x=1721404014; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W0CiX7D3TVC7nuoSSzfQWD3jN11Zpvt09YUgFstiPh8=; b=GkWzagJSKQQogNY+RgeK9LKOvuRiqKHL0uI1VV/8yXMG8JTsxvJ4GElZmVIleFMpR+ m7r0co1goGOj+wuFpCbrK/YgTM9gfWJrafvBC+CX60wkRFiV6ySeOC/9NaZll5mpNPCR RXOoKOFl7k2HwseB2lwDnL0mVd+oMGR6Nnc4pOVAg10pfU01wlIQf2CJSKMGsAtjSrL7 Lnz/bLVYufgbi9nRCq2XcXoH0nnzj6+mLPlnCVbomzSZDMzfLtFdVJfQdk9n+zNvgpn2 GLDwMOgyjvWWj8omhxD9KhLwZ9FxgsSRxA1l+2ug1ZBEv2Kaxt8ypPTFZot7YXQIlyMy XPWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720799214; x=1721404014; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W0CiX7D3TVC7nuoSSzfQWD3jN11Zpvt09YUgFstiPh8=; b=inPmu7N4jyCwJZ0QARGnzeuA0XdOfWybvGkhGpKaWJWHANCgGGNmjcc/rN/noSLPbF SU2mfiZQ67EgrVjVQoFMtKzgk1fGp0uv/y174AeklKfMDAyGfYZEYjs6UKCSYXTEhAB5 zp+Oua1JU/1Gyg1BHmgpM3C8G3aZwzeW1YtyNizGKvwpFbnJVc7RemknhPhYShHj0agr k+nyVUzYaiM30xpv/L8M8/HPGZY/x24wjlNNArctItfnJ9rPE50mLsSLKbYIfK4KGNFw X4ffwGAIFcdyohTxWp6J2L9Svgi7yLC/GEgdxQkACsTpRnxpxGsqCkyEmfZQwUUEnMRS kIpA== X-Gm-Message-State: AOJu0Yx2yvBF4OhsLS4x8A5EP3P9+ejZcD+KvvYQZ5UyDBxGzXaRDYfX cczKLzALtzpmyuxXsZe3uu/VCUOd4QUw0RowWMhe/5PukgNX4mLB+EGXptC+1og= X-Google-Smtp-Source: AGHT+IF/dNot0qYtEgsoNSocgVnBJhflDLOU6lWNDMCI9Vnig5d1DMCyy17XtwVJBek4FZfNGB+z7Q== X-Received: by 2002:a05:6000:18aa:b0:360:81c3:689c with SMTP id ffacd0b85a97d-367cea47631mr10964316f8f.7.1720799214723; Fri, 12 Jul 2024 08:46:54 -0700 (PDT) Received: from C02FF2N1MD6T.bytedance.net (ec2-3-9-240-80.eu-west-2.compute.amazonaws.com. [3.9.240.80]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-367cde7e023sm10468615f8f.13.2024.07.12.08.46.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jul 2024 08:46:54 -0700 (PDT) From: Daniel Gregory To: Stanislaw Kardach , Bruce Richardson Cc: dev@dpdk.org, Punit Agrawal , Liang Ma , Pengcheng Wang , Chunsong Feng , Daniel Gregory Subject: [PATCH v2 4/9] config/riscv: add qemu crossbuild target Date: Fri, 12 Jul 2024 16:46:40 +0100 Message-Id: <20240712154645.80622-5-daniel.gregory@bytedance.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) In-Reply-To: <20240712154645.80622-1-daniel.gregory@bytedance.com> References: <20240618174133.33457-1-daniel.gregory@bytedance.com> <20240712154645.80622-1-daniel.gregory@bytedance.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org A new cross-compilation target that has extensions that DPDK uses and QEMU supports. Initially, this is just the Zbc extension for hardware crc support. Signed-off-by: Daniel Gregory --- config/riscv/meson.build | 3 ++- config/riscv/riscv64_qemu_linux_gcc | 17 +++++++++++++++++ .../linux_gsg/cross_build_dpdk_for_riscv.rst | 5 +++++ 3 files changed, 24 insertions(+), 1 deletion(-) create mode 100644 config/riscv/riscv64_qemu_linux_gcc diff --git a/config/riscv/meson.build b/config/riscv/meson.build index 5d8411b254..337b26bbac 100644 --- a/config/riscv/meson.build +++ b/config/riscv/meson.build @@ -43,7 +43,8 @@ vendor_generic = { ['RTE_MAX_NUMA_NODES', 2] ], 'arch_config': { - 'generic': {'machine_args': ['-march=rv64gc']} + 'generic': {'machine_args': ['-march=rv64gc']}, + 'qemu': {'machine_args': ['-march=rv64gc_zbc']}, } } diff --git a/config/riscv/riscv64_qemu_linux_gcc b/config/riscv/riscv64_qemu_linux_gcc new file mode 100644 index 0000000000..007cc98885 --- /dev/null +++ b/config/riscv/riscv64_qemu_linux_gcc @@ -0,0 +1,17 @@ +[binaries] +c = ['ccache', 'riscv64-linux-gnu-gcc'] +cpp = ['ccache', 'riscv64-linux-gnu-g++'] +ar = 'riscv64-linux-gnu-ar' +strip = 'riscv64-linux-gnu-strip' +pcap-config = '' + +[host_machine] +system = 'linux' +cpu_family = 'riscv64' +cpu = 'rv64gc_zbc' +endian = 'little' + +[properties] +vendor_id = 'generic' +arch_id = 'qemu' +pkg_config_libdir = '/usr/lib/riscv64-linux-gnu/pkgconfig' diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_riscv.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_riscv.rst index 7d7f7ac72b..c3b67671a0 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_riscv.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_riscv.rst @@ -110,6 +110,11 @@ Currently the following targets are supported: * SiFive U740 SoC: ``config/riscv/riscv64_sifive_u740_linux_gcc`` +* QEMU: ``config/riscv/riscv64_qemu_linux_gcc`` + + * A target with all the extensions that QEMU supports that DPDK has a use for + (currently ``rv64gc_zbc``). Requires QEMU version 7.0.0 or newer. + To add a new target support, ``config/riscv/meson.build`` has to be modified by adding a new vendor/architecture id and a corresponding cross-file has to be added to ``config/riscv`` directory. -- 2.39.2