From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AA07D45614; Fri, 12 Jul 2024 17:47:32 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 81E8542F05; Fri, 12 Jul 2024 17:47:00 +0200 (CEST) Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) by mails.dpdk.org (Postfix) with ESMTP id F073642ED3 for ; Fri, 12 Jul 2024 17:46:55 +0200 (CEST) Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-367b8a60b60so1215787f8f.2 for ; Fri, 12 Jul 2024 08:46:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance.com; s=google; t=1720799215; x=1721404015; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ovepf4Uwv71DSTFgGVFkva47l/Qf1YL4dHijuN24+Jo=; b=hDiVvrGfgdI8pYdp8HcjdOqTfdkTBw0rbUQtFZHA3/Kmz3zNfo+LVm3gTsgCvtl8vS 8In5YMHqWYkCMWDcFihS6f+shybO7QZku5sVg/S9wGMP6ppjCVFFZDtHcOE36htg6BEJ Pcb7DcPKG8evV4mH+uq6qjyxyoSjeBC3gmyhtcUZZFbBIfzRPYpqbbMLxLReK2PeeAqO PNlWhGnL1XLY5vlDXMkQ/QQ6CWR9Q3F8AePcaTccyQd6oWrgqzaV1xlnDru7WTz0ISEQ k/nxmTIdxNo2eHgq7p5joQEG+fpmM+Kwe84xUEprWGEeW/tls5m8bnzsitZv6qEo47VG FlMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720799215; x=1721404015; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ovepf4Uwv71DSTFgGVFkva47l/Qf1YL4dHijuN24+Jo=; b=Vfki+BM/mBzPcF7AL7TUjS/X3SXhPDdbyZALEkQrqVHBKyHdC5PHuXo9L43aiSSW2l UK1Ko3RM9NvN/TeDziEdutZOTVOdQUWytAlyoDQ9mgHsT314ZnE8WxYomLCwaopEuTXe f0lyQv3GVVSKgbdyiz9f9JclHrF4V5mfwiDE94jE9mjcyicg4rz8BgOEhvDvoL0cgxmF sNGP9F23oKA8vgylTcAqt8PcYV7E0tfxoAhz8j7lLA2CPNg9v4aqrXqGqJ2GiSM+DPSU Q06LvuJVG7q/XNfmmyAbgn3SC1w75OiSoeqFYymvyrOXSlLWCNi9uijFmg+Z2SAVINWr M/jQ== X-Gm-Message-State: AOJu0YzFEc7QAT/cX3OuuJPb2I17BUbicu0gZDhT2MltoT469X6w4mK0 EGgSn8DLO1/l7B+JBo4j1lCI/Gynt1nHt9sCy+DaT5ImA1Vay4bf+my7k8vr54E= X-Google-Smtp-Source: AGHT+IHBNjqxnsSFJGIk27dTD54xdadXFClZS0NghNmsfbRz6KTR144g7dWGGsdeHe4VQHxdLdzngw== X-Received: by 2002:a5d:4b88:0:b0:35f:2366:12c5 with SMTP id ffacd0b85a97d-367cea67f1amr8081534f8f.23.1720799215612; Fri, 12 Jul 2024 08:46:55 -0700 (PDT) Received: from C02FF2N1MD6T.bytedance.net (ec2-3-9-240-80.eu-west-2.compute.amazonaws.com. [3.9.240.80]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-367cde7e023sm10468615f8f.13.2024.07.12.08.46.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jul 2024 08:46:55 -0700 (PDT) From: Daniel Gregory To: Stanislaw Kardach Cc: dev@dpdk.org, Punit Agrawal , Liang Ma , Pengcheng Wang , Chunsong Feng , Daniel Gregory Subject: [PATCH v2 5/9] examples/l3fwd: use accelerated crc on riscv Date: Fri, 12 Jul 2024 16:46:41 +0100 Message-Id: <20240712154645.80622-6-daniel.gregory@bytedance.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) In-Reply-To: <20240712154645.80622-1-daniel.gregory@bytedance.com> References: <20240618174133.33457-1-daniel.gregory@bytedance.com> <20240712154645.80622-1-daniel.gregory@bytedance.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When the RISC-V Zbc (carryless multiplication) extension is present, an implementation of CRC hashing using hardware instructions is available. Use it rather than jhash. Signed-off-by: Daniel Gregory --- examples/l3fwd/l3fwd_em.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c index d98e66ea2c..78cec7f5cc 100644 --- a/examples/l3fwd/l3fwd_em.c +++ b/examples/l3fwd/l3fwd_em.c @@ -29,7 +29,7 @@ #include "l3fwd_event.h" #include "em_route_parse.c" -#if defined(RTE_ARCH_X86) || defined(__ARM_FEATURE_CRC32) +#if defined(RTE_ARCH_X86) || defined(__ARM_FEATURE_CRC32) || defined(RTE_RISCV_FEATURE_ZBC) #define EM_HASH_CRC 1 #endif -- 2.39.2