From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2362345626; Mon, 15 Jul 2024 16:44:30 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 14C49402DD; Mon, 15 Jul 2024 16:44:30 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id 8EDF4402B0 for ; Mon, 15 Jul 2024 16:44:28 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 206ADDA7; Mon, 15 Jul 2024 07:44:53 -0700 (PDT) Received: from e132843.arm.com (unknown [10.57.46.195]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0DA423F766; Mon, 15 Jul 2024 07:44:26 -0700 (PDT) From: Jack Bond-Preston To: Andrew Rybchenko , =?UTF-8?q?Morten=20Br=C3=B8rup?= Cc: dev@dpdk.org, Wathsala Vithanage Subject: [PATCH] doc: clarify mempool striding optimisation on Arm Date: Mon, 15 Jul 2024 15:44:20 +0100 Message-Id: <20240715144420.36292-1-jack.bond-preston@foss.arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The mempool memory channel striding optimisation is not necessary on Arm platforms. Update the Programmer's Guide's mempool section to clarify this. Signed-off-by: Jack Bond-Preston Reviewed-by: Wathsala Vithanage --- doc/guides/prog_guide/mempool_lib.rst | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/doc/guides/prog_guide/mempool_lib.rst b/doc/guides/prog_guide/mempool_lib.rst index 4db577fe18..988b0e80c1 100644 --- a/doc/guides/prog_guide/mempool_lib.rst +++ b/doc/guides/prog_guide/mempool_lib.rst @@ -77,6 +77,12 @@ When creating a new pool, the user can specify to use this feature or not. .. _mempool_local_cache: +.. note:: + + This feature is not present for Arm systems. Modern Arm Interconnects choose the SN-F (memory + channel) using a hash of memory address bits. As a result, the load is distributed evenly in all + cases, including the above described, rendering this feature unnecessary. + Local Cache ----------- -- 2.34.1