From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D900D45637; Wed, 17 Jul 2024 19:56:38 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BD33E40663; Wed, 17 Jul 2024 19:56:27 +0200 (CEST) Received: from mail-pf1-f201.google.com (mail-pf1-f201.google.com [209.85.210.201]) by mails.dpdk.org (Postfix) with ESMTP id 018EC406B4 for ; Wed, 17 Jul 2024 19:56:25 +0200 (CEST) Received: by mail-pf1-f201.google.com with SMTP id d2e1a72fcca58-70b03ffbb38so5010560b3a.1 for ; Wed, 17 Jul 2024 10:56:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1721238985; x=1721843785; darn=dpdk.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=T2VVk5PyeHtTdk/A97XvbaTgrv/WClTQyER4ZcY2QiY=; b=n2Mpi+T4b5EuPT0g8kOtSnUL6K9Y8WkLXGIsDMO0k93yMa6zsczeP18iXZASO/mDLq iDnHZ2Tjpqho92FC7sLbge4Tec+xUJEb8oI6ZRvP8M5u3YfSjVg4afyDVJ/dsvrwBKOe rPnmQhOepIimY1kGWxZ2ahAnwPaaH4mIg7Nko8aXTSC7WvvuTMtnX2cnIZOgvq6VLqBe 60C14euvjPE3Ae5zH4t2p8xgPQTIz+02Q/FzlrpYLcnCi45GYwOMuo5dgaPItYV0s7jo +oQQj8X1Pi5AOK1eONty1vuG5EjmEH6v1CQW/RfjUGrV7gBwECv5VXKYrlkQHsxa8Ujv AZmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721238985; x=1721843785; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=T2VVk5PyeHtTdk/A97XvbaTgrv/WClTQyER4ZcY2QiY=; b=Ii9x6U9HCBNq8nRtwz5AAwIX1jEqUdHjJpaGMPe8G6ttVuTQLYx4091pZaaQuaeT5R zbJPKUk5JnxtTY1WPe3ZaNa8WmlEXLaFUFBizxhHxI2ebHRwPBc3LJBa0QTx598zVVsP UUpZzHqddiK4+pG9fcn1I+fgjpwj9TN37X1HAXoOGDTDjuck6oa2Xor2BAh1f2HC61MK kpAsjdKnvKPK5s848H2GM3+4dxUCRglnNoOskF+Ym4xAIuRy3cUHe7KuXStiCRLk8L4B Pc58+GD6ie4VmaNpnpM+kLdl5T6jI5Yr3HnFn1++BJhHkC3LXnqSUz/W33LL69Ny1K0Z +JQw== X-Gm-Message-State: AOJu0Yx90W2zAI5KWFhAH4lv1H9fSsy3shet0HLUNycp2i4L2HkjcmxX 285HbY71YycvS4ypZYzYfSt544UpWkRybBfM77yAfyTO5Jj5Y4uvS4lcDUQJa2L2WvhvFtvJiTn Op+gwXD2UFg== X-Google-Smtp-Source: AGHT+IEJyxRx1eMMXotXYawZJ6PJP7GBMT62wLxm7bLKetWDYGN8gwOE7cO5UHH+/Edaw0NfR0musQN3n4VJ0A== X-Received: from joshwash.sea.corp.google.com ([2620:15c:11c:202:9e5:24bd:1c5a:9cd9]) (user=joshwash job=sendgmr) by 2002:a05:6a00:1950:b0:705:bd9d:a7c9 with SMTP id d2e1a72fcca58-70ce4f4196cmr108939b3a.4.1721238984930; Wed, 17 Jul 2024 10:56:24 -0700 (PDT) Date: Wed, 17 Jul 2024 10:56:17 -0700 In-Reply-To: <20240717175619.3159026-1-joshwash@google.com> Mime-Version: 1.0 References: <20240717175619.3159026-1-joshwash@google.com> X-Mailer: git-send-email 2.45.2.993.g49e7a77208-goog Message-ID: <20240717175619.3159026-3-joshwash@google.com> Subject: [PATCH 2/4] net/gve: remove explicit field for Rx pages per QPL From: Joshua Washington To: Jeroen de Borst , Rushil Gupta , Joshua Washington Cc: dev@dpdk.org, Ferruh Yigit , Harshitha Ramamurthy Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org priv->rx_data_slot_cnt is a field that holds the number of pages per RX QPL as passed by the device. With the modify ring size feature, this field no longer makes sense, as there is a clearly defined relationship on GQ between the ring size and the number of pages per RX QPL (1:1). As such, when a user modifies the ring size, this value would be useless, as the ring size dictates the number of pages in the QPL, and each QPL "knows" how many pages it holds. tx_pages_per_qpl is unaffected by this because TX rings use a static number of pages per QPL. Signed-off-by: Joshua Washington Reviewed-by: Rushil Gupta Reviewed-by: Harshitha Ramamurthy --- drivers/net/gve/base/gve_adminq.c | 7 ------- drivers/net/gve/gve_ethdev.h | 3 +-- drivers/net/gve/gve_rx.c | 2 +- 3 files changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/net/gve/base/gve_adminq.c b/drivers/net/gve/base/gve_adminq.c index eb8bed0d9b..c25fefbd0f 100644 --- a/drivers/net/gve/base/gve_adminq.c +++ b/drivers/net/gve/base/gve_adminq.c @@ -837,14 +837,7 @@ int gve_adminq_describe_device(struct gve_priv *priv) PMD_DRV_LOG(INFO, "MAC addr: " RTE_ETHER_ADDR_PRT_FMT, RTE_ETHER_ADDR_BYTES(&priv->dev_addr)); priv->tx_pages_per_qpl = be16_to_cpu(descriptor->tx_pages_per_qpl); - priv->rx_data_slot_cnt = be16_to_cpu(descriptor->rx_pages_per_qpl); - if (gve_is_gqi(priv) && priv->rx_data_slot_cnt < priv->rx_desc_cnt) { - PMD_DRV_LOG(ERR, - "rx_data_slot_cnt cannot be smaller than rx_desc_cnt, setting rx_desc_cnt down to %d", - priv->rx_data_slot_cnt); - priv->rx_desc_cnt = priv->rx_data_slot_cnt; - } priv->default_num_queues = be16_to_cpu(descriptor->default_num_queues); gve_enable_supported_features(priv, supported_features_mask, diff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h index 1731c2ab93..393a4362c9 100644 --- a/drivers/net/gve/gve_ethdev.h +++ b/drivers/net/gve/gve_ethdev.h @@ -238,8 +238,7 @@ struct gve_priv { uint16_t max_rx_desc_cnt; uint16_t tx_desc_cnt; /* txq size */ uint16_t rx_desc_cnt; /* rxq size */ - uint16_t tx_pages_per_qpl; /* tx buffer length */ - uint16_t rx_data_slot_cnt; /* rx buffer length */ + uint16_t tx_pages_per_qpl; /* Only valid for DQO_RDA queue format */ uint16_t tx_compq_size; /* tx completion queue size */ diff --git a/drivers/net/gve/gve_rx.c b/drivers/net/gve/gve_rx.c index 41987ec870..d2c6920406 100644 --- a/drivers/net/gve/gve_rx.c +++ b/drivers/net/gve/gve_rx.c @@ -386,7 +386,7 @@ gve_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id, /* Allocate and register QPL for the queue. */ if (rxq->is_gqi_qpl) { rxq->qpl = gve_setup_queue_page_list(hw, queue_id, true, - hw->rx_data_slot_cnt); + nb_desc); if (!rxq->qpl) { PMD_DRV_LOG(ERR, "Failed to alloc rx qpl for queue %hu.", -- 2.45.2.803.g4e1b14247a-goog