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From: Gagandeep Singh <g.singh@nxp.com>
To: dev@dpdk.org, Hemant Agrawal <hemant.agrawal@nxp.com>
Cc: Jun Yang <jun.yang@nxp.com>
Subject: [v2 07/30] dma/dpaa2: borrow flags of DMA operation to pass job context
Date: Mon, 22 Jul 2024 17:28:20 +0530	[thread overview]
Message-ID: <20240722115843.1830105-8-g.singh@nxp.com> (raw)
In-Reply-To: <20240722115843.1830105-1-g.singh@nxp.com>

From: Jun Yang <jun.yang@nxp.com>

For copy_sg: pass job index lists.
For copy: pass job index.

Signed-off-by: Jun Yang <jun.yang@nxp.com>
---
 drivers/dma/dpaa2/dpaa2_qdma.c         | 92 ++++++++++++++------------
 drivers/dma/dpaa2/dpaa2_qdma.h         |  7 ++
 drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h | 15 ++++-
 3 files changed, 68 insertions(+), 46 deletions(-)

diff --git a/drivers/dma/dpaa2/dpaa2_qdma.c b/drivers/dma/dpaa2/dpaa2_qdma.c
index 7f6ebcb46b..7de4894b35 100644
--- a/drivers/dma/dpaa2/dpaa2_qdma.c
+++ b/drivers/dma/dpaa2/dpaa2_qdma.c
@@ -280,25 +280,22 @@ sg_entry_post_populate(const struct rte_dma_sge *src,
 	const struct rte_dma_sge *dst, struct qdma_cntx_sg *sg_cntx,
 	uint16_t nb_sge)
 {
-	uint16_t i = 0, idx;
-	uint32_t total_len = 0, len;
+	uint16_t i;
+	uint32_t total_len = 0;
 	struct qdma_sg_entry *src_sge = sg_cntx->sg_src_entry;
 	struct qdma_sg_entry *dst_sge = sg_cntx->sg_dst_entry;
 
 	for (i = 0; i < (nb_sge - 1); i++) {
 		if (unlikely(src[i].length != dst[i].length))
 			return -ENOTSUP;
-		len = RTE_DPAA2_QDMA_LEN_FROM_LENGTH(src[i].length);
-		idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(src[i].length);
 		src_sge->addr_lo = (uint32_t)src[i].addr;
 		src_sge->addr_hi = (src[i].addr >> 32);
-		src_sge->data_len.data_len_sl0 = len;
+		src_sge->data_len.data_len_sl0 = src[i].length;
 
 		dst_sge->addr_lo = (uint32_t)dst[i].addr;
 		dst_sge->addr_hi = (dst[i].addr >> 32);
-		dst_sge->data_len.data_len_sl0 = len;
-		total_len += len;
-		sg_cntx->cntx_idx[i] = idx;
+		dst_sge->data_len.data_len_sl0 = dst[i].length;
+		total_len += dst[i].length;
 
 		src_sge->ctrl.f = 0;
 		dst_sge->ctrl.f = 0;
@@ -309,19 +306,15 @@ sg_entry_post_populate(const struct rte_dma_sge *src,
 	if (unlikely(src[i].length != dst[i].length))
 		return -ENOTSUP;
 
-	len = RTE_DPAA2_QDMA_LEN_FROM_LENGTH(src[i].length);
-	idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(src[i].length);
-
 	src_sge->addr_lo = (uint32_t)src[i].addr;
 	src_sge->addr_hi = (src[i].addr >> 32);
-	src_sge->data_len.data_len_sl0 = len;
+	src_sge->data_len.data_len_sl0 = src[i].length;
 
 	dst_sge->addr_lo = (uint32_t)dst[i].addr;
 	dst_sge->addr_hi = (dst[i].addr >> 32);
-	dst_sge->data_len.data_len_sl0 = len;
+	dst_sge->data_len.data_len_sl0 = dst[i].length;
 
-	total_len += len;
-	sg_cntx->cntx_idx[i] = idx;
+	total_len += dst[i].length;
 	sg_cntx->job_nb = nb_sge;
 
 	src_sge->ctrl.f = QDMA_SG_F;
@@ -343,20 +336,18 @@ sg_entry_populate(const struct rte_dma_sge *src,
 	const struct rte_dma_sge *dst, struct qdma_cntx_sg *sg_cntx,
 	uint16_t nb_sge)
 {
-	uint16_t i, idx;
-	uint32_t total_len = 0, len;
+	uint16_t i;
+	uint32_t total_len = 0;
 	struct qdma_sg_entry *src_sge = sg_cntx->sg_src_entry;
 	struct qdma_sg_entry *dst_sge = sg_cntx->sg_dst_entry;
 
 	for (i = 0; i < nb_sge; i++) {
 		if (unlikely(src[i].length != dst[i].length))
 			return -ENOTSUP;
-		len = RTE_DPAA2_QDMA_LEN_FROM_LENGTH(src[i].length);
-		idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(src[i].length);
 
 		src_sge->addr_lo = (uint32_t)src[i].addr;
 		src_sge->addr_hi = (src[i].addr >> 32);
-		src_sge->data_len.data_len_sl0 = len;
+		src_sge->data_len.data_len_sl0 = src[i].length;
 		src_sge->ctrl.sl = QDMA_SG_SL_LONG;
 		src_sge->ctrl.fmt = QDMA_SG_FMT_SDB;
 #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
@@ -366,7 +357,7 @@ sg_entry_populate(const struct rte_dma_sge *src,
 #endif
 		dst_sge->addr_lo = (uint32_t)dst[i].addr;
 		dst_sge->addr_hi = (dst[i].addr >> 32);
-		dst_sge->data_len.data_len_sl0 = len;
+		dst_sge->data_len.data_len_sl0 = dst[i].length;
 		dst_sge->ctrl.sl = QDMA_SG_SL_LONG;
 		dst_sge->ctrl.fmt = QDMA_SG_FMT_SDB;
 #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
@@ -374,8 +365,7 @@ sg_entry_populate(const struct rte_dma_sge *src,
 #else
 		dst_sge->ctrl.bmt = QDMA_SG_BMT_DISABLE;
 #endif
-		total_len += len;
-		sg_cntx->cntx_idx[i] = idx;
+		total_len += src[i].length;
 
 		if (i == (nb_sge - 1)) {
 			src_sge->ctrl.f = QDMA_SG_F;
@@ -606,14 +596,15 @@ dpaa2_qdma_copy_sg(void *dev_private,
 	struct dpaa2_dpdmai_dev *dpdmai_dev = dev_private;
 	struct qdma_device *qdma_dev = dpdmai_dev->qdma_dev;
 	struct qdma_virt_queue *qdma_vq = &qdma_dev->vqs[vchan];
-	int ret = 0, expected;
-	uint32_t cntx_idx, len;
+	int ret = 0, expected, i;
+	uint32_t len;
 	struct qbman_fd *fd = &qdma_vq->fd[qdma_vq->fd_idx];
-	struct qdma_cntx_sg *cntx_sg;
+	struct qdma_cntx_sg *cntx_sg = NULL;
 	rte_iova_t cntx_iova, fle_iova, sdd_iova;
 	rte_iova_t src_sge_iova, dst_sge_iova;
 	struct qbman_fle *fle;
 	struct qdma_sdd *sdd;
+	const uint16_t *idx_addr = NULL;
 
 	if (unlikely(nb_src != nb_dst)) {
 		DPAA2_QDMA_ERR("SG entry src num(%d) != dst num(%d)",
@@ -630,14 +621,16 @@ dpaa2_qdma_copy_sg(void *dev_private,
 	memset(fd, 0, sizeof(struct qbman_fd));
 
 	if (qdma_dev->is_silent) {
-		cntx_idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(src[0].length);
-		cntx_sg = qdma_vq->cntx_sg[cntx_idx];
+		cntx_sg = qdma_vq->cntx_sg[qdma_vq->silent_idx];
 	} else {
 		ret = rte_mempool_get(qdma_vq->fle_pool,
 			(void **)&cntx_sg);
 		if (ret)
 			return ret;
 		DPAA2_SET_FD_FRC(fd, QDMA_SER_CTX);
+		idx_addr = DPAA2_QDMA_IDXADDR_FROM_SG_FLAG(flags);
+		for (i = 0; i < nb_src; i++)
+			cntx_sg->cntx_idx[i] = idx_addr[i];
 	}
 
 #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
@@ -656,8 +649,13 @@ dpaa2_qdma_copy_sg(void *dev_private,
 	DPAA2_SET_FD_FLC(fd, (uint64_t)cntx_sg);
 
 	if (qdma_vq->fle_pre_populate) {
-		if (unlikely(!fle[DPAA2_QDMA_SRC_FLE].length))
+		if (unlikely(!fle[DPAA2_QDMA_SRC_FLE].length)) {
 			fle_sdd_sg_pre_populate(cntx_sg, qdma_vq);
+			if (!qdma_dev->is_silent && cntx_sg && idx_addr) {
+				for (i = 0; i < nb_src; i++)
+					cntx_sg->cntx_idx[i] = idx_addr[i];
+			}
+		}
 
 		len = sg_entry_post_populate(src, dst,
 			cntx_sg, nb_src);
@@ -683,6 +681,8 @@ dpaa2_qdma_copy_sg(void *dev_private,
 		dpaa2_qdma_long_fmt_dump(cntx_sg->fle_sdd.fle);
 
 	qdma_vq->fd_idx++;
+	qdma_vq->silent_idx =
+		(qdma_vq->silent_idx + 1) & (DPAA2_QDMA_MAX_DESC - 1);
 
 	if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
 		expected = qdma_vq->fd_idx;
@@ -705,28 +705,23 @@ dpaa2_qdma_copy(void *dev_private, uint16_t vchan,
 	struct qdma_device *qdma_dev = dpdmai_dev->qdma_dev;
 	struct qdma_virt_queue *qdma_vq = &qdma_dev->vqs[vchan];
 	int ret = 0, expected;
-	uint16_t cntx_idx;
-	uint32_t len;
 	struct qbman_fd *fd = &qdma_vq->fd[qdma_vq->fd_idx];
-	struct qdma_cntx_long *cntx_long;
+	struct qdma_cntx_long *cntx_long = NULL;
 	rte_iova_t cntx_iova, fle_iova, sdd_iova;
 	struct qbman_fle *fle;
 	struct qdma_sdd *sdd;
 
 	memset(fd, 0, sizeof(struct qbman_fd));
 
-	cntx_idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(length);
-	len = RTE_DPAA2_QDMA_LEN_FROM_LENGTH(length);
-
 	if (qdma_dev->is_silent) {
-		cntx_long = qdma_vq->cntx_long[cntx_idx];
+		cntx_long = qdma_vq->cntx_long[qdma_vq->silent_idx];
 	} else {
 		ret = rte_mempool_get(qdma_vq->fle_pool,
 			(void **)&cntx_long);
 		if (ret)
 			return ret;
 		DPAA2_SET_FD_FRC(fd, QDMA_SER_CTX);
-		cntx_long->cntx_idx = cntx_idx;
+		cntx_long->cntx_idx = DPAA2_QDMA_IDX_FROM_FLAG(flags);
 	}
 
 #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
@@ -749,16 +744,20 @@ dpaa2_qdma_copy(void *dev_private, uint16_t vchan,
 			fle_sdd_pre_populate(&cntx_long->fle_sdd,
 				&qdma_vq->rbp,
 				0, 0, QBMAN_FLE_WORD4_FMT_SBF);
+			if (!qdma_dev->is_silent && cntx_long) {
+				cntx_long->cntx_idx =
+					DPAA2_QDMA_IDX_FROM_FLAG(flags);
+			}
 		}
 
-		fle_post_populate(fle, src, dst, len);
+		fle_post_populate(fle, src, dst, length);
 	} else {
 		sdd = cntx_long->fle_sdd.sdd;
 		sdd_iova = cntx_iova +
 			offsetof(struct qdma_cntx_long, fle_sdd) +
 			offsetof(struct qdma_cntx_fle_sdd, sdd);
 		fle_populate(fle, sdd, sdd_iova, &qdma_vq->rbp,
-			src, dst, len,
+			src, dst, length,
 			QBMAN_FLE_WORD4_FMT_SBF);
 	}
 
@@ -766,6 +765,8 @@ dpaa2_qdma_copy(void *dev_private, uint16_t vchan,
 		dpaa2_qdma_long_fmt_dump(cntx_long->fle_sdd.fle);
 
 	qdma_vq->fd_idx++;
+	qdma_vq->silent_idx =
+		(qdma_vq->silent_idx + 1) & (DPAA2_QDMA_MAX_DESC - 1);
 
 	if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
 		expected = qdma_vq->fd_idx;
@@ -963,14 +964,17 @@ dpaa2_qdma_info_get(const struct rte_dma_dev *dev,
 	struct dpaa2_dpdmai_dev *dpdmai_dev = dev->data->dev_private;
 
 	dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
-			     RTE_DMA_CAPA_MEM_TO_DEV |
-			     RTE_DMA_CAPA_DEV_TO_DEV |
-			     RTE_DMA_CAPA_DEV_TO_MEM |
-			     RTE_DMA_CAPA_SILENT |
-			     RTE_DMA_CAPA_OPS_COPY;
+		RTE_DMA_CAPA_MEM_TO_DEV |
+		RTE_DMA_CAPA_DEV_TO_DEV |
+		RTE_DMA_CAPA_DEV_TO_MEM |
+		RTE_DMA_CAPA_SILENT |
+		RTE_DMA_CAPA_OPS_COPY |
+		RTE_DMA_CAPA_OPS_COPY_SG;
+	dev_info->dev_capa |= RTE_DMA_CAPA_DPAA2_QDMA_FLAGS_INDEX;
 	dev_info->max_vchans = dpdmai_dev->num_queues;
 	dev_info->max_desc = DPAA2_QDMA_MAX_DESC;
 	dev_info->min_desc = DPAA2_QDMA_MIN_DESC;
+	dev_info->max_sges = RTE_DPAA2_QDMA_JOB_SUBMIT_MAX;
 	dev_info->dev_name = dev->device->name;
 	if (dpdmai_dev->qdma_dev)
 		dev_info->nb_vchans = dpdmai_dev->qdma_dev->num_vqs;
diff --git a/drivers/dma/dpaa2/dpaa2_qdma.h b/drivers/dma/dpaa2/dpaa2_qdma.h
index eb02bff08f..371393cb85 100644
--- a/drivers/dma/dpaa2/dpaa2_qdma.h
+++ b/drivers/dma/dpaa2/dpaa2_qdma.h
@@ -199,6 +199,12 @@ struct qdma_cntx_long {
 	uint16_t rsv[3];
 } __rte_packed;
 
+#define DPAA2_QDMA_IDXADDR_FROM_SG_FLAG(flag) \
+	((void *)(uintptr_t)((flag) - ((flag) & RTE_DPAA2_QDMA_SG_IDX_ADDR_MASK)))
+
+#define DPAA2_QDMA_IDX_FROM_FLAG(flag) \
+	((flag) >> RTE_DPAA2_QDMA_COPY_IDX_OFFSET)
+
 /** Represents a DPDMAI device */
 struct dpaa2_dpdmai_dev {
 	/** Pointer to Next device instance */
@@ -256,6 +262,7 @@ struct qdma_virt_queue {
 	/**Used for silent enabled*/
 	struct qdma_cntx_sg *cntx_sg[DPAA2_QDMA_MAX_DESC];
 	struct qdma_cntx_long *cntx_long[DPAA2_QDMA_MAX_DESC];
+	uint16_t silent_idx;
 
 	int num_valid_jobs;
 
diff --git a/drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h b/drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h
index 729bff42bb..e49604c8fc 100644
--- a/drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h
+++ b/drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2021-2022 NXP
+ * Copyright 2021-2023 NXP
  */
 
 #ifndef _RTE_PMD_DPAA2_QDMA_H_
@@ -20,6 +20,17 @@
 #define RTE_DPAA2_QDMA_LEN_FROM_LENGTH(length) \
 	((length) & RTE_DPAA2_QDMA_LEN_MASK)
 
-#define RTE_DPAA2_QDMA_JOB_SUBMIT_MAX (32 + 8)
+#define RTE_DPAA2_QDMA_COPY_IDX_OFFSET 8
+#define RTE_DPAA2_QDMA_SG_IDX_ADDR_ALIGN \
+	RTE_BIT64(RTE_DPAA2_QDMA_COPY_IDX_OFFSET)
+#define RTE_DPAA2_QDMA_SG_IDX_ADDR_MASK \
+	(RTE_DPAA2_QDMA_SG_IDX_ADDR_ALIGN - 1)
+#define RTE_DPAA2_QDMA_SG_SUBMIT(idx_addr, flag) \
+	(((uint64_t)idx_addr) | (flag))
+
+#define RTE_DPAA2_QDMA_COPY_SUBMIT(idx, flag) \
+	((idx << RTE_DPAA2_QDMA_COPY_IDX_OFFSET) | (flag))
 
+#define RTE_DPAA2_QDMA_JOB_SUBMIT_MAX (32 + 8)
+#define RTE_DMA_CAPA_DPAA2_QDMA_FLAGS_INDEX RTE_BIT64(63)
 #endif /* _RTE_PMD_DPAA2_QDMA_H_ */
-- 
2.25.1


  parent reply	other threads:[~2024-07-22 12:03 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-19 10:00 [PATCH 01/30] dma/dpaa2: configure route by port by PCIe port param Gagandeep Singh
2024-07-19 10:00 ` [PATCH 02/30] dma/dpaa2: support multiple HW queues Gagandeep Singh
2024-07-19 10:00 ` [PATCH 03/30] dma/dpaa2: adapt DMA driver API Gagandeep Singh
2024-07-19 10:01 ` [PATCH 04/30] dma/dpaa2: multiple process support Gagandeep Singh
2024-07-19 10:01 ` [PATCH 05/30] dma/dpaa2: add sanity check for SG entry Gagandeep Singh
2024-07-19 10:01 ` [PATCH 06/30] dma/dpaa2: include DPAA2 specific header files Gagandeep Singh
2024-07-19 10:01 ` [PATCH 07/30] dma/dpaa2: borrow flags of DMA operation to pass job context Gagandeep Singh
2024-07-19 10:01 ` [PATCH 08/30] bus/fslmc: enhance the qbman dq storage logic Gagandeep Singh
2024-07-19 10:01 ` [PATCH 09/30] dma/dpaa2: add short FD support Gagandeep Singh
2024-07-19 10:01 ` [PATCH 10/30] dma/dpaa2: limit the max descriptor number Gagandeep Singh
2024-07-19 10:01 ` [PATCH 11/30] dma/dpaa2: change the DMA copy return value Gagandeep Singh
2024-07-19 10:01 ` [PATCH 12/30] dma/dpaa2: move the qdma header to common place Gagandeep Singh
2024-07-19 10:01 ` [PATCH 13/30] dma/dpaa: support multi channels Gagandeep Singh
2024-07-19 10:01 ` [PATCH 14/30] dma/dpaa: fix job enqueue Gagandeep Singh
2024-07-19 10:01 ` [PATCH 15/30] dma/dpaa: add burst capacity API Gagandeep Singh
2024-07-19 10:01 ` [PATCH 16/30] dma/dpaa: add workaround for ERR050757 Gagandeep Singh
2024-07-19 10:01 ` [PATCH 17/30] dma/dpaa: qdma stall workaround for ERR050265 Gagandeep Singh
2024-07-19 10:01 ` [PATCH 18/30] dma/dpaa: remove unwanted desc Gagandeep Singh
2024-07-19 10:01 ` [PATCH 19/30] dma/dpaa: data path optimization Gagandeep Singh
2024-07-19 10:01 ` [PATCH 20/30] dma/dpaa: refactor driver Gagandeep Singh
2024-07-19 10:01 ` [PATCH 21/30] dma/dpaa: dequeue status queue Gagandeep Singh
2024-07-19 10:01 ` [PATCH 22/30] dma/dpaa: add Scatter Gather support Gagandeep Singh
2024-07-19 10:01 ` [PATCH 23/30] dma/dpaa: block dequeue Gagandeep Singh
2024-07-19 10:01 ` [PATCH 24/30] dma/dpaa: improve congestion handling Gagandeep Singh
2024-07-19 10:01 ` [PATCH 25/30] dma/dpaa: disable SG descriptor as default Gagandeep Singh
2024-07-19 10:01 ` [PATCH 26/30] dma/dpaa: improve ERRATA workaround solution Gagandeep Singh
2024-07-19 10:01 ` [PATCH 27/30] dma/dpaa: improve silent mode support Gagandeep Singh
2024-07-19 10:01 ` [PATCH 28/30] dma/dpaa: support multiple SG copies Gagandeep Singh
2024-07-19 10:01 ` [PATCH 29/30] dma/dpaa: support max SG entry size Gagandeep Singh
2024-07-19 10:01 ` [PATCH 30/30] bus/dpaa: add port bmi stats Gagandeep Singh
2024-07-22 11:58 ` [v2 00/30] NXP DMA driver fixes and Enhancements Gagandeep Singh
2024-07-22 11:58   ` [v2 01/30] dma/dpaa2: configure route by port by PCIe port param Gagandeep Singh
2024-07-22 11:58   ` [v2 02/30] dma/dpaa2: support multiple HW queues Gagandeep Singh
2024-07-22 11:58   ` [v2 03/30] dma/dpaa2: adapt DMA driver API Gagandeep Singh
2024-07-22 11:58   ` [v2 04/30] dma/dpaa2: multiple process support Gagandeep Singh
2024-07-22 11:58   ` [v2 05/30] dma/dpaa2: add sanity check for SG entry Gagandeep Singh
2024-07-22 11:58   ` [v2 06/30] dma/dpaa2: include DPAA2 specific header files Gagandeep Singh
2024-07-22 11:58   ` Gagandeep Singh [this message]
2024-07-22 11:58   ` [v2 08/30] bus/fslmc: enhance the qbman dq storage logic Gagandeep Singh
2024-07-22 11:58   ` [v2 09/30] dma/dpaa2: add short FD support Gagandeep Singh
2024-07-22 11:58   ` [v2 10/30] dma/dpaa2: limit the max descriptor number Gagandeep Singh
2024-07-22 11:58   ` [v2 11/30] dma/dpaa2: change the DMA copy return value Gagandeep Singh
2024-07-22 11:58   ` [v2 12/30] dma/dpaa2: move the qdma header to common place Gagandeep Singh
2024-07-22 11:58   ` [v2 13/30] dma/dpaa: support multi channels Gagandeep Singh
2024-07-22 11:58   ` [v2 14/30] dma/dpaa: fix job enqueue Gagandeep Singh
2024-07-22 11:58   ` [v2 15/30] dma/dpaa: add burst capacity API Gagandeep Singh
2024-07-22 11:58   ` [v2 16/30] dma/dpaa: add workaround for ERR050757 Gagandeep Singh
2024-07-22 11:58   ` [v2 17/30] dma/dpaa: qdma stall workaround for ERR050265 Gagandeep Singh
2024-07-22 11:58   ` [v2 18/30] dma/dpaa: remove unwanted desc Gagandeep Singh
2024-07-22 11:58   ` [v2 19/30] dma/dpaa: data path optimization Gagandeep Singh
2024-07-22 11:58   ` [v2 20/30] dma/dpaa: refactor driver Gagandeep Singh
2024-07-22 11:58   ` [v2 21/30] dma/dpaa: dequeue status queue Gagandeep Singh
2024-07-22 11:58   ` [v2 22/30] dma/dpaa: add Scatter Gather support Gagandeep Singh
2024-07-22 11:58   ` [v2 23/30] dma/dpaa: block dequeue Gagandeep Singh
2024-07-22 11:58   ` [v2 24/30] dma/dpaa: improve congestion handling Gagandeep Singh
2024-07-22 11:58   ` [v2 25/30] dma/dpaa: disable SG descriptor as default Gagandeep Singh
2024-07-22 11:58   ` [v2 26/30] dma/dpaa: improve ERRATA workaround solution Gagandeep Singh
2024-07-22 11:58   ` [v2 27/30] dma/dpaa: improve silent mode support Gagandeep Singh
2024-07-22 11:58   ` [v2 28/30] dma/dpaa: support multiple SG copies Gagandeep Singh
2024-07-22 11:58   ` [v2 29/30] dma/dpaa: support max SG entry size Gagandeep Singh
2024-07-22 11:58   ` [v2 30/30] bus/dpaa: add port bmi stats Gagandeep Singh
2024-07-22 16:39   ` [v3 00/30] NXP DMA driver fixes and Enhancements Gagandeep Singh
2024-07-22 16:39     ` [v3 01/30] dma/dpaa2: configure route by port by PCIe port param Gagandeep Singh
2024-07-22 16:39     ` [v3 02/30] dma/dpaa2: support multiple HW queues Gagandeep Singh
2024-07-22 20:19       ` Stephen Hemminger
2024-07-22 16:39     ` [v3 03/30] dma/dpaa2: adapt DMA driver API Gagandeep Singh
2024-07-22 16:39     ` [v3 04/30] dma/dpaa2: multiple process support Gagandeep Singh
2024-07-22 16:39     ` [v3 05/30] dma/dpaa2: add sanity check for SG entry Gagandeep Singh
2024-07-22 20:21       ` Stephen Hemminger
2024-07-22 16:39     ` [v3 06/30] dma/dpaa2: include DPAA2 specific header files Gagandeep Singh
2024-07-22 16:39     ` [v3 07/30] dma/dpaa2: borrow flags of DMA operation to pass job context Gagandeep Singh
2024-07-22 16:39     ` [v3 08/30] bus/fslmc: enhance the qbman dq storage logic Gagandeep Singh
2024-07-22 16:39     ` [v3 09/30] dma/dpaa2: add short FD support Gagandeep Singh
2024-07-22 16:39     ` [v3 10/30] dma/dpaa2: limit the max descriptor number Gagandeep Singh
2024-07-22 16:39     ` [v3 11/30] dma/dpaa2: change the DMA copy return value Gagandeep Singh
2024-07-22 16:39     ` [v3 12/30] dma/dpaa2: move the qdma header to common place Gagandeep Singh
2024-07-22 16:39     ` [v3 13/30] dma/dpaa: support multi channels Gagandeep Singh
2024-07-22 16:39     ` [v3 14/30] dma/dpaa: fix job enqueue Gagandeep Singh
2024-07-22 16:39     ` [v3 15/30] dma/dpaa: add burst capacity API Gagandeep Singh
2024-07-22 16:39     ` [v3 16/30] dma/dpaa: add workaround for ERR050757 Gagandeep Singh
2024-07-22 16:39     ` [v3 17/30] dma/dpaa: qdma stall workaround for ERR050265 Gagandeep Singh
2024-07-22 16:39     ` [v3 18/30] dma/dpaa: remove unwanted desc Gagandeep Singh
2024-07-22 16:39     ` [v3 19/30] dma/dpaa: data path optimization Gagandeep Singh
2024-07-22 16:39     ` [v3 20/30] dma/dpaa: refactor driver Gagandeep Singh
2024-07-22 16:39     ` [v3 21/30] dma/dpaa: dequeue status queue Gagandeep Singh
2024-07-22 16:39     ` [v3 22/30] dma/dpaa: add Scatter Gather support Gagandeep Singh
2024-07-22 16:39     ` [v3 23/30] dma/dpaa: block dequeue Gagandeep Singh
2024-07-22 16:39     ` [v3 24/30] dma/dpaa: improve congestion handling Gagandeep Singh
2024-07-22 16:39     ` [v3 25/30] dma/dpaa: disable SG descriptor as default Gagandeep Singh
2024-07-22 16:39     ` [v3 26/30] dma/dpaa: improve ERRATA workaround solution Gagandeep Singh
2024-07-22 16:39     ` [v3 27/30] dma/dpaa: improve silent mode support Gagandeep Singh
2024-07-22 16:39     ` [v3 28/30] dma/dpaa: support multiple SG copies Gagandeep Singh
2024-07-22 16:39     ` [v3 29/30] dma/dpaa: support max SG entry size Gagandeep Singh
2024-07-22 16:39     ` [v3 30/30] bus/dpaa: add port bmi stats Gagandeep Singh

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