From: Gagandeep Singh <g.singh@nxp.com>
To: dev@dpdk.org, Hemant Agrawal <hemant.agrawal@nxp.com>,
Sachin Saxena <sachin.saxena@nxp.com>
Cc: Jun Yang <jun.yang@nxp.com>
Subject: [v2 08/30] bus/fslmc: enhance the qbman dq storage logic
Date: Mon, 22 Jul 2024 17:28:21 +0530 [thread overview]
Message-ID: <20240722115843.1830105-9-g.singh@nxp.com> (raw)
In-Reply-To: <20240722115843.1830105-1-g.singh@nxp.com>
From: Jun Yang <jun.yang@nxp.com>
Multiple DQ storages are used among multiple cores, the single dq
storage of first union is leak if multiple storages are allocated.
It does not make sense to keep the single dq storage of union,
remove it and reuse the first dq storage of multiple storages
for this case.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
---
drivers/bus/fslmc/portal/dpaa2_hw_dpci.c | 25 ++-----
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 7 +-
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 38 +++++++++-
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 23 ++----
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 4 +-
drivers/dma/dpaa2/dpaa2_qdma.c | 43 ++---------
drivers/net/dpaa2/dpaa2_ethdev.c | 81 ++++++++-------------
drivers/net/dpaa2/dpaa2_rxtx.c | 19 +++--
drivers/raw/dpaa2_cmdif/dpaa2_cmdif.c | 4 +-
9 files changed, 103 insertions(+), 141 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
index 07256ed7ec..160126f6d6 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
@@ -81,22 +81,10 @@ rte_dpaa2_create_dpci_device(int vdev_fd __rte_unused,
}
/* Allocate DQ storage for the DPCI Rx queues */
- rxq = &(dpci_node->rx_queue[i]);
- rxq->q_storage = rte_malloc("dq_storage",
- sizeof(struct queue_storage_info_t),
- RTE_CACHE_LINE_SIZE);
- if (!rxq->q_storage) {
- DPAA2_BUS_ERR("q_storage allocation failed\n");
- ret = -ENOMEM;
+ rxq = &dpci_node->rx_queue[i];
+ ret = dpaa2_queue_storage_alloc(rxq, 1);
+ if (ret)
goto err;
- }
-
- memset(rxq->q_storage, 0, sizeof(struct queue_storage_info_t));
- ret = dpaa2_alloc_dq_storage(rxq->q_storage);
- if (ret) {
- DPAA2_BUS_ERR("dpaa2_alloc_dq_storage failed\n");
- goto err;
- }
}
/* Enable the device */
@@ -141,12 +129,9 @@ rte_dpaa2_create_dpci_device(int vdev_fd __rte_unused,
err:
for (i = 0; i < DPAA2_DPCI_MAX_QUEUES; i++) {
- struct dpaa2_queue *rxq = &(dpci_node->rx_queue[i]);
+ struct dpaa2_queue *rxq = &dpci_node->rx_queue[i];
- if (rxq->q_storage) {
- dpaa2_free_dq_storage(rxq->q_storage);
- rte_free(rxq->q_storage);
- }
+ dpaa2_queue_storage_free(rxq, 1);
}
rte_free(dpci_node);
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 4aec7b2cd8..a8afc772fd 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -574,6 +574,7 @@ dpaa2_free_dq_storage(struct queue_storage_info_t *q_storage)
for (i = 0; i < NUM_DQS_PER_QUEUE; i++) {
rte_free(q_storage->dq_storage[i]);
+ q_storage->dq_storage[i] = NULL;
}
}
@@ -583,7 +584,7 @@ dpaa2_alloc_dq_storage(struct queue_storage_info_t *q_storage)
int i = 0;
for (i = 0; i < NUM_DQS_PER_QUEUE; i++) {
- q_storage->dq_storage[i] = rte_malloc(NULL,
+ q_storage->dq_storage[i] = rte_zmalloc(NULL,
dpaa2_dqrr_size * sizeof(struct qbman_result),
RTE_CACHE_LINE_SIZE);
if (!q_storage->dq_storage[i])
@@ -591,8 +592,10 @@ dpaa2_alloc_dq_storage(struct queue_storage_info_t *q_storage)
}
return 0;
fail:
- while (--i >= 0)
+ while (--i >= 0) {
rte_free(q_storage->dq_storage[i]);
+ q_storage->dq_storage[i] = NULL;
+ }
return -1;
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 169c7917ea..1ce481c88d 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016-2021 NXP
+ * Copyright 2016-2024 NXP
*
*/
@@ -165,7 +165,9 @@ struct __rte_cache_aligned dpaa2_queue {
uint64_t tx_pkts;
uint64_t err_pkts;
union {
- struct queue_storage_info_t *q_storage;
+ /**Ingress*/
+ struct queue_storage_info_t *q_storage[RTE_MAX_LCORE];
+ /**Egress*/
struct qbman_result *cscn;
};
struct rte_event ev;
@@ -186,6 +188,38 @@ struct swp_active_dqs {
uint64_t reserved[7];
};
+#define dpaa2_queue_storage_alloc(q, num) \
+({ \
+ int ret = 0, i; \
+ \
+ for (i = 0; i < (num); i++) { \
+ (q)->q_storage[i] = rte_zmalloc(NULL, \
+ sizeof(struct queue_storage_info_t), \
+ RTE_CACHE_LINE_SIZE); \
+ if (!(q)->q_storage[i]) { \
+ ret = -ENOBUFS; \
+ break; \
+ } \
+ ret = dpaa2_alloc_dq_storage((q)->q_storage[i]); \
+ if (ret) \
+ break; \
+ } \
+ ret; \
+})
+
+#define dpaa2_queue_storage_free(q, num) \
+({ \
+ int i; \
+ \
+ for (i = 0; i < (num); i++) { \
+ if ((q)->q_storage[i]) { \
+ dpaa2_free_dq_storage((q)->q_storage[i]); \
+ rte_free((q)->q_storage[i]); \
+ (q)->q_storage[i] = NULL; \
+ } \
+ } \
+})
+
#define NUM_MAX_SWP 64
extern struct swp_active_dqs rte_global_active_dqs_list[NUM_MAX_SWP];
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index c1f7181d55..7df208d004 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1891,7 +1891,7 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
}
}
swp = DPAA2_PER_LCORE_PORTAL;
- dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0];
+ dq_storage = dpaa2_qp->rx_vq.q_storage[0]->dq_storage[0];
qbman_pull_desc_clear(&pulldesc);
qbman_pull_desc_set_numframes(&pulldesc,
@@ -1982,10 +1982,7 @@ dpaa2_sec_queue_pair_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
PMD_INIT_FUNC_TRACE();
- if (qp->rx_vq.q_storage) {
- dpaa2_free_dq_storage(qp->rx_vq.q_storage);
- rte_free(qp->rx_vq.q_storage);
- }
+ dpaa2_queue_storage_free(&qp->rx_vq, 1);
rte_mempool_free(qp->fle_pool);
rte_free(qp);
@@ -2036,18 +2033,10 @@ dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
qp->rx_vq.crypto_data = dev->data;
qp->tx_vq.crypto_data = dev->data;
- qp->rx_vq.q_storage = rte_malloc("sec dq storage",
- sizeof(struct queue_storage_info_t),
- RTE_CACHE_LINE_SIZE);
- if (!qp->rx_vq.q_storage) {
- DPAA2_SEC_ERR("malloc failed for q_storage");
- return -ENOMEM;
- }
- memset(qp->rx_vq.q_storage, 0, sizeof(struct queue_storage_info_t));
-
- if (dpaa2_alloc_dq_storage(qp->rx_vq.q_storage)) {
- DPAA2_SEC_ERR("Unable to allocate dequeue storage");
- return -ENOMEM;
+ retcode = dpaa2_queue_storage_alloc((&qp->rx_vq), 1);
+ if (retcode) {
+ dpaa2_queue_storage_free((&qp->rx_vq), 1);
+ return retcode;
}
dev->data->queue_pairs[qp_id] = qp;
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
index 4754b9d6f8..c51e68f748 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2021-2022 NXP
+ * Copyright 2021-2022, 2024 NXP
*/
#include <cryptodev_pmd.h>
@@ -853,7 +853,7 @@ dpaa2_sec_raw_dequeue_burst(void *qp_data, uint8_t *drv_ctx,
}
}
swp = DPAA2_PER_LCORE_PORTAL;
- dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0];
+ dq_storage = dpaa2_qp->rx_vq.q_storage[0]->dq_storage[0];
qbman_pull_desc_clear(&pulldesc);
qbman_pull_desc_set_numframes(&pulldesc,
diff --git a/drivers/dma/dpaa2/dpaa2_qdma.c b/drivers/dma/dpaa2/dpaa2_qdma.c
index 7de4894b35..53caccecd7 100644
--- a/drivers/dma/dpaa2/dpaa2_qdma.c
+++ b/drivers/dma/dpaa2/dpaa2_qdma.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018-2023 NXP
+ * Copyright 2018-2024 NXP
*/
#include <rte_eal.h>
@@ -824,7 +824,7 @@ dpaa2_qdma_dequeue(void *dev_private,
dpaa2_dqrr_size : nb_cpls;
rxq = &(dpdmai_dev->rx_queue[qdma_vq->vq_id]);
fqid = rxq->fqid;
- q_storage = rxq->q_storage;
+ q_storage = rxq->q_storage[0];
if (unlikely(!q_storage->active_dqs)) {
q_storage->toggle = 0;
@@ -1032,13 +1032,7 @@ dpaa2_qdma_configure(struct rte_dma_dev *dev,
qdma_dev->vqs[i].ring_cntx_idx = NULL;
}
rxq = &dpdmai_dev->rx_queue[i];
- if (rxq->q_storage) {
- DPAA2_QDMA_DEBUG("%s rxq[%d] re-configure",
- dev->data->dev_name, i);
- dpaa2_free_dq_storage(rxq->q_storage);
- rte_free(rxq->q_storage);
- rxq->q_storage = NULL;
- }
+ dpaa2_queue_storage_free(rxq, 1);
}
rte_free(qdma_dev->vqs);
qdma_dev->vqs = NULL;
@@ -1094,24 +1088,9 @@ dpaa2_qdma_configure(struct rte_dma_dev *dev,
qdma_dev->vqs[i].vq_id = i;
rxq = &dpdmai_dev->rx_queue[i];
/* Allocate DQ storage for the DPDMAI Rx queues */
- rxq->q_storage = rte_zmalloc(NULL,
- sizeof(struct queue_storage_info_t),
- RTE_CACHE_LINE_SIZE);
- if (!rxq->q_storage) {
- DPAA2_QDMA_ERR("%s Q[%d] storage alloc failed",
- dev->data->dev_name, i);
- ret = -ENOMEM;
- goto alloc_failed;
- }
-
- memset(rxq->q_storage, 0, sizeof(struct queue_storage_info_t));
- ret = dpaa2_alloc_dq_storage(rxq->q_storage);
- if (ret) {
- DPAA2_QDMA_ERR("%s Q[%d] dq storage alloc failed",
- dev->data->dev_name, i);
- ret = -ENOMEM;
+ ret = dpaa2_queue_storage_alloc(rxq, 1);
+ if (ret)
goto alloc_failed;
- }
}
qdma_dev->num_vqs = dev_conf->nb_vchans;
@@ -1122,11 +1101,7 @@ dpaa2_qdma_configure(struct rte_dma_dev *dev,
alloc_failed:
for (i = 0; i < dev_conf->nb_vchans; i++) {
rxq = &dpdmai_dev->rx_queue[i];
- if (rxq->q_storage) {
- dpaa2_free_dq_storage(rxq->q_storage);
- rte_free(rxq->q_storage);
- rxq->q_storage = NULL;
- }
+ dpaa2_queue_storage_free(rxq, 1);
}
rte_free(qdma_dev->vqs);
@@ -1324,11 +1299,7 @@ dpaa2_qdma_close(struct rte_dma_dev *dev)
/* Free RXQ storages */
for (i = 0; i < qdma_dev->num_vqs; i++) {
rxq = &dpdmai_dev->rx_queue[i];
- if (rxq->q_storage) {
- dpaa2_free_dq_storage(rxq->q_storage);
- rte_free(rxq->q_storage);
- rxq->q_storage = NULL;
- }
+ dpaa2_queue_storage_free(rxq, 1);
}
if (qdma_dev->vqs) {
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 449bbda7ca..ac524d2964 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -1,7 +1,7 @@
/* * SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016-2021 NXP
+ * Copyright 2016-2024 NXP
*
*/
@@ -366,7 +366,7 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
uint8_t num_rxqueue_per_tc;
struct dpaa2_queue *mc_q, *mcq;
uint32_t tot_queues;
- int i;
+ int i, ret = 0;
struct dpaa2_queue *dpaa2_q;
PMD_INIT_FUNC_TRACE();
@@ -386,16 +386,10 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
for (i = 0; i < priv->nb_rx_queues; i++) {
mc_q->eth_data = dev->data;
priv->rx_vq[i] = mc_q++;
- dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
- dpaa2_q->q_storage = rte_malloc("dq_storage",
- sizeof(struct queue_storage_info_t),
- RTE_CACHE_LINE_SIZE);
- if (!dpaa2_q->q_storage)
- goto fail;
-
- memset(dpaa2_q->q_storage, 0,
- sizeof(struct queue_storage_info_t));
- if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
+ dpaa2_q = priv->rx_vq[i];
+ ret = dpaa2_queue_storage_alloc(dpaa2_q,
+ RTE_MAX_LCORE);
+ if (ret)
goto fail;
}
@@ -405,19 +399,11 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
if (!priv->rx_err_vq)
goto fail;
- dpaa2_q = (struct dpaa2_queue *)priv->rx_err_vq;
- dpaa2_q->q_storage = rte_malloc("err_dq_storage",
- sizeof(struct queue_storage_info_t) *
- RTE_MAX_LCORE,
- RTE_CACHE_LINE_SIZE);
- if (!dpaa2_q->q_storage)
+ dpaa2_q = priv->rx_err_vq;
+ ret = dpaa2_queue_storage_alloc(dpaa2_q,
+ RTE_MAX_LCORE);
+ if (ret)
goto fail;
-
- memset(dpaa2_q->q_storage, 0,
- sizeof(struct queue_storage_info_t));
- for (i = 0; i < RTE_MAX_LCORE; i++)
- if (dpaa2_alloc_dq_storage(&dpaa2_q->q_storage[i]))
- goto fail;
}
for (i = 0; i < priv->nb_tx_queues; i++) {
@@ -438,24 +424,17 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
mc_q->tc_index = i;
mc_q->flow_id = 0;
priv->tx_conf_vq[i] = mc_q++;
- dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
- dpaa2_q->q_storage =
- rte_malloc("dq_storage",
- sizeof(struct queue_storage_info_t),
- RTE_CACHE_LINE_SIZE);
- if (!dpaa2_q->q_storage)
- goto fail_tx_conf;
-
- memset(dpaa2_q->q_storage, 0,
- sizeof(struct queue_storage_info_t));
- if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
+ dpaa2_q = priv->tx_conf_vq[i];
+ ret = dpaa2_queue_storage_alloc(dpaa2_q,
+ RTE_MAX_LCORE);
+ if (ret)
goto fail_tx_conf;
}
}
vq_id = 0;
for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
- mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
+ mcq = priv->rx_vq[vq_id];
mcq->tc_index = dist_idx / num_rxqueue_per_tc;
mcq->flow_id = dist_idx % num_rxqueue_per_tc;
vq_id++;
@@ -465,15 +444,15 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
fail_tx_conf:
i -= 1;
while (i >= 0) {
- dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
- rte_free(dpaa2_q->q_storage);
+ dpaa2_q = priv->tx_conf_vq[i];
+ dpaa2_queue_storage_free(dpaa2_q, RTE_MAX_LCORE);
priv->tx_conf_vq[i--] = NULL;
}
i = priv->nb_tx_queues;
fail_tx:
i -= 1;
while (i >= 0) {
- dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
+ dpaa2_q = priv->tx_vq[i];
rte_free(dpaa2_q->cscn);
priv->tx_vq[i--] = NULL;
}
@@ -482,17 +461,14 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
i -= 1;
mc_q = priv->rx_vq[0];
while (i >= 0) {
- dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
- dpaa2_free_dq_storage(dpaa2_q->q_storage);
- rte_free(dpaa2_q->q_storage);
+ dpaa2_q = priv->rx_vq[i];
+ dpaa2_queue_storage_free(dpaa2_q, RTE_MAX_LCORE);
priv->rx_vq[i--] = NULL;
}
if (dpaa2_enable_err_queue) {
- dpaa2_q = (struct dpaa2_queue *)priv->rx_err_vq;
- if (dpaa2_q->q_storage)
- dpaa2_free_dq_storage(dpaa2_q->q_storage);
- rte_free(dpaa2_q->q_storage);
+ dpaa2_q = priv->rx_err_vq;
+ dpaa2_queue_storage_free(dpaa2_q, RTE_MAX_LCORE);
}
rte_free(mc_q);
@@ -512,20 +488,21 @@ dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
if (priv->rx_vq[0]) {
/* cleaning up queue storage */
for (i = 0; i < priv->nb_rx_queues; i++) {
- dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
- rte_free(dpaa2_q->q_storage);
+ dpaa2_q = priv->rx_vq[i];
+ dpaa2_queue_storage_free(dpaa2_q,
+ RTE_MAX_LCORE);
}
/* cleanup tx queue cscn */
for (i = 0; i < priv->nb_tx_queues; i++) {
- dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
+ dpaa2_q = priv->tx_vq[i];
rte_free(dpaa2_q->cscn);
}
if (priv->flags & DPAA2_TX_CONF_ENABLE) {
/* cleanup tx conf queue storage */
for (i = 0; i < priv->nb_tx_queues; i++) {
- dpaa2_q = (struct dpaa2_queue *)
- priv->tx_conf_vq[i];
- rte_free(dpaa2_q->q_storage);
+ dpaa2_q = priv->tx_conf_vq[i];
+ dpaa2_queue_storage_free(dpaa2_q,
+ RTE_MAX_LCORE);
}
}
/*free memory for all queues (RX+TX) */
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 23f7c4132d..a0c057d183 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016-2021 NXP
+ * Copyright 2016-2024 NXP
*
*/
@@ -647,7 +647,7 @@ dump_err_pkts(struct dpaa2_queue *dpaa2_q)
}
swp = DPAA2_PER_LCORE_PORTAL;
- dq_storage = dpaa2_q->q_storage[lcore_id].dq_storage[0];
+ dq_storage = dpaa2_q->q_storage[lcore_id]->dq_storage[0];
qbman_pull_desc_clear(&pulldesc);
qbman_pull_desc_set_fq(&pulldesc, fqid);
qbman_pull_desc_set_storage(&pulldesc, dq_storage,
@@ -716,7 +716,7 @@ uint16_t
dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
{
/* Function receive frames for a given device and VQ*/
- struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
+ struct dpaa2_queue *dpaa2_q = queue;
struct qbman_result *dq_storage, *dq_storage1 = NULL;
uint32_t fqid = dpaa2_q->fqid;
int ret, num_rx = 0, pull_size;
@@ -724,10 +724,12 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
struct qbman_swp *swp;
const struct qbman_fd *fd;
struct qbman_pull_desc pulldesc;
- struct queue_storage_info_t *q_storage = dpaa2_q->q_storage;
+ struct queue_storage_info_t *q_storage;
struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
struct dpaa2_dev_priv *priv = eth_data->dev_private;
+ q_storage = dpaa2_q->q_storage[rte_lcore_id()];
+
if (unlikely(dpaa2_enable_err_queue))
dump_err_pkts(priv->rx_err_vq);
@@ -958,7 +960,7 @@ uint16_t
dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
{
/* Function receive frames for a given device and VQ */
- struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
+ struct dpaa2_queue *dpaa2_q = queue;
struct qbman_result *dq_storage;
uint32_t fqid = dpaa2_q->fqid;
int ret, num_rx = 0, next_pull = nb_pkts, num_pulled;
@@ -984,7 +986,7 @@ dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
swp = DPAA2_PER_LCORE_PORTAL;
do {
- dq_storage = dpaa2_q->q_storage->dq_storage[0];
+ dq_storage = dpaa2_q->q_storage[0]->dq_storage[0];
qbman_pull_desc_clear(&pulldesc);
qbman_pull_desc_set_fq(&pulldesc, fqid);
qbman_pull_desc_set_storage(&pulldesc, dq_storage,
@@ -1115,7 +1117,7 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
swp = DPAA2_PER_LCORE_PORTAL;
do {
- dq_storage = dpaa2_q->q_storage->dq_storage[0];
+ dq_storage = dpaa2_q->q_storage[0]->dq_storage[0];
qbman_pull_desc_clear(&pulldesc);
qbman_pull_desc_set_fq(&pulldesc, fqid);
qbman_pull_desc_set_storage(&pulldesc, dq_storage,
@@ -1954,12 +1956,13 @@ dpaa2_dev_loopback_rx(void *queue,
struct qbman_fd *fd[DPAA2_LX2_DQRR_RING_SIZE];
struct qbman_pull_desc pulldesc;
struct qbman_eq_desc eqdesc;
- struct queue_storage_info_t *q_storage = dpaa2_q->q_storage;
+ struct queue_storage_info_t *q_storage;
struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
struct dpaa2_dev_priv *priv = eth_data->dev_private;
struct dpaa2_queue *tx_q = priv->tx_vq[0];
/* todo - currently we are using 1st TX queue only for loopback*/
+ q_storage = dpaa2_q->q_storage[rte_lcore_id()];
if (unlikely(!DPAA2_PER_LCORE_ETHRX_DPIO)) {
ret = dpaa2_affine_qbman_ethrx_swp();
if (ret) {
diff --git a/drivers/raw/dpaa2_cmdif/dpaa2_cmdif.c b/drivers/raw/dpaa2_cmdif/dpaa2_cmdif.c
index aeee4ac289..5f4d0c68a4 100644
--- a/drivers/raw/dpaa2_cmdif/dpaa2_cmdif.c
+++ b/drivers/raw/dpaa2_cmdif/dpaa2_cmdif.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2019, 2024 NXP
*/
#include <stdio.h>
@@ -142,7 +142,7 @@ dpaa2_cmdif_dequeue_bufs(struct rte_rawdev *dev,
cmdif_rcv_cnxt = (struct rte_dpaa2_cmdif_context *)(context);
rxq = &(cidev->rx_queue[cmdif_rcv_cnxt->priority]);
- dq_storage = rxq->q_storage->dq_storage[0];
+ dq_storage = rxq->q_storage[0]->dq_storage[0];
qbman_pull_desc_clear(&pulldesc);
qbman_pull_desc_set_fq(&pulldesc, rxq->fqid);
--
2.25.1
next prev parent reply other threads:[~2024-07-22 11:59 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-19 10:00 [PATCH 01/30] dma/dpaa2: configure route by port by PCIe port param Gagandeep Singh
2024-07-19 10:00 ` [PATCH 02/30] dma/dpaa2: support multiple HW queues Gagandeep Singh
2024-07-19 10:00 ` [PATCH 03/30] dma/dpaa2: adapt DMA driver API Gagandeep Singh
2024-07-19 10:01 ` [PATCH 04/30] dma/dpaa2: multiple process support Gagandeep Singh
2024-07-19 10:01 ` [PATCH 05/30] dma/dpaa2: add sanity check for SG entry Gagandeep Singh
2024-07-19 10:01 ` [PATCH 06/30] dma/dpaa2: include DPAA2 specific header files Gagandeep Singh
2024-07-19 10:01 ` [PATCH 07/30] dma/dpaa2: borrow flags of DMA operation to pass job context Gagandeep Singh
2024-07-19 10:01 ` [PATCH 08/30] bus/fslmc: enhance the qbman dq storage logic Gagandeep Singh
2024-07-19 10:01 ` [PATCH 09/30] dma/dpaa2: add short FD support Gagandeep Singh
2024-07-19 10:01 ` [PATCH 10/30] dma/dpaa2: limit the max descriptor number Gagandeep Singh
2024-07-19 10:01 ` [PATCH 11/30] dma/dpaa2: change the DMA copy return value Gagandeep Singh
2024-07-19 10:01 ` [PATCH 12/30] dma/dpaa2: move the qdma header to common place Gagandeep Singh
2024-07-19 10:01 ` [PATCH 13/30] dma/dpaa: support multi channels Gagandeep Singh
2024-07-19 10:01 ` [PATCH 14/30] dma/dpaa: fix job enqueue Gagandeep Singh
2024-07-19 10:01 ` [PATCH 15/30] dma/dpaa: add burst capacity API Gagandeep Singh
2024-07-19 10:01 ` [PATCH 16/30] dma/dpaa: add workaround for ERR050757 Gagandeep Singh
2024-07-19 10:01 ` [PATCH 17/30] dma/dpaa: qdma stall workaround for ERR050265 Gagandeep Singh
2024-07-19 10:01 ` [PATCH 18/30] dma/dpaa: remove unwanted desc Gagandeep Singh
2024-07-19 10:01 ` [PATCH 19/30] dma/dpaa: data path optimization Gagandeep Singh
2024-07-19 10:01 ` [PATCH 20/30] dma/dpaa: refactor driver Gagandeep Singh
2024-07-19 10:01 ` [PATCH 21/30] dma/dpaa: dequeue status queue Gagandeep Singh
2024-07-19 10:01 ` [PATCH 22/30] dma/dpaa: add Scatter Gather support Gagandeep Singh
2024-07-19 10:01 ` [PATCH 23/30] dma/dpaa: block dequeue Gagandeep Singh
2024-07-19 10:01 ` [PATCH 24/30] dma/dpaa: improve congestion handling Gagandeep Singh
2024-07-19 10:01 ` [PATCH 25/30] dma/dpaa: disable SG descriptor as default Gagandeep Singh
2024-07-19 10:01 ` [PATCH 26/30] dma/dpaa: improve ERRATA workaround solution Gagandeep Singh
2024-07-19 10:01 ` [PATCH 27/30] dma/dpaa: improve silent mode support Gagandeep Singh
2024-07-19 10:01 ` [PATCH 28/30] dma/dpaa: support multiple SG copies Gagandeep Singh
2024-07-19 10:01 ` [PATCH 29/30] dma/dpaa: support max SG entry size Gagandeep Singh
2024-07-19 10:01 ` [PATCH 30/30] bus/dpaa: add port bmi stats Gagandeep Singh
2024-07-22 11:58 ` [v2 00/30] NXP DMA driver fixes and Enhancements Gagandeep Singh
2024-07-22 11:58 ` [v2 01/30] dma/dpaa2: configure route by port by PCIe port param Gagandeep Singh
2024-07-22 11:58 ` [v2 02/30] dma/dpaa2: support multiple HW queues Gagandeep Singh
2024-07-22 11:58 ` [v2 03/30] dma/dpaa2: adapt DMA driver API Gagandeep Singh
2024-07-22 11:58 ` [v2 04/30] dma/dpaa2: multiple process support Gagandeep Singh
2024-07-22 11:58 ` [v2 05/30] dma/dpaa2: add sanity check for SG entry Gagandeep Singh
2024-07-22 11:58 ` [v2 06/30] dma/dpaa2: include DPAA2 specific header files Gagandeep Singh
2024-07-22 11:58 ` [v2 07/30] dma/dpaa2: borrow flags of DMA operation to pass job context Gagandeep Singh
2024-07-22 11:58 ` Gagandeep Singh [this message]
2024-07-22 11:58 ` [v2 09/30] dma/dpaa2: add short FD support Gagandeep Singh
2024-07-22 11:58 ` [v2 10/30] dma/dpaa2: limit the max descriptor number Gagandeep Singh
2024-07-22 11:58 ` [v2 11/30] dma/dpaa2: change the DMA copy return value Gagandeep Singh
2024-07-22 11:58 ` [v2 12/30] dma/dpaa2: move the qdma header to common place Gagandeep Singh
2024-07-22 11:58 ` [v2 13/30] dma/dpaa: support multi channels Gagandeep Singh
2024-07-22 11:58 ` [v2 14/30] dma/dpaa: fix job enqueue Gagandeep Singh
2024-07-22 11:58 ` [v2 15/30] dma/dpaa: add burst capacity API Gagandeep Singh
2024-07-22 11:58 ` [v2 16/30] dma/dpaa: add workaround for ERR050757 Gagandeep Singh
2024-07-22 11:58 ` [v2 17/30] dma/dpaa: qdma stall workaround for ERR050265 Gagandeep Singh
2024-07-22 11:58 ` [v2 18/30] dma/dpaa: remove unwanted desc Gagandeep Singh
2024-07-22 11:58 ` [v2 19/30] dma/dpaa: data path optimization Gagandeep Singh
2024-07-22 11:58 ` [v2 20/30] dma/dpaa: refactor driver Gagandeep Singh
2024-07-22 11:58 ` [v2 21/30] dma/dpaa: dequeue status queue Gagandeep Singh
2024-07-22 11:58 ` [v2 22/30] dma/dpaa: add Scatter Gather support Gagandeep Singh
2024-07-22 11:58 ` [v2 23/30] dma/dpaa: block dequeue Gagandeep Singh
2024-07-22 11:58 ` [v2 24/30] dma/dpaa: improve congestion handling Gagandeep Singh
2024-07-22 11:58 ` [v2 25/30] dma/dpaa: disable SG descriptor as default Gagandeep Singh
2024-07-22 11:58 ` [v2 26/30] dma/dpaa: improve ERRATA workaround solution Gagandeep Singh
2024-07-22 11:58 ` [v2 27/30] dma/dpaa: improve silent mode support Gagandeep Singh
2024-07-22 11:58 ` [v2 28/30] dma/dpaa: support multiple SG copies Gagandeep Singh
2024-07-22 11:58 ` [v2 29/30] dma/dpaa: support max SG entry size Gagandeep Singh
2024-07-22 11:58 ` [v2 30/30] bus/dpaa: add port bmi stats Gagandeep Singh
2024-07-22 16:39 ` [v3 00/30] NXP DMA driver fixes and Enhancements Gagandeep Singh
2024-07-22 16:39 ` [v3 01/30] dma/dpaa2: configure route by port by PCIe port param Gagandeep Singh
2024-07-22 16:39 ` [v3 02/30] dma/dpaa2: support multiple HW queues Gagandeep Singh
2024-07-22 20:19 ` Stephen Hemminger
2024-07-22 16:39 ` [v3 03/30] dma/dpaa2: adapt DMA driver API Gagandeep Singh
2024-07-22 16:39 ` [v3 04/30] dma/dpaa2: multiple process support Gagandeep Singh
2024-07-22 16:39 ` [v3 05/30] dma/dpaa2: add sanity check for SG entry Gagandeep Singh
2024-07-22 20:21 ` Stephen Hemminger
2024-07-22 16:39 ` [v3 06/30] dma/dpaa2: include DPAA2 specific header files Gagandeep Singh
2024-07-22 16:39 ` [v3 07/30] dma/dpaa2: borrow flags of DMA operation to pass job context Gagandeep Singh
2024-07-22 16:39 ` [v3 08/30] bus/fslmc: enhance the qbman dq storage logic Gagandeep Singh
2024-07-22 16:39 ` [v3 09/30] dma/dpaa2: add short FD support Gagandeep Singh
2024-07-22 16:39 ` [v3 10/30] dma/dpaa2: limit the max descriptor number Gagandeep Singh
2024-07-22 16:39 ` [v3 11/30] dma/dpaa2: change the DMA copy return value Gagandeep Singh
2024-07-22 16:39 ` [v3 12/30] dma/dpaa2: move the qdma header to common place Gagandeep Singh
2024-07-22 16:39 ` [v3 13/30] dma/dpaa: support multi channels Gagandeep Singh
2024-07-22 16:39 ` [v3 14/30] dma/dpaa: fix job enqueue Gagandeep Singh
2024-07-22 16:39 ` [v3 15/30] dma/dpaa: add burst capacity API Gagandeep Singh
2024-07-22 16:39 ` [v3 16/30] dma/dpaa: add workaround for ERR050757 Gagandeep Singh
2024-07-22 16:39 ` [v3 17/30] dma/dpaa: qdma stall workaround for ERR050265 Gagandeep Singh
2024-07-22 16:39 ` [v3 18/30] dma/dpaa: remove unwanted desc Gagandeep Singh
2024-07-22 16:39 ` [v3 19/30] dma/dpaa: data path optimization Gagandeep Singh
2024-07-22 16:39 ` [v3 20/30] dma/dpaa: refactor driver Gagandeep Singh
2024-07-22 16:39 ` [v3 21/30] dma/dpaa: dequeue status queue Gagandeep Singh
2024-07-22 16:39 ` [v3 22/30] dma/dpaa: add Scatter Gather support Gagandeep Singh
2024-07-22 16:39 ` [v3 23/30] dma/dpaa: block dequeue Gagandeep Singh
2024-07-22 16:39 ` [v3 24/30] dma/dpaa: improve congestion handling Gagandeep Singh
2024-07-22 16:39 ` [v3 25/30] dma/dpaa: disable SG descriptor as default Gagandeep Singh
2024-07-22 16:39 ` [v3 26/30] dma/dpaa: improve ERRATA workaround solution Gagandeep Singh
2024-07-22 16:39 ` [v3 27/30] dma/dpaa: improve silent mode support Gagandeep Singh
2024-07-22 16:39 ` [v3 28/30] dma/dpaa: support multiple SG copies Gagandeep Singh
2024-07-22 16:39 ` [v3 29/30] dma/dpaa: support max SG entry size Gagandeep Singh
2024-07-22 16:39 ` [v3 30/30] bus/dpaa: add port bmi stats Gagandeep Singh
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