From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C18C845683; Mon, 22 Jul 2024 18:40:50 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AD88E40E1D; Mon, 22 Jul 2024 18:40:02 +0200 (CEST) Received: from DU2PR03CU002.outbound.protection.outlook.com (mail-northeuropeazon11012067.outbound.protection.outlook.com [52.101.66.67]) by mails.dpdk.org (Postfix) with ESMTP id B94E740E11 for ; Mon, 22 Jul 2024 18:39:59 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=we9NKTHFyzEdTP1jjIDr/8JLM+1bKGuPefEXnNsV4sYdTZq/wXCiBX9c4mFVxFTPrFBBX/pev2I3YaN+Wa5Wxg3iYycALBF+sLtzPn0cBWz8TXc0Uvr1MvigB0vO8rQ/qWrYUWCCtgBFgKLcE75oAmHiEqFcKddpss8XbgaghFkjD3Wqq5JLCJNxRrxR1rWlPcAQZQXzoyJkZhn5vHw05UyNhZCN4JkMl8hQbELLzVVcKHUEer3O4mKOmuB/34Q7mkDZMHra3PFwHe+cgAouhLNLXIlTh6JnayV9f1E6OIAaZZ4y+inRTHRs9mYrauV8cP82X82bCfq2tU64WpvjXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Nd4k4D4gKzdDG7grH8cG9DZORPVz18JX/fj3xysIugo=; b=IIuXrkFkw+jFs1LFATmL+u/AlEvmUC3AuKDpCdqkM4UYcDN5VXv+4dAGsPVEQm/DVV7oNbYT7Oa8zpmlvPztDKhV+XnJHBFV1CyYBcYXTbaaHRM5zH6gpAh3MFxvmesXeQ17QgxgSw4ogUmBzMreDWuujWa/qRMxCRBL9NhFf3CiVXTU5bzuX+81Lb+2n9zyU7OCrCpzVDSu2zKtBWQzAz5kvxm+saWNwbMh2jpXd9ic6cfzrYrMxfnWSjKx4kz65ncmkgRFWm4ZLRA04z8RIFzCUjxPts+YdfxN/qLNDhtqa00qIsbRdHekGbcgiTTC00aHvTK3MUvTBRgKO2V/YA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Nd4k4D4gKzdDG7grH8cG9DZORPVz18JX/fj3xysIugo=; b=XM/BgkxJlMxYDMdxYdqLvA1tyQqdlPTSUa3WywKKKXQvu+diYRqz5PTrqBmO2yWT5zLnq5oLf9YZ1qt6YhPOqwoaeFal5PcM0yaV0HXRqCroUly6w6JfyksV4idRvKARnn6CCSqTXB8sk+YCGVXbHWfSlpbRjD+HWGWc9wmXtA0= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AS8SPR01MB0024.eurprd04.prod.outlook.com (2603:10a6:20b:3d0::24) by VI1PR04MB6798.eurprd04.prod.outlook.com (2603:10a6:803:131::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7784.16; Mon, 22 Jul 2024 16:39:58 +0000 Received: from AS8SPR01MB0024.eurprd04.prod.outlook.com ([fe80::c634:479e:8f8a:a325]) by AS8SPR01MB0024.eurprd04.prod.outlook.com ([fe80::c634:479e:8f8a:a325%7]) with mapi id 15.20.7784.017; Mon, 22 Jul 2024 16:39:58 +0000 From: Gagandeep Singh To: dev@dpdk.org, Hemant Agrawal Cc: Jun Yang Subject: [v3 07/30] dma/dpaa2: borrow flags of DMA operation to pass job context Date: Mon, 22 Jul 2024 22:09:07 +0530 Message-Id: <20240722163930.2171568-8-g.singh@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240722163930.2171568-1-g.singh@nxp.com> References: <20240722115843.1830105-1-g.singh@nxp.com> <20240722163930.2171568-1-g.singh@nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SG3P274CA0014.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:be::26) To AS8SPR01MB0024.eurprd04.prod.outlook.com (2603:10a6:20b:3d0::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS8SPR01MB0024:EE_|VI1PR04MB6798:EE_ X-MS-Office365-Filtering-Correlation-Id: a786bc32-3038-4d71-c64e-08dcaa6cec6f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|52116014|1800799024|366016|38350700014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?kYKLlew5i4OOP5yHN6D7UAPSonYCVeIoLr70QGcfPGr/440VVnQYRTCULWNL?= =?us-ascii?Q?LVBJqa9qEkG49N7OiAUxgmTnNlUrIZ7mrDPEH3jyZ+fiydQ0Srjd/oKEQJKR?= =?us-ascii?Q?VsBbXqzEWZ2JeSM9gobhBFD9Vo6IEPjcBz2w8KT2k7TQBgXjGBsaye/j5299?= =?us-ascii?Q?LntpS4TAwg4gMc5kv90Hm4l6UUbTmtGEWef65HYn5z6DUoLTXcTDDlZEIUh+?= =?us-ascii?Q?pluTxkkpdtZqW93hQ2jGKRU09Idxk6gIr45lrRtNylZVsfG5mtyVMrnKkqw3?= =?us-ascii?Q?fqfaya0KKV88Hs54Jplgx/DCP2mikGyLt56j55vK9Wf9n1wa8IOIHGaAOaNY?= =?us-ascii?Q?sCGRfsKWBwbm0snPlQPTYRIzgWMX2+ATFqTy8pdOnA4GikTybMnCdpnCpnT/?= =?us-ascii?Q?SVoajqMR4fsx6GR0b5qmX4lHRtDqRbhQQwfxRN7hIATsm3Bu/Ye3df4wnt/G?= =?us-ascii?Q?cNxktD6tBf5eiHvdgQ7y6QofeADS56ZLbe2Sj9IWVG/LjCISu/RWjNSVx5Cc?= =?us-ascii?Q?+1pImbNlXl8OmZe6SZ/xjWb01OPgOFubEClySStdlL7C/lmNCcxv5Mabxyop?= =?us-ascii?Q?ki/DHxt0Mf4VdUhkuoBsLicZTlworMZftfY/QDKtkHXPWoJHLG+kFC9YmDzH?= =?us-ascii?Q?cL9NG9x4Hj5uhK6dq4UP1iRFytaOydj4M7Whizp+l8AOjrtg9IMXb5Nx6Ntk?= =?us-ascii?Q?374OeYLE6QyTU0r7rRZkLR0FSWsd/oj4xCAVWW1DNo7TQBsu0O+RiVh486dT?= =?us-ascii?Q?MKVjeSVMgo4DVKpKZ3yVX+SvWLkWWnsJMxKxSce1TyZp51s3oDXawyXbEXMS?= =?us-ascii?Q?H9iFtB58yaKnAn2Krw+hWNRuY0u1l32OknDBO9nV7jfCBV5Jmso1+6sWUFjs?= =?us-ascii?Q?ROLQuzIzALKwwX4pHjK4cxvxBzHrJu1UgwKyvTonw0Xpy9i0H7FdBrWY8yYj?= =?us-ascii?Q?2px6KbMvByMalsMDZAQ43bgQ59F9deKkBRmsD/N2JCinc9ZfXuEdicG8jVOl?= =?us-ascii?Q?+a1Hc5hrx2hO7Ws9/rF+B1uvevqoPFHtQbd/5FAhX+s2psCf06FvdiNaOn5y?= =?us-ascii?Q?55wcNQOgbM/sOBVCeB7vX6paYDIHytYxgfGJGn8BIJuETAHKqlzjoiXJODyi?= =?us-ascii?Q?DV3xB/+RZuv0dkf04DFedaaDeFmvoV6iaGwR0QpPuhQLYi9SM38ZrgcbIelJ?= =?us-ascii?Q?QVdvvjAlGggVW7jdkgN1Zl6FUl2DWx++1JGhdbYOlQMxoLzgNhITE3ETj25v?= =?us-ascii?Q?kLUDx3wCrIPbOQIIPifw0kbzBlXEo5i+cyM9G7IsbrWSdgh5itbIlG/cFe9W?= =?us-ascii?Q?p76PUI5HEVaMcICaMy+rv/fiEBjdDF/lZ0IqlbNAGJXMmR0QawFGV/yHnOOm?= =?us-ascii?Q?pLESJ38ZYSkIiZ7e8mgvtQ5ImGdyUyFr+95qx8ieTZveof0Agw=3D=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AS8SPR01MB0024.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(376014)(52116014)(1800799024)(366016)(38350700014); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?pFgkwsJWjmcbI1BJhKnmsdALOSq9ux2/mMplDq0escWSKNaVVbLU2F7hRgnS?= =?us-ascii?Q?VLKwf6qpaXCtyjByeFGyclMK+N50fvEVvROQpV7gihJtvqHi2WwB+sFq/rFD?= =?us-ascii?Q?1cllX/yYSsDf1oeyZ13cF9sFaMoyoqtU389Ro6W1UrWnX+bTn/Iy/tH4Fsjt?= =?us-ascii?Q?cc1Qzk7kaNaUXw7U+8eGt547XUAqV6/aHbU0RJnInecGk6PZ74z9bgXS7LKv?= =?us-ascii?Q?JVUlHzvVif5+Hm5aoQpGdsTHFQQfmmr4aW98xQP/CfYDszwovKEZTc5dNIFU?= =?us-ascii?Q?+ROLUUQXiM7w4nJaDMRHYyDzSJkO68kwszMVVwiTWSuHrB4H77Ol8IR3YQUC?= =?us-ascii?Q?BFeNOIWY25SXaAd6erIuBR8tCdmN9wuFfX6F9Z0PWtU/pMc5aLwzZfbdzOYR?= =?us-ascii?Q?CfyTfCPmLxUyiLd+qs5UVxXqjTd00FmA2+XzNnWAHXhKKX/gm6AKarFGfExI?= =?us-ascii?Q?0IXSB9uB6zrMBxIELLv0ki7G7D7nNFQDu29jDhVVPu6KJJ65hYAhqJqsZaIz?= =?us-ascii?Q?5oWexvQvZGbz5zc7QYnc7VMpQT5xtU7pSk72LlYhI2Y7kKdbcFCKZvtqjFEk?= =?us-ascii?Q?rQHDY6xevsudrW+zpWNpslDhfoXcBgESomC+xIkOiH9H9R75kduD66b+f7Ni?= =?us-ascii?Q?1YNHmYn9HU3oS1McnDAJHREzUY6hLkG4OLND2GH6PUcgtu8DF0kYHMKa+NCZ?= =?us-ascii?Q?XzsryHirj9jURAXZTz9A+yvA5k0BRiZEfD8bjUQRzkg86Lj2trtala2aMfVZ?= =?us-ascii?Q?T2Oop8QBlSNQRN/nyOlUvuwzBYXkhs3wjkxU42d0f6pUf5OE4C8D99nMRZtF?= =?us-ascii?Q?EQ3gelssYZDHIA0ratoyr06sNQH63Ud9FuixAygGcfWT8WJTo3ua7D4KKQIq?= =?us-ascii?Q?WC8xiZfxYKCiEWAyppNUN2TsHLkoJgiuaQOr8OiHt8qVORnxqmX0hiltGiCQ?= =?us-ascii?Q?gAGfnyrExHPIwW9fcVbxIisbp9VYwVt4ScTdj8NVayZbBzNHMDsdTdQH7D8M?= =?us-ascii?Q?htiAUsSLVdOi7VQsIfjEVxmibQOf1fZkiT8xdSHqj0szuiIEB2TZ6rkIqxHD?= =?us-ascii?Q?K3bHhQoY6Fw9EvsZIr3tgG489LOmhkVTQ5vt0FkyW1zehN09hfOju9+ZDLUD?= =?us-ascii?Q?isHKEIM/0rffbU3iO1sA7kq6R/RaGNqIg9hA30P5WZZTFsRX+mVfY3WUlIU5?= =?us-ascii?Q?b8JrpEDNG/YxwmCXzXvI1nag7TBGTP6fh+ZV/4YPPE80M18XXhcREq4NDma5?= =?us-ascii?Q?4wRjkXyPJEgUrzehJitsQ886DKsyJx1IYKff/tEJuS3xXaIBHbc2vx/snZQN?= =?us-ascii?Q?gu1dMbD66TvMfWyC7g+i4WaqaNg1z/cWMNtrUuLQtbf2klXEpAuEkXDYm2rQ?= =?us-ascii?Q?5pMb1wuSQqeShmxJCXyYL8OvVIx29Eh50OI0ds+IxLd/fVT0rfwvbqmwdeT5?= =?us-ascii?Q?W3zAgofd7U0AhxzK2fmsJOohoZaNgBzwhsZAK7Fe9sK2XUcKNwC0FF9oRLz4?= =?us-ascii?Q?d8Gk8kmb/2VBAlYew1PG1UcY50A44VG/xJ8we543VfbnW8HV4ABrM0Q8uzLy?= =?us-ascii?Q?sSUx2wfWRBnfUjYwn4Rvm0P8bPia00zNPh6CVv4Y?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a786bc32-3038-4d71-c64e-08dcaa6cec6f X-MS-Exchange-CrossTenant-AuthSource: AS8SPR01MB0024.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jul 2024 16:39:58.1266 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Qc0bsnkTvcSo7n0glvjNavqnQTotXSqPniW9g7DvShslmte5bHPmfGkKlesdylqI X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6798 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Jun Yang For copy_sg: pass job index lists. For copy: pass job index. Signed-off-by: Jun Yang --- drivers/dma/dpaa2/dpaa2_qdma.c | 92 ++++++++++++++------------ drivers/dma/dpaa2/dpaa2_qdma.h | 7 ++ drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h | 15 ++++- 3 files changed, 68 insertions(+), 46 deletions(-) diff --git a/drivers/dma/dpaa2/dpaa2_qdma.c b/drivers/dma/dpaa2/dpaa2_qdma.c index 7f6ebcb46b..7de4894b35 100644 --- a/drivers/dma/dpaa2/dpaa2_qdma.c +++ b/drivers/dma/dpaa2/dpaa2_qdma.c @@ -280,25 +280,22 @@ sg_entry_post_populate(const struct rte_dma_sge *src, const struct rte_dma_sge *dst, struct qdma_cntx_sg *sg_cntx, uint16_t nb_sge) { - uint16_t i = 0, idx; - uint32_t total_len = 0, len; + uint16_t i; + uint32_t total_len = 0; struct qdma_sg_entry *src_sge = sg_cntx->sg_src_entry; struct qdma_sg_entry *dst_sge = sg_cntx->sg_dst_entry; for (i = 0; i < (nb_sge - 1); i++) { if (unlikely(src[i].length != dst[i].length)) return -ENOTSUP; - len = RTE_DPAA2_QDMA_LEN_FROM_LENGTH(src[i].length); - idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(src[i].length); src_sge->addr_lo = (uint32_t)src[i].addr; src_sge->addr_hi = (src[i].addr >> 32); - src_sge->data_len.data_len_sl0 = len; + src_sge->data_len.data_len_sl0 = src[i].length; dst_sge->addr_lo = (uint32_t)dst[i].addr; dst_sge->addr_hi = (dst[i].addr >> 32); - dst_sge->data_len.data_len_sl0 = len; - total_len += len; - sg_cntx->cntx_idx[i] = idx; + dst_sge->data_len.data_len_sl0 = dst[i].length; + total_len += dst[i].length; src_sge->ctrl.f = 0; dst_sge->ctrl.f = 0; @@ -309,19 +306,15 @@ sg_entry_post_populate(const struct rte_dma_sge *src, if (unlikely(src[i].length != dst[i].length)) return -ENOTSUP; - len = RTE_DPAA2_QDMA_LEN_FROM_LENGTH(src[i].length); - idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(src[i].length); - src_sge->addr_lo = (uint32_t)src[i].addr; src_sge->addr_hi = (src[i].addr >> 32); - src_sge->data_len.data_len_sl0 = len; + src_sge->data_len.data_len_sl0 = src[i].length; dst_sge->addr_lo = (uint32_t)dst[i].addr; dst_sge->addr_hi = (dst[i].addr >> 32); - dst_sge->data_len.data_len_sl0 = len; + dst_sge->data_len.data_len_sl0 = dst[i].length; - total_len += len; - sg_cntx->cntx_idx[i] = idx; + total_len += dst[i].length; sg_cntx->job_nb = nb_sge; src_sge->ctrl.f = QDMA_SG_F; @@ -343,20 +336,18 @@ sg_entry_populate(const struct rte_dma_sge *src, const struct rte_dma_sge *dst, struct qdma_cntx_sg *sg_cntx, uint16_t nb_sge) { - uint16_t i, idx; - uint32_t total_len = 0, len; + uint16_t i; + uint32_t total_len = 0; struct qdma_sg_entry *src_sge = sg_cntx->sg_src_entry; struct qdma_sg_entry *dst_sge = sg_cntx->sg_dst_entry; for (i = 0; i < nb_sge; i++) { if (unlikely(src[i].length != dst[i].length)) return -ENOTSUP; - len = RTE_DPAA2_QDMA_LEN_FROM_LENGTH(src[i].length); - idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(src[i].length); src_sge->addr_lo = (uint32_t)src[i].addr; src_sge->addr_hi = (src[i].addr >> 32); - src_sge->data_len.data_len_sl0 = len; + src_sge->data_len.data_len_sl0 = src[i].length; src_sge->ctrl.sl = QDMA_SG_SL_LONG; src_sge->ctrl.fmt = QDMA_SG_FMT_SDB; #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA @@ -366,7 +357,7 @@ sg_entry_populate(const struct rte_dma_sge *src, #endif dst_sge->addr_lo = (uint32_t)dst[i].addr; dst_sge->addr_hi = (dst[i].addr >> 32); - dst_sge->data_len.data_len_sl0 = len; + dst_sge->data_len.data_len_sl0 = dst[i].length; dst_sge->ctrl.sl = QDMA_SG_SL_LONG; dst_sge->ctrl.fmt = QDMA_SG_FMT_SDB; #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA @@ -374,8 +365,7 @@ sg_entry_populate(const struct rte_dma_sge *src, #else dst_sge->ctrl.bmt = QDMA_SG_BMT_DISABLE; #endif - total_len += len; - sg_cntx->cntx_idx[i] = idx; + total_len += src[i].length; if (i == (nb_sge - 1)) { src_sge->ctrl.f = QDMA_SG_F; @@ -606,14 +596,15 @@ dpaa2_qdma_copy_sg(void *dev_private, struct dpaa2_dpdmai_dev *dpdmai_dev = dev_private; struct qdma_device *qdma_dev = dpdmai_dev->qdma_dev; struct qdma_virt_queue *qdma_vq = &qdma_dev->vqs[vchan]; - int ret = 0, expected; - uint32_t cntx_idx, len; + int ret = 0, expected, i; + uint32_t len; struct qbman_fd *fd = &qdma_vq->fd[qdma_vq->fd_idx]; - struct qdma_cntx_sg *cntx_sg; + struct qdma_cntx_sg *cntx_sg = NULL; rte_iova_t cntx_iova, fle_iova, sdd_iova; rte_iova_t src_sge_iova, dst_sge_iova; struct qbman_fle *fle; struct qdma_sdd *sdd; + const uint16_t *idx_addr = NULL; if (unlikely(nb_src != nb_dst)) { DPAA2_QDMA_ERR("SG entry src num(%d) != dst num(%d)", @@ -630,14 +621,16 @@ dpaa2_qdma_copy_sg(void *dev_private, memset(fd, 0, sizeof(struct qbman_fd)); if (qdma_dev->is_silent) { - cntx_idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(src[0].length); - cntx_sg = qdma_vq->cntx_sg[cntx_idx]; + cntx_sg = qdma_vq->cntx_sg[qdma_vq->silent_idx]; } else { ret = rte_mempool_get(qdma_vq->fle_pool, (void **)&cntx_sg); if (ret) return ret; DPAA2_SET_FD_FRC(fd, QDMA_SER_CTX); + idx_addr = DPAA2_QDMA_IDXADDR_FROM_SG_FLAG(flags); + for (i = 0; i < nb_src; i++) + cntx_sg->cntx_idx[i] = idx_addr[i]; } #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA @@ -656,8 +649,13 @@ dpaa2_qdma_copy_sg(void *dev_private, DPAA2_SET_FD_FLC(fd, (uint64_t)cntx_sg); if (qdma_vq->fle_pre_populate) { - if (unlikely(!fle[DPAA2_QDMA_SRC_FLE].length)) + if (unlikely(!fle[DPAA2_QDMA_SRC_FLE].length)) { fle_sdd_sg_pre_populate(cntx_sg, qdma_vq); + if (!qdma_dev->is_silent && cntx_sg && idx_addr) { + for (i = 0; i < nb_src; i++) + cntx_sg->cntx_idx[i] = idx_addr[i]; + } + } len = sg_entry_post_populate(src, dst, cntx_sg, nb_src); @@ -683,6 +681,8 @@ dpaa2_qdma_copy_sg(void *dev_private, dpaa2_qdma_long_fmt_dump(cntx_sg->fle_sdd.fle); qdma_vq->fd_idx++; + qdma_vq->silent_idx = + (qdma_vq->silent_idx + 1) & (DPAA2_QDMA_MAX_DESC - 1); if (flags & RTE_DMA_OP_FLAG_SUBMIT) { expected = qdma_vq->fd_idx; @@ -705,28 +705,23 @@ dpaa2_qdma_copy(void *dev_private, uint16_t vchan, struct qdma_device *qdma_dev = dpdmai_dev->qdma_dev; struct qdma_virt_queue *qdma_vq = &qdma_dev->vqs[vchan]; int ret = 0, expected; - uint16_t cntx_idx; - uint32_t len; struct qbman_fd *fd = &qdma_vq->fd[qdma_vq->fd_idx]; - struct qdma_cntx_long *cntx_long; + struct qdma_cntx_long *cntx_long = NULL; rte_iova_t cntx_iova, fle_iova, sdd_iova; struct qbman_fle *fle; struct qdma_sdd *sdd; memset(fd, 0, sizeof(struct qbman_fd)); - cntx_idx = RTE_DPAA2_QDMA_IDX_FROM_LENGTH(length); - len = RTE_DPAA2_QDMA_LEN_FROM_LENGTH(length); - if (qdma_dev->is_silent) { - cntx_long = qdma_vq->cntx_long[cntx_idx]; + cntx_long = qdma_vq->cntx_long[qdma_vq->silent_idx]; } else { ret = rte_mempool_get(qdma_vq->fle_pool, (void **)&cntx_long); if (ret) return ret; DPAA2_SET_FD_FRC(fd, QDMA_SER_CTX); - cntx_long->cntx_idx = cntx_idx; + cntx_long->cntx_idx = DPAA2_QDMA_IDX_FROM_FLAG(flags); } #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA @@ -749,16 +744,20 @@ dpaa2_qdma_copy(void *dev_private, uint16_t vchan, fle_sdd_pre_populate(&cntx_long->fle_sdd, &qdma_vq->rbp, 0, 0, QBMAN_FLE_WORD4_FMT_SBF); + if (!qdma_dev->is_silent && cntx_long) { + cntx_long->cntx_idx = + DPAA2_QDMA_IDX_FROM_FLAG(flags); + } } - fle_post_populate(fle, src, dst, len); + fle_post_populate(fle, src, dst, length); } else { sdd = cntx_long->fle_sdd.sdd; sdd_iova = cntx_iova + offsetof(struct qdma_cntx_long, fle_sdd) + offsetof(struct qdma_cntx_fle_sdd, sdd); fle_populate(fle, sdd, sdd_iova, &qdma_vq->rbp, - src, dst, len, + src, dst, length, QBMAN_FLE_WORD4_FMT_SBF); } @@ -766,6 +765,8 @@ dpaa2_qdma_copy(void *dev_private, uint16_t vchan, dpaa2_qdma_long_fmt_dump(cntx_long->fle_sdd.fle); qdma_vq->fd_idx++; + qdma_vq->silent_idx = + (qdma_vq->silent_idx + 1) & (DPAA2_QDMA_MAX_DESC - 1); if (flags & RTE_DMA_OP_FLAG_SUBMIT) { expected = qdma_vq->fd_idx; @@ -963,14 +964,17 @@ dpaa2_qdma_info_get(const struct rte_dma_dev *dev, struct dpaa2_dpdmai_dev *dpdmai_dev = dev->data->dev_private; dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM | - RTE_DMA_CAPA_MEM_TO_DEV | - RTE_DMA_CAPA_DEV_TO_DEV | - RTE_DMA_CAPA_DEV_TO_MEM | - RTE_DMA_CAPA_SILENT | - RTE_DMA_CAPA_OPS_COPY; + RTE_DMA_CAPA_MEM_TO_DEV | + RTE_DMA_CAPA_DEV_TO_DEV | + RTE_DMA_CAPA_DEV_TO_MEM | + RTE_DMA_CAPA_SILENT | + RTE_DMA_CAPA_OPS_COPY | + RTE_DMA_CAPA_OPS_COPY_SG; + dev_info->dev_capa |= RTE_DMA_CAPA_DPAA2_QDMA_FLAGS_INDEX; dev_info->max_vchans = dpdmai_dev->num_queues; dev_info->max_desc = DPAA2_QDMA_MAX_DESC; dev_info->min_desc = DPAA2_QDMA_MIN_DESC; + dev_info->max_sges = RTE_DPAA2_QDMA_JOB_SUBMIT_MAX; dev_info->dev_name = dev->device->name; if (dpdmai_dev->qdma_dev) dev_info->nb_vchans = dpdmai_dev->qdma_dev->num_vqs; diff --git a/drivers/dma/dpaa2/dpaa2_qdma.h b/drivers/dma/dpaa2/dpaa2_qdma.h index eb02bff08f..371393cb85 100644 --- a/drivers/dma/dpaa2/dpaa2_qdma.h +++ b/drivers/dma/dpaa2/dpaa2_qdma.h @@ -199,6 +199,12 @@ struct qdma_cntx_long { uint16_t rsv[3]; } __rte_packed; +#define DPAA2_QDMA_IDXADDR_FROM_SG_FLAG(flag) \ + ((void *)(uintptr_t)((flag) - ((flag) & RTE_DPAA2_QDMA_SG_IDX_ADDR_MASK))) + +#define DPAA2_QDMA_IDX_FROM_FLAG(flag) \ + ((flag) >> RTE_DPAA2_QDMA_COPY_IDX_OFFSET) + /** Represents a DPDMAI device */ struct dpaa2_dpdmai_dev { /** Pointer to Next device instance */ @@ -256,6 +262,7 @@ struct qdma_virt_queue { /**Used for silent enabled*/ struct qdma_cntx_sg *cntx_sg[DPAA2_QDMA_MAX_DESC]; struct qdma_cntx_long *cntx_long[DPAA2_QDMA_MAX_DESC]; + uint16_t silent_idx; int num_valid_jobs; diff --git a/drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h b/drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h index 729bff42bb..e49604c8fc 100644 --- a/drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h +++ b/drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright 2021-2022 NXP + * Copyright 2021-2023 NXP */ #ifndef _RTE_PMD_DPAA2_QDMA_H_ @@ -20,6 +20,17 @@ #define RTE_DPAA2_QDMA_LEN_FROM_LENGTH(length) \ ((length) & RTE_DPAA2_QDMA_LEN_MASK) -#define RTE_DPAA2_QDMA_JOB_SUBMIT_MAX (32 + 8) +#define RTE_DPAA2_QDMA_COPY_IDX_OFFSET 8 +#define RTE_DPAA2_QDMA_SG_IDX_ADDR_ALIGN \ + RTE_BIT64(RTE_DPAA2_QDMA_COPY_IDX_OFFSET) +#define RTE_DPAA2_QDMA_SG_IDX_ADDR_MASK \ + (RTE_DPAA2_QDMA_SG_IDX_ADDR_ALIGN - 1) +#define RTE_DPAA2_QDMA_SG_SUBMIT(idx_addr, flag) \ + (((uint64_t)idx_addr) | (flag)) + +#define RTE_DPAA2_QDMA_COPY_SUBMIT(idx, flag) \ + ((idx << RTE_DPAA2_QDMA_COPY_IDX_OFFSET) | (flag)) +#define RTE_DPAA2_QDMA_JOB_SUBMIT_MAX (32 + 8) +#define RTE_DMA_CAPA_DPAA2_QDMA_FLAGS_INDEX RTE_BIT64(63) #endif /* _RTE_PMD_DPAA2_QDMA_H_ */ -- 2.25.1