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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BN2PEPF000055DA.mail.protection.outlook.com (10.167.245.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7784.5 via Frontend Transport; Tue, 23 Jul 2024 08:16:10 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 23 Jul 2024 01:15:58 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 23 Jul 2024 01:15:55 -0700 From: Bing Zhao To: , , , CC: , , Subject: [PATCH 3/4] net/mlx5: fix matcher mask translation Date: Tue, 23 Jul 2024 11:15:21 +0300 Message-ID: <20240723081522.1087433-4-bingz@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240723081522.1087433-1-bingz@nvidia.com> References: <20240723081522.1087433-1-bingz@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000055DA:EE_|PH7PR12MB8178:EE_ X-MS-Office365-Filtering-Correlation-Id: bf6089e6-d0b6-4a40-b0df-08dcaaefb5e9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(376014)(1800799024)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2024 08:16:10.3633 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bf6089e6-d0b6-4a40-b0df-08dcaaefb5e9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000055DA.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8178 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In non-template API implementation on HWS, the matcher mask is translated using DV item translation. This is used to find and reuse the same matcher in the PMD for rules insertion when possible. The flags calculated previously for items should not be passed to avoid incorrectly recognizing the layers. In the meanwhile, unlike in template API, the group information is also needed for the mask translation. Fixes: 27d171b88031 ("net/mlx5: abstract flow action and enable reconfigure") Signed-off-by: Bing Zhao Acked-by: Dariusz Sosnowski --- drivers/net/mlx5/mlx5_flow_dv.c | 1 + drivers/net/mlx5/mlx5_flow_hw.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 89057edbcf..a51d4dd1a4 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -14538,6 +14538,7 @@ __flow_dv_translate_items_hws(const struct rte_flow_item *items, .next_protocol = 0xff, .attr = &rattr, .rss_desc = &rss_desc, + .group = attr->group, }; int ret = 0; diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 470919fe8a..46f6665846 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -13682,7 +13682,7 @@ flow_hw_create_flow(struct rte_eth_dev *dev, enum mlx5_flow_type type, .rss_level = 0, .act_flags = action_flags, .tbl_type = 0, - }; + }; memset(&hw_act, 0, sizeof(hw_act)); if (attr->transfer) @@ -13702,7 +13702,7 @@ flow_hw_create_flow(struct rte_eth_dev *dev, enum mlx5_flow_type type, (*flow)->nt_rule = true; (*flow)->nt2hws->matcher = &matcher; ret = flow_dv_translate_items_hws(items, &flow_attr, &matcher.mask.buf, - MLX5_SET_MATCHER_HS_M, &item_flags, + MLX5_SET_MATCHER_HS_M, NULL, NULL, error); if (ret) -- 2.34.1