From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 23723456AC; Thu, 25 Jul 2024 19:19:50 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 033C2427A9; Thu, 25 Jul 2024 19:19:50 +0200 (CEST) Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) by mails.dpdk.org (Postfix) with ESMTP id 50418402AB for ; Thu, 25 Jul 2024 19:17:39 +0200 (CEST) Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-1fbc3a9d23bso8704805ad.1 for ; Thu, 25 Jul 2024 10:17:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20230601.gappssmtp.com; s=20230601; t=1721927858; x=1722532658; darn=dpdk.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=Q/exUQMsSxhCA9Cfb2gP8bKMNA1P+R5bOoEe30Rj9Lw=; b=eCJReF2E1eO3SqBVMQUpXNP8R524IBoNlfH4chP1AUWZStWLwckM1EhCDHnnadtT4X w1U4RdX8jVME9nIiLbQcOyZLGOEYJrF9hPTR6fChNJzDnHXhHH6qdmCrqsSmunFt3SNm XCKi84zofcqHLdnJRUoTwCPfk55sy7xw2KDn9iV3pnps+4hTCpxCeTPxJN4VMPYGKdC1 OG5/6x9efwv6Bk/RZQg7VpXwX1eML6IBTxZozCPj8TDixr13itOUzG1Ucy7bb3GnPbfP EybBJzbFFNc5K7pagBcZ7x+Usn30m/Z4LV0SWyQ8v1gU6O1KQFli1AS3iMwEgEkEF9IS yvYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721927858; x=1722532658; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=Q/exUQMsSxhCA9Cfb2gP8bKMNA1P+R5bOoEe30Rj9Lw=; b=WVF/b9W+rFzYgIBM1awi650x6FERn6Qqt7flt6WE3ysUkEXE0b1AIp5EkZXWhhlTev Ntot7WPO3NCdCwzeyHkgZO2Twm1LCx9IXikYMmTHZ3R/E3yrnGUKDwO4LZgxJ8LLG8jf Ae3kQn8UHSTCrSx24R+LWjXP/bVwXWoAHA8UanKD1qMxqCEdqHyvYx93o/C5qshbhhDp gdb/D4n2YvaI5WoaB4FI767E9lQIZCdXma2v3Z/4r0PCdiQ+5Nsw2kTntEPH9d0FVhj7 iBsIxalDkCguhMgDQs973FyaNCnzEdS2D20bhIwLvwuwRZ8QxvemyG8sq+sMTWJ05A0o DgzA== X-Gm-Message-State: AOJu0Ywi7oSysAhi5iJb1oRWBkyxlUj8Is1ARptoIkba5wMHlwKHDRo7 bnEcn4uNHC/58l8G6de0yfUWEQbVvrS34Qvt/g67S+aTjt1pTs99n/i9pZCTB5Ub6xO4D1uymAs v X-Google-Smtp-Source: AGHT+IEgli2LYsppuX7RDleysu0KuBQ7WFTlr6UJsA2AynXJG85JUYSRJ5ib+G/E/5X1wSjnESURZA== X-Received: by 2002:a17:902:eccb:b0:1fd:a503:88f0 with SMTP id d9443c01a7336-1fed38a7b75mr42785515ad.34.1721927858347; Thu, 25 Jul 2024 10:17:38 -0700 (PDT) Received: from hermes.local (204-195-96-226.wavecable.com. [204.195.96.226]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1fed7f1ca6bsm16640405ad.199.2024.07.25.10.17.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jul 2024 10:17:37 -0700 (PDT) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger , Nicolas Chautru Subject: [PATCH] baseband/fpga_5gnr_fec: remove useless cast Date: Thu, 25 Jul 2024 10:17:15 -0700 Message-ID: <20240725171727.142525-1-stephen@networkplumber.org> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The rte_pktmbuf_mtod_offset macro already includes a type cast so casting the result just adds extra cast. Found by cocci/mtod-offset.cocci Signed-off-by: Stephen Hemminger --- drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c index 9b253cde28..e2ed047836 100644 --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c @@ -2042,7 +2042,7 @@ fpga_5gnr_harq_write_loopback(struct fpga_5gnr_queue *q, } } - input = (uint64_t *)rte_pktmbuf_mtod_offset(harq_input, uint8_t *, in_offset); + input = rte_pktmbuf_mtod_offset(harq_input, uint64_t *, in_offset); while (left_length > 0) { if (fpga_5gnr_reg_read_8(q->d->mmio_base, FPGA_5GNR_FEC_DDR4_ADDR_RDY_REGS) == 1) { @@ -2125,7 +2125,7 @@ fpga_5gnr_harq_read_loopback(struct fpga_5gnr_queue *q, } left_length = harq_in_length; - input = (uint64_t *)rte_pktmbuf_mtod_offset(harq_output, uint8_t *, harq_out_offset); + input = rte_pktmbuf_mtod_offset(harq_output, uint64_t *, harq_out_offset); while (left_length > 0) { if (d->fpga_variant == AGX100_FPGA_VARIANT) { -- 2.43.0