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Signed-off-by: Vanshika Shukla --- drivers/bus/dpaa/base/fman/fman.c | 21 +++++++- drivers/bus/dpaa/base/fman/fman_hw.c | 6 ++- drivers/bus/dpaa/include/fman.h | 18 ++++++- drivers/net/dpaa/dpaa_ethdev.c | 6 ++- drivers/net/dpaa/dpaa_ethdev.h | 19 ++++++- drivers/net/dpaa/dpaa_ptp.c | 43 +++++++++++++++ drivers/net/dpaa/dpaa_rxtx.c | 79 +++++++++++++++++++++++----- drivers/net/dpaa/dpaa_rxtx.h | 4 +- drivers/net/dpaa/meson.build | 1 + 9 files changed, 178 insertions(+), 19 deletions(-) create mode 100644 drivers/net/dpaa/dpaa_ptp.c diff --git a/drivers/bus/dpaa/base/fman/fman.c b/drivers/bus/dpaa/base/fman/fman.c index bf41a3ed96..89786636d9 100644 --- a/drivers/bus/dpaa/base/fman/fman.c +++ b/drivers/bus/dpaa/base/fman/fman.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) * * Copyright 2010-2016 Freescale Semiconductor Inc. - * Copyright 2017-2020 NXP + * Copyright 2017-2024 NXP * */ @@ -520,6 +520,25 @@ fman_if_init(const struct device_node *dpa_node) goto err; } + regs_addr = of_get_address(tx_node, 0, &__if->regs_size, NULL); + if (!regs_addr) { + FMAN_ERR(-EINVAL, "of_get_address(%s)\n", mname); + goto err; + } + phys_addr = of_translate_address(tx_node, regs_addr); + if (!phys_addr) { + FMAN_ERR(-EINVAL, "of_translate_address(%s, %p)\n", + mname, regs_addr); + goto err; + } + __if->tx_bmi_map = mmap(NULL, __if->regs_size, + PROT_READ | PROT_WRITE, MAP_SHARED, + fman_ccsr_map_fd, phys_addr); + if (__if->tx_bmi_map == MAP_FAILED) { + FMAN_ERR(-errno, "mmap(0x%"PRIx64")\n", phys_addr); + goto err; + } + /* No channel ID for MAC-less */ assert(lenp == sizeof(*tx_channel_id)); na = of_n_addr_cells(mac_node); diff --git a/drivers/bus/dpaa/base/fman/fman_hw.c b/drivers/bus/dpaa/base/fman/fman_hw.c index 27b39a4975..466709bfc9 100644 --- a/drivers/bus/dpaa/base/fman/fman_hw.c +++ b/drivers/bus/dpaa/base/fman/fman_hw.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: BSD-3-Clause * - * Copyright 2017,2020 NXP + * Copyright 2017,2020,2022 NXP * */ @@ -564,6 +564,10 @@ fman_if_set_ic_params(struct fman_if *fm_if, &((struct rx_bmi_regs *)__if->bmi_map)->fmbm_ricp; out_be32(fmbm_ricp, val); + unsigned int *fmbm_ticp = + &((struct tx_bmi_regs *)__if->tx_bmi_map)->fmbm_ticp; + out_be32(fmbm_ticp, val); + return 0; } diff --git a/drivers/bus/dpaa/include/fman.h b/drivers/bus/dpaa/include/fman.h index 3642b43be7..857eef3d2f 100644 --- a/drivers/bus/dpaa/include/fman.h +++ b/drivers/bus/dpaa/include/fman.h @@ -2,7 +2,7 @@ * * Copyright 2010-2012 Freescale Semiconductor, Inc. * All rights reserved. - * Copyright 2019-2021 NXP + * Copyright 2019-2022 NXP * */ @@ -292,6 +292,21 @@ struct rx_bmi_regs { uint32_t fmbm_rdbg; /**< Rx Debug-*/ }; +struct tx_bmi_regs { + uint32_t fmbm_tcfg; /**< Tx Configuration*/ + uint32_t fmbm_tst; /**< Tx Status*/ + uint32_t fmbm_tda; /**< Tx DMA attributes*/ + uint32_t fmbm_tfp; /**< Tx FIFO Parameters*/ + uint32_t fmbm_tfed; /**< Tx Frame End Data*/ + uint32_t fmbm_ticp; /**< Tx Internal Context Parameters*/ + uint32_t fmbm_tfdne; /**< Tx Frame Dequeue Next Engine*/ + uint32_t fmbm_tfca; /**< Tx Frame Attributes*/ + uint32_t fmbm_tcfqid; /**< Tx Confirmation Frame Queue ID*/ + uint32_t fmbm_tefqid; /**< Tx Error Frame Queue ID*/ + uint32_t fmbm_tfene; /**< Tx Frame Enqueue Next Engine*/ + uint32_t fmbm_trlmts; /**< Tx Rate Limiter Scale*/ + uint32_t fmbm_trlmt; /**< Tx Rate Limiter*/ +}; struct fman_port_qmi_regs { uint32_t fmqm_pnc; /**< PortID n Configuration Register */ uint32_t fmqm_pns; /**< PortID n Status Register */ @@ -380,6 +395,7 @@ struct __fman_if { uint64_t regs_size; void *ccsr_map; void *bmi_map; + void *tx_bmi_map; void *qmi_map; struct list_head node; }; diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c index e3cb15cad5..f7cd7c0d33 100644 --- a/drivers/net/dpaa/dpaa_ethdev.c +++ b/drivers/net/dpaa/dpaa_ethdev.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. - * Copyright 2017-2020 NXP + * Copyright 2017-2020,2022 NXP * */ /* System headers */ @@ -1670,6 +1670,10 @@ static struct eth_dev_ops dpaa_devops = { .rx_queue_intr_disable = dpaa_dev_queue_intr_disable, .rss_hash_update = dpaa_dev_rss_hash_update, .rss_hash_conf_get = dpaa_dev_rss_hash_conf_get, +#if defined(RTE_LIBRTE_IEEE1588) + .timesync_read_rx_timestamp = dpaa_timesync_read_rx_timestamp, + .timesync_read_tx_timestamp = dpaa_timesync_read_tx_timestamp, +#endif }; static bool diff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h index df179b18e8..389157fa10 100644 --- a/drivers/net/dpaa/dpaa_ethdev.h +++ b/drivers/net/dpaa/dpaa_ethdev.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * * Copyright (c) 2014-2016 Freescale Semiconductor, Inc. All rights reserved. - * Copyright 2017-2021 NXP + * Copyright 2017-2022 NXP * */ #ifndef __DPAA_ETHDEV_H__ @@ -150,6 +150,14 @@ struct dpaa_if { void *netenv_handle; void *scheme_handle[2]; uint32_t scheme_count; + /*stores timestamp of last received packet on dev*/ + uint64_t rx_timestamp; + /*stores timestamp of last received tx confirmation packet on dev*/ + uint64_t tx_timestamp; + /* stores pointer to next tx_conf queue that should be processed, + * it corresponds to last packet transmitted + */ + struct qman_fq *next_tx_conf_queue; void *vsp_handle[DPAA_VSP_PROFILE_MAX_NUM]; uint32_t vsp_bpid[DPAA_VSP_PROFILE_MAX_NUM]; @@ -232,6 +240,15 @@ struct dpaa_if_rx_bmi_stats { uint32_t fmbm_rbdc; /**< Rx Buffers Deallocate Counter*/ }; +int +dpaa_timesync_read_tx_timestamp(struct rte_eth_dev *dev, + struct timespec *timestamp); + +int +dpaa_timesync_read_rx_timestamp(struct rte_eth_dev *dev, + struct timespec *timestamp, + uint32_t flags __rte_unused); + /* PMD related logs */ extern int dpaa_logtype_pmd; #define RTE_LOGTYPE_DPAA_PMD dpaa_logtype_pmd diff --git a/drivers/net/dpaa/dpaa_ptp.c b/drivers/net/dpaa/dpaa_ptp.c new file mode 100644 index 0000000000..df6df1ddf2 --- /dev/null +++ b/drivers/net/dpaa/dpaa_ptp.c @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2022-2024 NXP + */ + +/* System headers */ +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +int dpaa_timesync_read_tx_timestamp(struct rte_eth_dev *dev, + struct timespec *timestamp) +{ + struct dpaa_if *dpaa_intf = dev->data->dev_private; + + if (dpaa_intf->next_tx_conf_queue) { + while (!dpaa_intf->tx_timestamp) + dpaa_eth_tx_conf(dpaa_intf->next_tx_conf_queue); + } else { + return -1; + } + *timestamp = rte_ns_to_timespec(dpaa_intf->tx_timestamp); + + return 0; +} + +int dpaa_timesync_read_rx_timestamp(struct rte_eth_dev *dev, + struct timespec *timestamp, + uint32_t flags __rte_unused) +{ + struct dpaa_if *dpaa_intf = dev->data->dev_private; + *timestamp = rte_ns_to_timespec(dpaa_intf->rx_timestamp); + return 0; +} + diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c index bbccd2a89b..44d9bc1adb 100644 --- a/drivers/net/dpaa/dpaa_rxtx.c +++ b/drivers/net/dpaa/dpaa_rxtx.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. - * Copyright 2017,2019-2021 NXP + * Copyright 2017,2019-2022 NXP * */ @@ -49,7 +49,6 @@ #define DPAA_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid) \ do { \ - (_fd)->cmd = 0; \ (_fd)->opaque_addr = 0; \ (_fd)->opaque = QM_FD_CONTIG << DPAA_FD_FORMAT_SHIFT; \ (_fd)->opaque |= ((_mbuf)->data_off) << DPAA_FD_OFFSET_SHIFT; \ @@ -122,7 +121,10 @@ static inline void dpaa_eth_packet_info(struct rte_mbuf *m, void *fd_virt_addr) { struct annotations_t *annot = GET_ANNOTATIONS(fd_virt_addr); uint64_t prs = *((uintptr_t *)(&annot->parse)) & DPAA_PARSE_MASK; - +#if defined(RTE_LIBRTE_IEEE1588) + struct rte_ether_hdr *eth_hdr = + rte_pktmbuf_mtod(m, struct rte_ether_hdr *); +#endif DPAA_DP_LOG(DEBUG, " Parsing mbuf: %p with annotations: %p", m, annot); m->ol_flags = RTE_MBUF_F_RX_RSS_HASH | RTE_MBUF_F_RX_IP_CKSUM_GOOD | @@ -241,6 +243,12 @@ static inline void dpaa_eth_packet_info(struct rte_mbuf *m, void *fd_virt_addr) if (prs & DPAA_PARSE_VLAN_MASK) m->ol_flags |= RTE_MBUF_F_RX_VLAN; /* Packet received without stripping the vlan */ +#if defined(RTE_LIBRTE_IEEE1588) + if (eth_hdr->ether_type == htons(RTE_ETHER_TYPE_1588)) { + m->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP; + m->ol_flags |= RTE_MBUF_F_RX_IEEE1588_TMST; + } +#endif } static inline void dpaa_checksum(struct rte_mbuf *mbuf) @@ -317,7 +325,7 @@ static inline void dpaa_checksum_offload(struct rte_mbuf *mbuf, prs->ip_off[0] = mbuf->l2_len; prs->l4_off = mbuf->l3_len + mbuf->l2_len; /* Enable L3 (and L4, if TCP or UDP) HW checksum*/ - fd->cmd = DPAA_FD_CMD_RPD | DPAA_FD_CMD_DTC; + fd->cmd |= DPAA_FD_CMD_RPD | DPAA_FD_CMD_DTC; } static inline void @@ -513,6 +521,9 @@ dpaa_rx_cb_no_prefetch(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, uint16_t offset, i; uint32_t length; uint8_t format; +#if defined(RTE_LIBRTE_IEEE1588) + struct annotations_t *annot; +#endif bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[0]->fd.bpid); ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[0]->fd)); @@ -554,6 +565,10 @@ dpaa_rx_cb_no_prefetch(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, rte_mbuf_refcnt_set(mbuf, 1); dpaa_eth_packet_info(mbuf, mbuf->buf_addr); dpaa_display_frame_info(fd, fq[0]->fqid, true); +#if defined(RTE_LIBRTE_IEEE1588) + annot = GET_ANNOTATIONS(mbuf->buf_addr); + dpaa_intf->rx_timestamp = rte_cpu_to_be_64(annot->timestamp); +#endif } } @@ -567,6 +582,9 @@ dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, uint16_t offset, i; uint32_t length; uint8_t format; +#if defined(RTE_LIBRTE_IEEE1588) + struct annotations_t *annot; +#endif for (i = 0; i < num_bufs; i++) { fd = &dqrr[i]->fd; @@ -594,6 +612,10 @@ dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, rte_mbuf_refcnt_set(mbuf, 1); dpaa_eth_packet_info(mbuf, mbuf->buf_addr); dpaa_display_frame_info(fd, fq[0]->fqid, true); +#if defined(RTE_LIBRTE_IEEE1588) + annot = GET_ANNOTATIONS(mbuf->buf_addr); + dpaa_intf->rx_timestamp = rte_cpu_to_be_64(annot->timestamp); +#endif } } @@ -758,6 +780,10 @@ uint16_t dpaa_eth_queue_rx(void *q, uint32_t num_rx = 0, ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; int num_rx_bufs, ret; uint32_t vdqcr_flags = 0; +#if defined(RTE_LIBRTE_IEEE1588) + struct annotations_t *annot; + struct dpaa_if *dpaa_intf = fq->dpaa_intf; +#endif if (unlikely(rte_dpaa_bpid_info == NULL && rte_eal_process_type() == RTE_PROC_SECONDARY)) @@ -800,6 +826,10 @@ uint16_t dpaa_eth_queue_rx(void *q, continue; bufs[num_rx++] = dpaa_eth_fd_to_mbuf(&dq->fd, ifid); dpaa_display_frame_info(&dq->fd, fq->fqid, true); +#if defined(RTE_LIBRTE_IEEE1588) + annot = GET_ANNOTATIONS(bufs[num_rx - 1]->buf_addr); + dpaa_intf->rx_timestamp = rte_cpu_to_be_64(annot->timestamp); +#endif qman_dqrr_consume(fq, dq); } while (fq->flags & QMAN_FQ_STATE_VDQCR); @@ -1110,6 +1140,12 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs) DPAA_DP_LOG(DEBUG, "Transmitting %d buffers on queue: %p", nb_bufs, q); +#if defined(RTE_LIBRTE_IEEE1588) + dpaa_intf->next_tx_conf_queue = fq_txconf; + dpaa_eth_tx_conf(fq_txconf); + dpaa_intf->tx_timestamp = 0; +#endif + while (nb_bufs) { frames_to_send = (nb_bufs > DPAA_TX_BURST_SIZE) ? DPAA_TX_BURST_SIZE : nb_bufs; @@ -1122,6 +1158,14 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs) if (dpaa_svr_family == SVR_LS1043A_FAMILY && (mbuf->data_off & 0x7F) != 0x0) realloc_mbuf = 1; + + fd_arr[loop].cmd = 0; +#if defined(RTE_LIBRTE_IEEE1588) + fd_arr[loop].cmd |= DPAA_FD_CMD_FCO | + qman_fq_fqid(fq_txconf); + fd_arr[loop].cmd |= DPAA_FD_CMD_RPD | + DPAA_FD_CMD_UPD; +#endif seqn = *dpaa_seqn(mbuf); if (seqn != DPAA_INVALID_MBUF_SEQN) { index = seqn - 1; @@ -1179,10 +1223,6 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs) mbuf = temp_mbuf; realloc_mbuf = 0; } - -#if defined(RTE_LIBRTE_IEEE1588) - fd_arr[loop].cmd |= DPAA_FD_CMD_FCO | qman_fq_fqid(fq_txconf); -#endif indirect_buf: state = tx_on_dpaa_pool(mbuf, bp_info, &fd_arr[loop], @@ -1211,10 +1251,6 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs) sent += frames_to_send; } -#if defined(RTE_LIBRTE_IEEE1588) - dpaa_eth_tx_conf(fq_txconf); -#endif - DPAA_DP_LOG(DEBUG, "Transmitted %d buffers on queue: %p", sent, q); for (loop = 0; loop < free_count; loop++) { @@ -1232,6 +1268,12 @@ dpaa_eth_tx_conf(void *q) struct qm_dqrr_entry *dq; int num_tx_conf, ret, dq_num; uint32_t vdqcr_flags = 0; + struct dpaa_if *dpaa_intf = fq->dpaa_intf; + struct qm_dqrr_entry *dqrr; + struct dpaa_bp_info *bp_info; + struct rte_mbuf *mbuf; + void *ptr; + struct annotations_t *annot; if (unlikely(rte_dpaa_bpid_info == NULL && rte_eal_process_type() == RTE_PROC_SECONDARY)) @@ -1256,7 +1298,20 @@ dpaa_eth_tx_conf(void *q) dq = qman_dequeue(fq); if (!dq) continue; + dqrr = dq; dq_num++; + bp_info = DPAA_BPID_TO_POOL_INFO(dqrr->fd.bpid); + ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr->fd)); + rte_prefetch0((void *)((uint8_t *)ptr + + DEFAULT_RX_ICEOF)); + mbuf = (struct rte_mbuf *) + ((char *)ptr - bp_info->meta_data_size); + + if (mbuf->ol_flags & RTE_MBUF_F_TX_IEEE1588_TMST) { + annot = GET_ANNOTATIONS(mbuf->buf_addr); + dpaa_intf->tx_timestamp = + rte_cpu_to_be_64(annot->timestamp); + } dpaa_display_frame_info(&dq->fd, fq->fqid, true); qman_dqrr_consume(fq, dq); dpaa_free_mbuf(&dq->fd); diff --git a/drivers/net/dpaa/dpaa_rxtx.h b/drivers/net/dpaa/dpaa_rxtx.h index 042602e087..1048e86d41 100644 --- a/drivers/net/dpaa/dpaa_rxtx.h +++ b/drivers/net/dpaa/dpaa_rxtx.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. - * Copyright 2017,2020-2021 NXP + * Copyright 2017,2020-2022 NXP * */ @@ -260,7 +260,7 @@ struct dpaa_eth_parse_results_t { struct annotations_t { uint8_t reserved[DEFAULT_RX_ICEOF]; struct dpaa_eth_parse_results_t parse; /**< Pointer to Parsed result*/ - uint64_t reserved1; + uint64_t timestamp; uint64_t hash; /**< Hash Result */ }; diff --git a/drivers/net/dpaa/meson.build b/drivers/net/dpaa/meson.build index 42e1f8c2e2..239858adda 100644 --- a/drivers/net/dpaa/meson.build +++ b/drivers/net/dpaa/meson.build @@ -14,6 +14,7 @@ sources = files( 'dpaa_flow.c', 'dpaa_rxtx.c', 'dpaa_fmc.c', + 'dpaa_ptp.c', ) if cc.has_argument('-Wno-pointer-arith') -- 2.25.1