From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6B89245775; Fri, 9 Aug 2024 09:08:17 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4913442E53; Fri, 9 Aug 2024 09:08:13 +0200 (CEST) Received: from alln-iport-1.cisco.com (alln-iport-1.cisco.com [173.37.142.88]) by mails.dpdk.org (Postfix) with ESMTP id 68E4842E53 for ; Fri, 9 Aug 2024 09:08:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cisco.com; i=@cisco.com; l=2953; q=dns/txt; s=iport; t=1723187292; x=1724396892; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/cmHMOQr2MX6URahYIx+l9t0KwIjoAWkuLW+qbbubHE=; b=jzCj/EH/3IlobQLLEoZMAB7TDWsawyHrLsKuw3oZC3cX7zp3KVBOL5/N Gaj7256Xz0dK5DS/I38zGfWlA3DhYI/SFmKd2KhX2Ao1JnTyF8zxxHGFu +XUN0zLwKRKItDo204RnNbzUC8LJf0JyOZO8H0gcoDs69sFVx1SUbjKRm w=; X-CSE-ConnectionGUID: i6kjJR9jRyyp/SW158z7zw== X-CSE-MsgGUID: Qa6h19hiQ56f8YgoCjRFRg== X-IronPort-AV: E=Sophos;i="6.09,275,1716249600"; d="scan'208";a="335366736" Received: from rcdn-core-2.cisco.com ([173.37.93.153]) by alln-iport-1.cisco.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Aug 2024 07:08:11 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by rcdn-core-2.cisco.com (8.15.2/8.15.2) with ESMTP id 47978BsA009718; Fri, 9 Aug 2024 07:08:11 GMT Received: by cisco.com (Postfix, from userid 508933) id 6172C20F2003; Fri, 9 Aug 2024 00:08:11 -0700 (PDT) From: Hyong Youb Kim To: Ferruh Yigit Cc: dev@dpdk.org, John Daley , Hyong Youb Kim Subject: [PATCH v3 2/3] net/enic: add speed capabilities for newer models Date: Fri, 9 Aug 2024 00:07:53 -0700 Message-Id: <20240809070754.26128-3-hyonkim@cisco.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20240809070754.26128-1-hyonkim@cisco.com> References: <20240808061433.14971-1-hyonkim@cisco.com> <20240809070754.26128-1-hyonkim@cisco.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Outbound-SMTP-Client: 10.193.184.48, savbu-usnic-a.cisco.com X-Outbound-Node: rcdn-core-2.cisco.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add 1400/14000 and 15000 models to the speed_capa list. Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- doc/guides/nics/enic.rst | 3 ++- doc/guides/rel_notes/release_24_11.rst | 1 + drivers/net/enic/enic_ethdev.c | 21 +++++++++++++++++++++ 3 files changed, 24 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/enic.rst b/doc/guides/nics/enic.rst index 639d3f5939..1295545c73 100644 --- a/doc/guides/nics/enic.rst +++ b/doc/guides/nics/enic.rst @@ -17,7 +17,8 @@ ENIC PMD supports all recent generations of Cisco VIC adapters including: - VIC 1200 series - VIC 1300 series -- VIC 1400 series +- VIC 1400/14000 series +- VIC 15000 series Supported features ------------------ diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst index f79b1bee58..53dbf99324 100644 --- a/doc/guides/rel_notes/release_24_11.rst +++ b/doc/guides/rel_notes/release_24_11.rst @@ -58,6 +58,7 @@ New Features * **Updated Cisco enic driver.** * Added SR-IOV VF support. + * Added recent 1400/14000 and 15000 models to the supported list. Removed Items diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index 5c967677fb..62c8751d09 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -62,6 +62,27 @@ static const struct vic_speed_capa { { 0x021a, RTE_ETH_LINK_SPEED_40G }, /* 1487 MLOM */ { 0x024a, RTE_ETH_LINK_SPEED_40G | RTE_ETH_LINK_SPEED_100G }, /* 1495 PCIe */ { 0x024b, RTE_ETH_LINK_SPEED_40G | RTE_ETH_LINK_SPEED_100G }, /* 1497 MLOM */ + { 0x02af, RTE_ETH_LINK_SPEED_10G | RTE_ETH_LINK_SPEED_25G }, /* 1467 MLOM */ + { 0x02b0, RTE_ETH_LINK_SPEED_40G | RTE_ETH_LINK_SPEED_100G }, /* 1477 MLOM */ + { 0x02cf, RTE_ETH_LINK_SPEED_25G }, /* 14425 MLOM */ + { 0x02d0, RTE_ETH_LINK_SPEED_25G }, /* 14825 Mezz */ + { 0x02db, RTE_ETH_LINK_SPEED_100G }, /* 15231 MLOM */ + { 0x02dc, RTE_ETH_LINK_SPEED_10G }, /* 15411 MLOM */ + { 0x02dd, RTE_ETH_LINK_SPEED_10G | RTE_ETH_LINK_SPEED_25G | + RTE_ETH_LINK_SPEED_50G }, /* 15428 MLOM */ + { 0x02de, RTE_ETH_LINK_SPEED_25G }, /* 15420 MLOM */ + { 0x02e8, RTE_ETH_LINK_SPEED_40G | RTE_ETH_LINK_SPEED_100G | + RTE_ETH_LINK_SPEED_200G}, /* 15238 MLOM */ + { 0x02e0, RTE_ETH_LINK_SPEED_10G | RTE_ETH_LINK_SPEED_25G | + RTE_ETH_LINK_SPEED_50G }, /* 15427 MLOM */ + { 0x02df, RTE_ETH_LINK_SPEED_50G | RTE_ETH_LINK_SPEED_100G }, /* 15230 MLOM */ + { 0x02e1, RTE_ETH_LINK_SPEED_25G | RTE_ETH_LINK_SPEED_50G }, /* 15422 Mezz */ + { 0x02e4, RTE_ETH_LINK_SPEED_40G | RTE_ETH_LINK_SPEED_100G | + RTE_ETH_LINK_SPEED_200G }, /* 15235 PCIe */ + { 0x02f2, RTE_ETH_LINK_SPEED_10G | RTE_ETH_LINK_SPEED_25G | + RTE_ETH_LINK_SPEED_50G }, /* 15425 PCIe */ + { 0x02f3, RTE_ETH_LINK_SPEED_40G | RTE_ETH_LINK_SPEED_100G | + RTE_ETH_LINK_SPEED_200G }, /* 15237 MLOM */ { 0, 0 }, /* End marker */ }; -- 2.35.2