Add support for rawdev operations such as dev_start and dev_stop.
Signed-off-by: Yong Zhang <zhang.yong25@zte.com.cn>
---
drivers/raw/zxdh/zxdh_rawdev.c | 136 ++++++++++++++++++++++++++++++++-
drivers/raw/zxdh/zxdh_rawdev.h | 10 +++
2 files changed, 145 insertions(+), 1 deletion(-)
diff --git a/drivers/raw/zxdh/zxdh_rawdev.c b/drivers/raw/zxdh/zxdh_rawdev.c
index a76e3cda39..363011dfcc 100644
--- a/drivers/raw/zxdh/zxdh_rawdev.c
+++ b/drivers/raw/zxdh/zxdh_rawdev.c
@@ -111,6 +111,96 @@ zxdh_gdma_write_reg(struct rte_rawdev *dev, uint16_t queue_id, uint32_t offset,
*(uint32_t *)(gdmadev->base_addr + addr) = val;
}
+static int
+zxdh_gdma_rawdev_info_get(struct rte_rawdev *dev,
+ __rte_unused rte_rawdev_obj_t dev_info,
+ __rte_unused size_t dev_info_size)
+{
+ if (dev == NULL)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int
+zxdh_gdma_rawdev_configure(const struct rte_rawdev *dev,
+ rte_rawdev_obj_t config,
+ size_t config_size)
+{
+ struct zxdh_gdma_config *gdma_config = NULL;
+
+ if ((dev == NULL) ||
+ (config == NULL) ||
+ (config_size != sizeof(struct zxdh_gdma_config)))
+ return -EINVAL;
+
+ gdma_config = (struct zxdh_gdma_config *)config;
+ if (gdma_config->max_vqs > ZXDH_GDMA_TOTAL_CHAN_NUM) {
+ ZXDH_PMD_LOG(ERR, "gdma supports up to %d queues", ZXDH_GDMA_TOTAL_CHAN_NUM);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int
+zxdh_gdma_rawdev_start(struct rte_rawdev *dev)
+{
+ struct zxdh_gdma_rawdev *gdmadev = NULL;
+
+ if (dev == NULL)
+ return -EINVAL;
+
+ gdmadev = zxdh_gdma_rawdev_get_priv(dev);
+ gdmadev->device_state = ZXDH_GDMA_DEV_RUNNING;
+
+ return 0;
+}
+
+static void
+zxdh_gdma_rawdev_stop(struct rte_rawdev *dev)
+{
+ struct zxdh_gdma_rawdev *gdmadev = NULL;
+
+ if (dev == NULL)
+ return;
+
+ gdmadev = zxdh_gdma_rawdev_get_priv(dev);
+ gdmadev->device_state = ZXDH_GDMA_DEV_STOPPED;
+}
+
+static int
+zxdh_gdma_rawdev_reset(struct rte_rawdev *dev)
+{
+ if (dev == NULL)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int
+zxdh_gdma_rawdev_close(struct rte_rawdev *dev)
+{
+ struct zxdh_gdma_rawdev *gdmadev = NULL;
+ struct zxdh_gdma_queue *queue = NULL;
+ uint16_t queue_id = 0;
+
+ if (dev == NULL)
+ return -EINVAL;
+
+ for (queue_id = 0; queue_id < ZXDH_GDMA_TOTAL_CHAN_NUM; queue_id++) {
+ queue = zxdh_gdma_get_queue(dev, queue_id);
+ if ((queue == NULL) || (queue->enable == 0))
+ continue;
+
+ zxdh_gdma_queue_free(dev, queue_id);
+ }
+ gdmadev = zxdh_gdma_rawdev_get_priv(dev);
+ gdmadev->device_state = ZXDH_GDMA_DEV_STOPPED;
+
+ return 0;
+}
+
static int
zxdh_gdma_rawdev_queue_setup(struct rte_rawdev *dev,
uint16_t queue_id,
@@ -192,8 +282,52 @@ zxdh_gdma_rawdev_queue_setup(struct rte_rawdev *dev,
return queue_id;
}
+static int
+zxdh_gdma_rawdev_queue_release(struct rte_rawdev *dev, uint16_t queue_id)
+{
+ struct zxdh_gdma_queue *queue = NULL;
+
+ if (dev == NULL)
+ return -EINVAL;
+
+ queue = zxdh_gdma_get_queue(dev, queue_id);
+ if ((queue == NULL) || (queue->enable == 0))
+ return -EINVAL;
+
+ zxdh_gdma_queue_free(dev, queue_id);
+
+ return 0;
+}
+
+static int
+zxdh_gdma_rawdev_get_attr(struct rte_rawdev *dev,
+ __rte_unused const char *attr_name,
+ uint64_t *attr_value)
+{
+ struct zxdh_gdma_rawdev *gdmadev = NULL;
+ struct zxdh_gdma_attr *gdma_attr = NULL;
+
+ if ((dev == NULL) || (attr_value == NULL))
+ return -EINVAL;
+
+ gdmadev = zxdh_gdma_rawdev_get_priv(dev);
+ gdma_attr = (struct zxdh_gdma_attr *)attr_value;
+ gdma_attr->num_hw_queues = gdmadev->used_num;
+
+ return 0;
+}
static const struct rte_rawdev_ops zxdh_gdma_rawdev_ops = {
+ .dev_info_get = zxdh_gdma_rawdev_info_get,
+ .dev_configure = zxdh_gdma_rawdev_configure,
+ .dev_start = zxdh_gdma_rawdev_start,
+ .dev_stop = zxdh_gdma_rawdev_stop,
+ .dev_close = zxdh_gdma_rawdev_close,
+ .dev_reset = zxdh_gdma_rawdev_reset,
+
.queue_setup = zxdh_gdma_rawdev_queue_setup,
+ .queue_release = zxdh_gdma_rawdev_queue_release,
+
+ .attr_get = zxdh_gdma_rawdev_get_attr,
};
static int
@@ -256,7 +390,7 @@ zxdh_gdma_queue_init(struct rte_rawdev *dev, uint16_t queue_id)
ZXDH_PMD_LOG(INFO, "queue%u ring phy addr:0x%"PRIx64" virt addr:%p",
queue_id, mz->iova, mz->addr);
- /* Initialize the hardware channel */
+ /* Configure the hardware channel to the initial state */
zxdh_gdma_write_reg(dev, queue_id, ZXDH_GDMA_CONTROL_OFFSET,
ZXDH_GDMA_CHAN_FORCE_CLOSE);
zxdh_gdma_write_reg(dev, queue_id, ZXDH_GDMA_TC_CNT_OFFSET,
diff --git a/drivers/raw/zxdh/zxdh_rawdev.h b/drivers/raw/zxdh/zxdh_rawdev.h
index e9e7038560..70a5fae499 100644
--- a/drivers/raw/zxdh/zxdh_rawdev.h
+++ b/drivers/raw/zxdh/zxdh_rawdev.h
@@ -102,6 +102,12 @@ struct zxdh_gdma_rawdev {
struct zxdh_gdma_queue vqs[ZXDH_GDMA_TOTAL_CHAN_NUM];
};
+struct zxdh_gdma_config {
+ uint16_t max_hw_queues_per_core;
+ uint16_t max_vqs;
+ int fle_queue_pool_cnt;
+};
+
struct zxdh_gdma_rbp {
uint32_t use_ultrashort:1;
uint32_t enable:1;
@@ -121,6 +127,10 @@ struct zxdh_gdma_queue_config {
struct zxdh_gdma_rbp *rbp;
};
+struct zxdh_gdma_attr {
+ uint16_t num_hw_queues;
+};
+
static inline struct zxdh_gdma_rawdev *
zxdh_gdma_rawdev_get_priv(const struct rte_rawdev *rawdev)
{
--
2.43.0