From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4328A45845; Thu, 22 Aug 2024 12:29:14 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 32E2942E98; Thu, 22 Aug 2024 12:29:14 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 87DC542E97 for ; Thu, 22 Aug 2024 12:29:12 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 47M9WkFC017791 for ; Thu, 22 Aug 2024 03:29:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=O tzCmrr+X+snOJeX4MYxKLoYY/Gc3Kt9yO4j8Q2Ykco=; b=fDXms0D3ETQiVVLT5 LXkfW+JTGKr35aH8ij5A5de5PdCu8sxa/qypQXimEuKN1t5ZWA4kbx8Too0AHA+B o6YoHD2BoqVGE88Dtt4dl4DwgjdsdfRramv/D+Q9IWhDmNBfUE9tydNE4ltzkn9K PQi2tQFp5OHYq9KBMy14nI6UJP4e4TT3nn0nx4Mmp1N5TiZAR7TlSHmgeuvtz0Nn g+YlmR+c9YzaEhPd5Tdwir7g3n+ta+Mxc5GuOtzibRAMvXqdBvuLwdpzvZ+dGxpI BxleF9jSpnZINppcJ51pKKqhSdnoWUwC1Nd8w5ntZ7R4AYBvbTOuAdM/nm3zfoQV hDRqw== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 4162sp06t7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 22 Aug 2024 03:29:11 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 22 Aug 2024 03:29:10 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 22 Aug 2024 03:29:10 -0700 Received: from localhost.localdomain (unknown [10.28.36.179]) by maili.marvell.com (Postfix) with ESMTP id 73ECF3F707D; Thu, 22 Aug 2024 03:29:05 -0700 (PDT) From: Vidya Sagar Velumuri To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra , Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj CC: , , , , , Subject: [PATCH v1 2/3] crypto/cnxk: add queue pair reset support Date: Thu, 22 Aug 2024 03:28:55 -0700 Message-ID: <20240822102856.3965710-2-vvelumuri@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240822102856.3965710-1-vvelumuri@marvell.com> References: <20240822102856.3965710-1-vvelumuri@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: icIZZjSMrzyGFu1U_J4VwbS9jfEEGtAN X-Proofpoint-ORIG-GUID: icIZZjSMrzyGFu1U_J4VwbS9jfEEGtAN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-22_03,2024-08-19_03,2024-05-17_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support for reset of a specific queue pair on cnxk platform. Signed-off-by: Vidya Sagar Velumuri diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c index aba2a49d19..3855d5e7a5 100644 --- a/drivers/common/cnxk/roc_cpt.c +++ b/drivers/common/cnxk/roc_cpt.c @@ -953,6 +953,20 @@ cpt_lf_fini(struct roc_cpt_lf *lf) lf->iq_vaddr = NULL; } +void +roc_cpt_lf_reset(struct roc_cpt_lf *lf) +{ + if (lf == NULL) + return; + + cpt_lf_misc_intr_enb_dis(lf, false); + cpt_lf_done_intr_enb_dis(lf, false); + roc_cpt_iq_disable(lf); + roc_cpt_iq_reset(lf); + cpt_lf_misc_intr_enb_dis(lf, true); + cpt_lf_done_intr_enb_dis(lf, true); +} + void roc_cpt_lf_fini(struct roc_cpt_lf *lf) { diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h index e2e919f80f..0b9c933925 100644 --- a/drivers/common/cnxk/roc_cpt.h +++ b/drivers/common/cnxk/roc_cpt.h @@ -187,6 +187,7 @@ int __roc_api roc_cpt_dev_configure(struct roc_cpt *roc_cpt, int nb_lf, bool rxc void __roc_api roc_cpt_dev_clear(struct roc_cpt *roc_cpt); int __roc_api roc_cpt_lf_init(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf); void __roc_api roc_cpt_lf_fini(struct roc_cpt_lf *lf); +void __roc_api roc_cpt_lf_reset(struct roc_cpt_lf *lf); int __roc_api roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, void *cptr, bool inval); int __roc_api roc_cpt_lf_ctx_reload(struct roc_cpt_lf *lf, void *cptr); diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index f98738d07e..88e59f4161 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -74,6 +74,7 @@ INTERNAL { roc_cpt_lf_ctx_reload; roc_cpt_lf_init; roc_cpt_lf_fini; + roc_cpt_lf_reset; roc_cpt_lfs_print; roc_cpt_lmtline_init; roc_cpt_parse_hdr_dump; diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c index 780785d656..f18ed69014 100644 --- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c @@ -1976,6 +1976,7 @@ struct rte_cryptodev_ops cn10k_cpt_ops = { .stats_reset = NULL, .queue_pair_setup = cnxk_cpt_queue_pair_setup, .queue_pair_release = cnxk_cpt_queue_pair_release, + .queue_pair_reset = cnxk_cpt_queue_pair_reset, /* Symmetric crypto ops */ .sym_session_get_size = cnxk_cpt_sym_session_get_size, diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c index f443cb9563..ae00af5019 100644 --- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c @@ -707,6 +707,7 @@ struct rte_cryptodev_ops cn9k_cpt_ops = { .stats_reset = NULL, .queue_pair_setup = cnxk_cpt_queue_pair_setup, .queue_pair_release = cnxk_cpt_queue_pair_release, + .queue_pair_reset = cnxk_cpt_queue_pair_reset, /* Symmetric crypto ops */ .sym_session_get_size = cnxk_cpt_sym_session_get_size, diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index cfcfa79fdf..09ce98db88 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -496,6 +496,27 @@ cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id, return ret; } +int +cnxk_cpt_queue_pair_reset(struct rte_cryptodev *dev, uint16_t qp_id, + const struct rte_cryptodev_qp_conf *conf, int socket_id) +{ + if (conf == NULL) { + struct cnxk_cpt_vf *vf = dev->data->dev_private; + struct roc_cpt_lf *lf; + + if (vf == NULL) + return -ENOTSUP; + + lf = vf->cpt.lf[qp_id]; + roc_cpt_lf_reset(lf); + roc_cpt_iq_enable(lf); + + return 0; + } + + return cnxk_cpt_queue_pair_setup(dev, qp_id, conf, socket_id); +} + uint32_t cnxk_cpt_qp_depth_used(void *qptr) { diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h index caf6ac35e5..e4d85801d7 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h @@ -120,6 +120,9 @@ int cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id, const struct rte_cryptodev_qp_conf *conf, int socket_id __rte_unused); +int cnxk_cpt_queue_pair_reset(struct rte_cryptodev *dev, uint16_t qp_id, + const struct rte_cryptodev_qp_conf *conf, int socket_id); + int cnxk_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id); unsigned int cnxk_cpt_sym_session_get_size(struct rte_cryptodev *dev); -- 2.25.1