From: Soumyadeep Hore <soumyadeep.hore@intel.com>
To: bruce.richardson@intel.com, ian.stokes@intel.com,
aman.deep.singh@intel.com
Cc: dev@dpdk.org, shaiq.wani@intel.com
Subject: [PATCH v2 01/12] net/ice: use correct format specifiers for unsigned ints
Date: Thu, 22 Aug 2024 18:53:35 +0000 [thread overview]
Message-ID: <20240822185346.221885-2-soumyadeep.hore@intel.com> (raw)
In-Reply-To: <20240822185346.221885-1-soumyadeep.hore@intel.com>
Firmware was giving a number for the MSIX vectors that was
way too big and obviously not right. Because of the wrong
format specifier, this big number ended up looking like a
tiny negative number in the logs. This was fixed by using
the right format specifier everywhere it's needed.
Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
drivers/net/ice/base/ice_common.c | 54 +++++++++++++++----------------
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 536392776f..48d5fff42a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2365,48 +2365,48 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,
switch (cap) {
case ICE_AQC_CAPS_VALID_FUNCTIONS:
caps->valid_functions = number;
- ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = 0x%x\n", prefix,
caps->valid_functions);
break;
case ICE_AQC_CAPS_DCB:
caps->dcb = (number == 1);
caps->active_tc_bitmap = logical_id;
caps->maxtc = phys_id;
- ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb);
- ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %u\n", prefix, caps->dcb);
+ ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = 0x%x\n", prefix,
caps->active_tc_bitmap);
- ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc);
+ ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %u\n", prefix, caps->maxtc);
break;
case ICE_AQC_CAPS_RSS:
caps->rss_table_size = number;
caps->rss_table_entry_width = logical_id;
- ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %u\n", prefix,
caps->rss_table_size);
- ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %u\n", prefix,
caps->rss_table_entry_width);
break;
case ICE_AQC_CAPS_RXQS:
caps->num_rxq = number;
caps->rxq_first_id = phys_id;
- ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %u\n", prefix,
caps->num_rxq);
- ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %u\n", prefix,
caps->rxq_first_id);
break;
case ICE_AQC_CAPS_TXQS:
caps->num_txq = number;
caps->txq_first_id = phys_id;
- ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %u\n", prefix,
caps->num_txq);
- ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %u\n", prefix,
caps->txq_first_id);
break;
case ICE_AQC_CAPS_MSIX:
caps->num_msix_vectors = number;
caps->msix_vector_first_id = phys_id;
- ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %u\n", prefix,
caps->num_msix_vectors);
- ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix,
+ ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %u\n", prefix,
caps->msix_vector_first_id);
break;
case ICE_AQC_CAPS_NVM_MGMT:
@@ -2433,7 +2433,7 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,
break;
case ICE_AQC_CAPS_MAX_MTU:
caps->max_mtu = number;
- ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %d\n",
+ ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %u\n",
prefix, caps->max_mtu);
break;
case ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE:
@@ -2467,15 +2467,15 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,
caps->ext_topo_dev_img_ver_schema[index] =
(phys_id & ICE_EXT_TOPO_DEV_IMG_VER_SCHEMA) != 0;
ice_debug(hw, ICE_DBG_INIT,
- "%s: ext_topo_dev_img_ver_high[%d] = %d\n",
+ "%s: ext_topo_dev_img_ver_high[%d] = %u\n",
prefix, index,
caps->ext_topo_dev_img_ver_high[index]);
ice_debug(hw, ICE_DBG_INIT,
- "%s: ext_topo_dev_img_ver_low[%d] = %d\n",
+ "%s: ext_topo_dev_img_ver_low[%d] = %u\n",
prefix, index,
caps->ext_topo_dev_img_ver_low[index]);
ice_debug(hw, ICE_DBG_INIT,
- "%s: ext_topo_dev_img_part_num[%d] = %d\n",
+ "%s: ext_topo_dev_img_part_num[%d] = %u\n",
prefix, index,
caps->ext_topo_dev_img_part_num[index]);
ice_debug(hw, ICE_DBG_INIT,
@@ -2531,7 +2531,7 @@ ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps)
if (hw->dev_caps.num_funcs > 4) {
/* Max 4 TCs per port */
caps->maxtc = 4;
- ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %d (based on #ports)\n",
+ ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %u (based on #ports)\n",
caps->maxtc);
}
}
@@ -2549,9 +2549,9 @@ ice_parse_vsi_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
struct ice_aqc_list_caps_elem *cap)
{
func_p->guar_num_vsi = ice_get_num_per_func(hw, ICE_MAX_VSI);
- ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi (fw) = %d\n",
+ ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi (fw) = %u\n",
LE32_TO_CPU(cap->number));
- ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi = %d\n",
+ ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi = %u\n",
func_p->guar_num_vsi);
}
@@ -2636,9 +2636,9 @@ ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p)
GLQF_FD_SIZE_FD_BSIZE_S;
func_p->fd_fltr_best_effort = val;
- ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %d\n",
+ ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %u\n",
func_p->fd_fltr_guar);
- ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %d\n",
+ ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %u\n",
func_p->fd_fltr_best_effort);
}
@@ -2728,7 +2728,7 @@ ice_parse_valid_functions_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
u32 number = LE32_TO_CPU(cap->number);
dev_p->num_funcs = ice_hweight32(number);
- ice_debug(hw, ICE_DBG_INIT, "dev caps: num_funcs = %d\n",
+ ice_debug(hw, ICE_DBG_INIT, "dev caps: num_funcs = %u\n",
dev_p->num_funcs);
hw->logical_pf_id = ice_func_id_to_logical_id(number, hw->pf_id);
@@ -2749,7 +2749,7 @@ ice_parse_vsi_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
u32 number = LE32_TO_CPU(cap->number);
dev_p->num_vsi_allocd_to_host = number;
- ice_debug(hw, ICE_DBG_INIT, "dev caps: num_vsi_allocd_to_host = %d\n",
+ ice_debug(hw, ICE_DBG_INIT, "dev caps: num_vsi_allocd_to_host = %u\n",
dev_p->num_vsi_allocd_to_host);
}
@@ -2822,7 +2822,7 @@ ice_parse_fdir_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
u32 number = LE32_TO_CPU(cap->number);
dev_p->num_flow_director_fltr = number;
- ice_debug(hw, ICE_DBG_INIT, "dev caps: num_flow_director_fltr = %d\n",
+ ice_debug(hw, ICE_DBG_INIT, "dev caps: num_flow_director_fltr = %u\n",
dev_p->num_flow_director_fltr);
}
@@ -2841,7 +2841,7 @@ ice_parse_nac_topo_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
dev_p->nac_topo.mode = LE32_TO_CPU(cap->number);
dev_p->nac_topo.id = LE32_TO_CPU(cap->phys_id) & ICE_NAC_TOPO_ID_M;
- ice_info(hw, "PF is configured in %s mode with IP instance ID %d\n",
+ ice_info(hw, "PF is configured in %s mode with IP instance ID %u\n",
(dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M) ?
"primary" : "secondary", dev_p->nac_topo.id);
@@ -2849,7 +2849,7 @@ ice_parse_nac_topo_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
!!(dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M));
ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_dual = %d\n",
!!(dev_p->nac_topo.mode & ICE_NAC_TOPO_DUAL_M));
- ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology id = %d\n",
+ ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology id = %u\n",
dev_p->nac_topo.id);
}
@@ -2927,7 +2927,7 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
default:
/* Don't list common capabilities as unknown */
if (!found)
- ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%d]: 0x%x\n",
+ ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%u]: 0x%x\n",
i, cap);
break;
}
--
2.43.0
next prev parent reply other threads:[~2024-08-22 19:48 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-22 9:56 [PATCH v1 00/12] Align ICE shared code with Base driver Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 01/12] net/ice: use correct format specifiers for unsigned ints Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 02/12] net/ice: updates for ptp init GNRD Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 03/12] net/ice: add new tag definitions Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 04/12] net/ice: avoid reading past end of PFA Soumyadeep Hore
2024-08-22 14:41 ` Bruce Richardson
2024-08-22 9:56 ` [PATCH v1 05/12] net/ice: update PTP init Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 06/12] net/ice: address compilation errors Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 07/12] net/ice: fix link speed for 200G Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 08/12] net/ice: update iteration of TLVs in Preserved Fields Area Soumyadeep Hore
2024-08-22 14:45 ` Bruce Richardson
2024-08-23 6:55 ` Hore, Soumyadeep
2024-08-22 9:56 ` [PATCH v1 09/12] net/ice: correct Tx Scheduler AQ command RD bit for E825C Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 10/12] net/ice: support optional flags in signature segment header Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 11/12] net/ice: update E830 50G branding strings Soumyadeep Hore
2024-08-22 9:56 ` [PATCH v1 12/12] net/ice: add support for FEC auto-detect for Connorsville Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 00/12] Align ICE shared code with Base driver Soumyadeep Hore
2024-08-22 18:53 ` Soumyadeep Hore [this message]
2024-08-22 18:53 ` [PATCH v2 02/12] net/ice: updates for ptp init in E825C Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 03/12] net/ice: add new tag definitions Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 04/12] net/ice: avoid reading past end of PFA Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 05/12] net/ice: update PTP init Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 06/12] net/ice: address compilation errors Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 07/12] net/ice: fix link speed for 200G Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 08/12] net/ice: update iteration of TLVs in Preserved Fields Area Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 09/12] net/ice: correct Tx Scheduler AQ command RD bit for E825C Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 10/12] net/ice: support optional flags in signature segment header Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 11/12] net/ice: update E830 50G branding strings Soumyadeep Hore
2024-08-22 18:53 ` [PATCH v2 12/12] net/ice: add support for FEC auto-detect for E830 Soumyadeep Hore
2024-08-23 9:56 ` [PATCH v3 00/12] Align ICE shared code with Base driver Soumyadeep Hore
2024-08-23 9:56 ` [PATCH v3 01/12] net/ice: use correct format specifiers for unsigned ints Soumyadeep Hore
2024-08-27 10:00 ` Bruce Richardson
2024-08-23 9:56 ` [PATCH v3 02/12] net/ice: updates for ptp init in E825C Soumyadeep Hore
2024-08-28 10:53 ` Bruce Richardson
2024-08-23 9:56 ` [PATCH v3 03/12] net/ice: add new tag definitions Soumyadeep Hore
2024-08-23 9:56 ` [PATCH v3 04/12] net/ice: avoid reading past end of PFA Soumyadeep Hore
2024-08-28 15:36 ` Bruce Richardson
2024-08-23 9:56 ` [PATCH v3 05/12] net/ice: update PTP init Soumyadeep Hore
2024-08-23 9:56 ` [PATCH v3 06/12] net/ice: address compilation errors Soumyadeep Hore
2024-08-23 9:56 ` [PATCH v3 07/12] net/ice: fix link speed for 200G Soumyadeep Hore
2024-08-23 9:56 ` [PATCH v3 08/12] net/ice: update iteration of TLVs in Preserved Fields Area Soumyadeep Hore
2024-08-28 16:05 ` Bruce Richardson
2024-08-23 9:56 ` [PATCH v3 09/12] net/ice: correct Tx Scheduler AQ command RD bit for E825C Soumyadeep Hore
2024-08-23 9:56 ` [PATCH v3 10/12] net/ice: support optional flags in signature segment header Soumyadeep Hore
2024-08-23 9:56 ` [PATCH v3 11/12] net/ice: update E830 50G branding strings Soumyadeep Hore
2024-08-23 9:56 ` [PATCH v3 12/12] net/ice: add support for FEC auto-detect for E830 Soumyadeep Hore
2024-08-26 15:55 ` [PATCH v3 00/12] Align ICE shared code with Base driver Patrick Robb
2024-08-28 16:42 ` Bruce Richardson
2024-09-13 10:22 ` Bruce Richardson
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