From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D69E94584B; Thu, 22 Aug 2024 21:48:52 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8536542F91; Thu, 22 Aug 2024 21:48:25 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.14]) by mails.dpdk.org (Postfix) with ESMTP id 22CC542F91 for ; Thu, 22 Aug 2024 21:48:23 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724356104; x=1755892104; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EH8HRfoh8LdCED85KprHW+74xGY0OkR3/84EZYhFj4E=; b=RSNz0PsHYS1zDXxrMN1tRl51632O2z/KjrVZVmFBTMuaI/1ksE3uQIsa W47MpDegDcs6DuYPICTwIiNCbY2PE9lWxrjbg0gCFwkvMRGIgwSrAEV3P cEqASZH8FTOC+LUU/paeHl+XYbmIxBp24YidzklAi/Atfng+ReRQZmWG+ xAY2kpVuDTu8eri22aWrxvv5OJVgyruixZJamGLDgSlIMwXf0gcuA1lWU XI9Nfj2IvPIfFQ42FkDL8J9CD3+6GODEn8U2jqp/8O3hOyyXcoh08B52+ lmHAplc5wBX2IAqb1ISm5BnT5W1iAZpMhaWiIgOWv0Y/sCSVkCQDzz9hq Q==; X-CSE-ConnectionGUID: DALI/LlQSFmKkmObFWkJPg== X-CSE-MsgGUID: kx1EuB8GSgenFthDdIUDDA== X-IronPort-AV: E=McAfee;i="6700,10204,11172"; a="22979673" X-IronPort-AV: E=Sophos;i="6.10,168,1719903600"; d="scan'208";a="22979673" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Aug 2024 12:48:24 -0700 X-CSE-ConnectionGUID: FwIU78gXQ8SyLA7I+eYO8g== X-CSE-MsgGUID: v5zGpfJZRQ6XjN5HasYRdw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,168,1719903600"; d="scan'208";a="92301414" Received: from unknown (HELO npf-hyd-clx-03..) ([10.145.170.182]) by orviesa002.jf.intel.com with ESMTP; 22 Aug 2024 12:48:22 -0700 From: Soumyadeep Hore To: bruce.richardson@intel.com, ian.stokes@intel.com, aman.deep.singh@intel.com Cc: dev@dpdk.org, shaiq.wani@intel.com Subject: [PATCH v2 05/12] net/ice: update PTP init Date: Thu, 22 Aug 2024 18:53:39 +0000 Message-ID: <20240822185346.221885-6-soumyadeep.hore@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240822185346.221885-1-soumyadeep.hore@intel.com> References: <20240822095612.216214-1-soumyadeep.hore@intel.com> <20240822185346.221885-1-soumyadeep.hore@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add Bit macro to init PHY 1 for E825C devices. Signed-off-by: Soumyadeep Hore --- drivers/net/ice/base/ice_ptp_hw.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c index e574ae6d4f..e61810cbdc 100644 --- a/drivers/net/ice/base/ice_ptp_hw.c +++ b/drivers/net/ice/base/ice_ptp_hw.c @@ -2365,9 +2365,10 @@ static void ice_sb_access_ena_eth56g(struct ice_hw *hw, bool enable) u32 regval = rd32(hw, PF_SB_REM_DEV_CTL); if (enable) - regval |= (cgu | eth56g_dev_0 | eth56g_dev_1); + regval |= (BIT(eth56g_dev_1)); else - regval &= ~(cgu | eth56g_dev_0 | eth56g_dev_1); + regval &= ~(BIT(eth56g_dev_1)); + wr32(hw, PF_SB_REM_DEV_CTL, regval); } @@ -5691,6 +5692,7 @@ void ice_ptp_init_phy_model(struct ice_hw *hw) } ice_sb_access_ena_eth56g(hw, true); + for (phy = 0; phy < hw->num_phys; phy++) if (hw->phy_addr[phy]) { int err; -- 2.43.0