[PATCH v3 09/12] net/ice: correct Tx Scheduler AQ command RD bit for E825C

[Soumyadeep Hore <soumyadeep.hore@intel.com>]

From: Dan Nowlin <dan.nowlin@intel.com>

In E825C, regarding the Get Tx Topology AQ command, there is
a change in the way that the RD bit must be set. For E825C,
the RD bit must be cleared for the Get Tx Topology operation,
whereas for E810 devices, the RD bit must be set.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
 drivers/net/ice/base/ice_ddp.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_ddp.c b/drivers/net/ice/base/ice_ddp.c
index 24506dfaea..d0c1cb9660 100644
--- a/drivers/net/ice/base/ice_ddp.c
+++ b/drivers/net/ice/base/ice_ddp.c
@@ -2270,6 +2270,22 @@ void ice_release_change_lock(struct ice_hw *hw)
 	ice_release_res(hw, ICE_CHANGE_LOCK_RES_ID);
 }
 
+/**
+ * ice_is_get_tx_sched_new_format
+ * @hw: pointer to the HW struct
+ *
+ * Determines if the new format for the Tx scheduler get api is supported
+ */
+static bool
+ice_is_get_tx_sched_new_format(struct ice_hw *hw)
+{
+	if (ice_is_e830(hw))
+		return true;
+	if (ice_is_e825c(hw))
+		return true;
+	return false;
+}
+
 /**
  * ice_get_set_tx_topo - get or set tx topology
  * @hw: pointer to the HW struct
@@ -2303,7 +2319,7 @@ ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,
 		ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_tx_topo);
 		cmd->get_flags = ICE_AQC_TX_TOPO_GET_RAM;
 
-		if (!ice_is_e830(hw))
+		if (!ice_is_get_tx_sched_new_format(hw))
 			desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
 	}
 
-- 
2.43.0