From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5CEC5458AC; Fri, 30 Aug 2024 22:15:17 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 03A7542F81; Fri, 30 Aug 2024 22:14:49 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) by mails.dpdk.org (Postfix) with ESMTP id 855FB42E96 for ; Fri, 30 Aug 2024 22:14:41 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725048882; x=1756584882; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VQ+rN0mQLQIGLe3NLdLCR0dkFu+WWMAsbkD5XFA6qvA=; b=LaWBsGx74LyaTKK3XFnRdmacDUvJUzMbp3pv+XZCFIsqe+KP/ZuQ5+rh rW8jsllupHztosf41ptOU/Q20KxrbGGTgn0DZ0148GgkiGWwVimb7Wv4+ KksFydAfeE3wc7hl35OF3Ip6AigepO7tgosGGy5stnK79UdPAetpUHpGw GkAoDllN2oEZDe7IXAREeb+v5VyF0680aRTs9d855vLeeVRxVhCdsq+Sf yoA3BcNH0Ubn6GRk8INIJGTRhflnfFXndoG7yYq+8picmNYTCUX1C1CYt Ykl1s8kJhdBErkRGUsVFsqoforRbObCMLgNzOLcM/gdBThCDpSYhQkGXm A==; X-CSE-ConnectionGUID: uPmHEvGjSXmW+9j+oQKO8Q== X-CSE-MsgGUID: JdgIobYST1uoNlDxaf07vw== X-IronPort-AV: E=McAfee;i="6700,10204,11180"; a="23661193" X-IronPort-AV: E=Sophos;i="6.10,189,1719903600"; d="scan'208";a="23661193" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Aug 2024 13:14:41 -0700 X-CSE-ConnectionGUID: LQyB/u6fS9S9QjBNyV/T/w== X-CSE-MsgGUID: 8Ac2TynkR8up008Pm1m3Vw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,189,1719903600"; d="scan'208";a="94731885" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orviesa002.jf.intel.com with ESMTP; 30 Aug 2024 13:14:40 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v1 05/10] baseband/acc: enhance SW ring alignment Date: Fri, 30 Aug 2024 13:09:47 -0700 Message-Id: <20240830200952.182685-6-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20240830200952.182685-1-hernan.vargas@intel.com> References: <20240830200952.182685-1-hernan.vargas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Calculate the aligned total size required for queue rings, ensuring that the size is a power of two for proper memory allocation. Signed-off-by: Hernan Vargas --- drivers/baseband/acc/acc_common.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/baseband/acc/acc_common.h b/drivers/baseband/acc/acc_common.h index 5c5cccf4c9c6..49fdf495613c 100644 --- a/drivers/baseband/acc/acc_common.h +++ b/drivers/baseband/acc/acc_common.h @@ -804,19 +804,20 @@ alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc_device *d, int i = 0; uint32_t q_sw_ring_size = ACC_MAX_QUEUE_DEPTH * get_desc_len(); uint32_t dev_sw_ring_size = q_sw_ring_size * num_queues; - /* Free first in case this is a reconfiguration */ + uint32_t alignment = q_sw_ring_size * rte_align32pow2(num_queues); + /* Free first in case this is dev_sw_ring_size, q_sw_ring_size, socket); reconfiguration */ rte_free(d->sw_rings_base); /* Find an aligned block of memory to store sw rings */ while (i < ACC_SW_RING_MEM_ALLOC_ATTEMPTS) { /* * sw_ring allocated memory is guaranteed to be aligned to - * q_sw_ring_size at the condition that the requested size is + * alignment at the condition that the requested size is * less than the page size */ sw_rings_base = rte_zmalloc_socket( dev->device->driver->name, - dev_sw_ring_size, q_sw_ring_size, socket); + dev_sw_ring_size, alignment, socket); if (sw_rings_base == NULL) { rte_acc_log(ERR, -- 2.37.1