From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D6CBF458CA; Mon, 2 Sep 2024 08:29:54 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A71FD402F1; Mon, 2 Sep 2024 08:29:54 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 433FF400EF for ; Mon, 2 Sep 2024 08:29:53 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 481LuJ08029627 for ; Sun, 1 Sep 2024 23:29:52 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=pfpt0220; bh=fdA/h8d0PmCcehT44lerHwT bDa0KAqtknlOawido15Y=; b=e9ApvkFMgSMkFpedQ+WRRE+YzYPmvgP1mB0VqGH 0A/i8yIM/9m1SLRP9VULPQ6qJIYl2dDFiXp+KZpLQ4erc9Dd8D/+3vLVOt2kPnW1 Z43+6QSKPVnKIMiZyMYtLCuQXSBK/U248EgDxh7YE9uJWVeIay+smTpkuQ1xTBwR X5AUnCBZirkDjkaNHjhzOQXdfcFp1FF/9YmoHyDz5NALGC2Xb7CLzYrNhUkROZVV pcSaqcs5J/ZeBwdX9rrxm066wmj+qq6NQ8XL8CTV0jUpoiTw5Aa7g+k7pVy+NGWO gqMP+4AP0Nm38W/a0Vm0hMYuFFe6eDXDX/fMSAn+LPEFT4Q== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 41c2pgvcjv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sun, 01 Sep 2024 23:29:52 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 1 Sep 2024 23:29:51 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Sun, 1 Sep 2024 23:29:51 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id DBA183F70B6; Sun, 1 Sep 2024 23:29:49 -0700 (PDT) From: Harman Kalra To: CC: , Harman Kalra Subject: [PATCH 0/5] Marvell cn20K SOC base code Date: Mon, 2 Sep 2024 11:59:35 +0530 Message-ID: <20240902062940.182273-1-hkalra@marvell.com> X-Mailer: git-send-email 2.46.0.469.g4590f2e941 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: HCztAn9mqEGAPrHjwoiWJjvOQmngT77x X-Proofpoint-GUID: HCztAn9mqEGAPrHjwoiWJjvOQmngT77x X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-09-01_06,2024-08-30_01,2024-05-17_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patchset introduces foundational support for Marvell's CN20K SoC. Based on this series cn20K enhancements to PMD's such as 'common/cnxk', 'net/cnxk', 'mempool/cnxk', 'event/cnxk' etc, will be added. Harman Kalra (5): common/cnxk: define platform configuration common/cnxk: add CN20ka A0 model common/cnxk: add cn20ka mbox support common/cnxk: define PF VF bit encoding in pcifunc common/cnxk: enable PF VF mbox drivers/common/cnxk/hw/rvu.h | 31 +++ drivers/common/cnxk/meson.build | 13 ++ drivers/common/cnxk/roc_constants.h | 12 +- drivers/common/cnxk/roc_dev.c | 327 +++++++++++++++++++--------- drivers/common/cnxk/roc_dev_priv.h | 51 ++++- drivers/common/cnxk/roc_mbox.c | 86 ++++++-- drivers/common/cnxk/roc_model.c | 9 +- drivers/common/cnxk/roc_model.h | 48 +++- drivers/common/cnxk/roc_npc.c | 5 +- drivers/common/cnxk/roc_platform.h | 1 + 10 files changed, 454 insertions(+), 129 deletions(-) -- 2.25.1