From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BFDA4458CA; Mon, 2 Sep 2024 08:30:08 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4872C40611; Mon, 2 Sep 2024 08:30:01 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 0C94F4060A for ; Mon, 2 Sep 2024 08:29:58 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 48265ork006899 for ; Sun, 1 Sep 2024 23:29:58 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=t 45O7yprOZ5UNxaJ0FiXcVfXHpDIv7x2Bn98i206GKU=; b=FQHX+wiX9gCnAJ3ob /eZiztrqIjXeiNGo6Af5sqp3nogUTnykoSU+HILljqsbvdeWIon9XmbOqMRMMdY7 ct2gzyb3LnEgLRQA/ZInre3OwQzQoYom6oN5ctTCkwgr1TKxS7BNMpn8c3d4F1j1 3GtFcnmtc9GsikfY4XhmLVGSVxD680w6WgQ23s7kvUwDP/wZgTr6wu/1Zj0JPB2X A7E6Gny6tJbAYC7acqWZ3Ac6kKhSzdoI8nBhpijVBnoqP/C8xIlYVYDShkbx7E37 vhK+qD4ezQXp1DAVYmeqPaUxBK+lMeC3DkAWFjnKdRAhR7/WFsOCj2NNZapVJufH cARzA== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 41d7sxg25c-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sun, 01 Sep 2024 23:29:58 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 1 Sep 2024 23:29:56 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Sun, 1 Sep 2024 23:29:56 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id 85D0D3F70B6; Sun, 1 Sep 2024 23:29:54 -0700 (PDT) From: Harman Kalra To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: Subject: [PATCH 2/5] common/cnxk: add CN20ka A0 model Date: Mon, 2 Sep 2024 11:59:37 +0530 Message-ID: <20240902062940.182273-3-hkalra@marvell.com> X-Mailer: git-send-email 2.46.0.469.g4590f2e941 In-Reply-To: <20240902062940.182273-1-hkalra@marvell.com> References: <20240902062940.182273-1-hkalra@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 884tmTD4LoCpuFm2WpUGmTYMrxkt59dH X-Proofpoint-ORIG-GUID: 884tmTD4LoCpuFm2WpUGmTYMrxkt59dH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-09-01_06,2024-08-30_01,2024-05-17_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Adding support for CN20ka A0 pass Signed-off-by: Harman Kalra --- drivers/common/cnxk/roc_model.c | 9 +++++-- drivers/common/cnxk/roc_model.h | 48 ++++++++++++++++++++++++++++++--- 2 files changed, 52 insertions(+), 5 deletions(-) diff --git a/drivers/common/cnxk/roc_model.c b/drivers/common/cnxk/roc_model.c index 6dc2afe7f0..0c50064815 100644 --- a/drivers/common/cnxk/roc_model.c +++ b/drivers/common/cnxk/roc_model.c @@ -16,7 +16,9 @@ struct roc_model *roc_model; #define VENDOR_CAVIUM 0x43 /* 'C' */ #define SOC_PART_CN10K 0xD49 +#define SOC_PART_CN20K 0xD8E +#define PART_206xx 0xA0 #define PART_106xx 0xB9 #define PART_105xx 0xBA #define PART_105xxN 0xBC @@ -59,6 +61,7 @@ static const struct model_db { uint64_t flag; char name[ROC_MODEL_STR_LEN_MAX]; } model_db[] = { + {VENDOR_ARM, PART_206xx, 0, 0, ROC_MODEL_CN206xx_A0, "cn20ka_a0"}, {VENDOR_ARM, PART_106xx, 0, 0, ROC_MODEL_CN106xx_A0, "cn10ka_a0"}, {VENDOR_ARM, PART_106xx, 0, 1, ROC_MODEL_CN106xx_A1, "cn10ka_a1"}, {VENDOR_ARM, PART_106xx, 1, 0, ROC_MODEL_CN106xx_B0, "cn10ka_b0"}, @@ -187,8 +190,8 @@ populate_model(struct roc_model *model, uint32_t midr) major = (midr >> MODEL_MAJOR_SHIFT) & MODEL_MAJOR_MASK; minor = (midr >> MODEL_MINOR_SHIFT) & MODEL_MINOR_MASK; - /* Update part number for cn10k from device-tree */ - if (part == SOC_PART_CN10K) { + /* Update part number from device-tree */ + if (part == SOC_PART_CN10K || part == SOC_PART_CN20K) { if (cn10k_part_pass_get(&part, &pass)) goto not_found; /* @@ -257,9 +260,11 @@ detect_invalid_config(void) { #ifdef ROC_PLATFORM_CN9K #ifdef ROC_PLATFORM_CN10K +#ifdef ROC_PLATFORM_CN20K PLT_STATIC_ASSERT(0); #endif #endif +#endif } static uint64_t diff --git a/drivers/common/cnxk/roc_model.h b/drivers/common/cnxk/roc_model.h index b6dab4f64e..4e686bea2c 100644 --- a/drivers/common/cnxk/roc_model.h +++ b/drivers/common/cnxk/roc_model.h @@ -12,6 +12,7 @@ extern struct roc_model *roc_model; struct roc_model { +/* CN9k Models*/ #define ROC_MODEL_CN96xx_A0 BIT_ULL(0) #define ROC_MODEL_CN96xx_B0 BIT_ULL(1) #define ROC_MODEL_CN96xx_C0 BIT_ULL(2) @@ -24,6 +25,7 @@ struct roc_model { #define ROC_MODEL_CNF95xxN_B0 BIT_ULL(15) #define ROC_MODEL_CN98xx_A0 BIT_ULL(16) #define ROC_MODEL_CN98xx_A1 BIT_ULL(17) +/* CN10k Models*/ #define ROC_MODEL_CN106xx_A0 BIT_ULL(20) #define ROC_MODEL_CNF105xx_A0 BIT_ULL(21) #define ROC_MODEL_CNF105xxN_A0 BIT_ULL(22) @@ -32,6 +34,9 @@ struct roc_model { #define ROC_MODEL_CNF105xx_A1 BIT_ULL(25) #define ROC_MODEL_CN106xx_B0 BIT_ULL(26) #define ROC_MODEL_CNF105xxN_B0 BIT_ULL(27) +/* CN20k Models*/ +#define ROC_MODEL_CN206xx_A0 BIT_ULL(40) + /* Following flags describe platform code is running on */ #define ROC_ENV_HW BIT_ULL(61) #define ROC_ENV_EMUL BIT_ULL(62) @@ -43,6 +48,7 @@ struct roc_model { char env[ROC_MODEL_STR_LEN_MAX]; } __plt_cache_aligned; +/* CN9K models */ #define ROC_MODEL_CN96xx_Ax (ROC_MODEL_CN96xx_A0 | ROC_MODEL_CN96xx_B0) #define ROC_MODEL_CN98xx_Ax (ROC_MODEL_CN98xx_A0 | ROC_MODEL_CN98xx_A1) #define ROC_MODEL_CN9K \ @@ -56,6 +62,7 @@ struct roc_model { ROC_MODEL_CNF95xxN_A0 | ROC_MODEL_CNF95xxN_A1 | \ ROC_MODEL_CNF95xxN_B0) +/* CN10K models */ #define ROC_MODEL_CN106xx (ROC_MODEL_CN106xx_A0 | ROC_MODEL_CN106xx_A1 | ROC_MODEL_CN106xx_B0) #define ROC_MODEL_CNF105xx (ROC_MODEL_CNF105xx_A0 | ROC_MODEL_CNF105xx_A1) #define ROC_MODEL_CNF105xxN (ROC_MODEL_CNF105xxN_A0 | ROC_MODEL_CNF105xxN_B0) @@ -65,6 +72,10 @@ struct roc_model { ROC_MODEL_CN103xx) #define ROC_MODEL_CNF10K (ROC_MODEL_CNF105xx | ROC_MODEL_CNF105xxN) +/* CN20K models */ +#define ROC_MODEL_CN206xx (ROC_MODEL_CN206xx_A0) +#define ROC_MODEL_CN20K (ROC_MODEL_CN206xx) + /* Runtime variants */ static inline uint64_t roc_model_runtime_is_cn9k(void) @@ -78,13 +89,32 @@ roc_model_runtime_is_cn10k(void) return (roc_model->flag & (ROC_MODEL_CN10K)); } +static inline uint64_t +roc_model_runtime_is_cn20k(void) +{ + return (roc_model->flag & (ROC_MODEL_CN20K)); +} + /* Compile time variants */ #ifdef ROC_PLATFORM_CN9K #define roc_model_constant_is_cn9k() 1 #define roc_model_constant_is_cn10k() 0 -#else +#define roc_model_constant_is_cn20k() 0 +#endif +#ifdef ROC_PLATFORM_CN10K #define roc_model_constant_is_cn9k() 0 #define roc_model_constant_is_cn10k() 1 +#define roc_model_constant_is_cn20k() 0 +#endif +#ifdef ROC_PLATFORM_CN20K +#define roc_model_constant_is_cn9k() 0 +#define roc_model_constant_is_cn10k() 0 +#define roc_model_constant_is_cn20k() 1 +#endif +#if !defined(ROC_PLATFORM_CN9K) && !defined(ROC_PLATFORM_CN10K) && !defined(ROC_PLATFORM_CN20K) +#define roc_model_constant_is_cn9k() 0 +#define roc_model_constant_is_cn10k() 0 +#define roc_model_constant_is_cn20k() 0 #endif /* @@ -97,7 +127,7 @@ roc_model_is_cn9k(void) #ifdef ROC_PLATFORM_CN9K return 1; #endif -#ifdef ROC_PLATFORM_CN10K +#if defined(ROC_PLATFORM_CN10K) || defined(ROC_PLATFORM_CN20K) return 0; #endif return roc_model_runtime_is_cn9k(); @@ -109,12 +139,24 @@ roc_model_is_cn10k(void) #ifdef ROC_PLATFORM_CN10K return 1; #endif -#ifdef ROC_PLATFORM_CN9K +#if defined(ROC_PLATFORM_CN9K) || defined(ROC_PLATFORM_CN20K) return 0; #endif return roc_model_runtime_is_cn10k(); } +static inline uint64_t +roc_model_is_cn20k(void) +{ +#ifdef ROC_PLATFORM_CN20K + return 1; +#endif +#if defined(ROC_PLATFORM_CN9K) || defined(ROC_PLATFORM_CN10K) + return 0; +#endif + return roc_model_runtime_is_cn20k(); +} + static inline uint64_t roc_model_is_cn98xx(void) { -- 2.25.1