From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7393D458CA; Mon, 2 Sep 2024 08:30:27 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2B10340654; Mon, 2 Sep 2024 08:30:08 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 40F6040649 for ; Mon, 2 Sep 2024 08:30:06 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 481MxpfC032080 for ; Sun, 1 Sep 2024 23:30:05 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=4 SsyaVAa+KmExwBul3ftsOzGhz0Lk4IrBcGTQoILe4A=; b=WmqivDZUBUO5CdQZb rJDwHQaRHw/rx0yA3GeTcz4BQ+DRdeER64Pcs25Gz6svVyGWuuXDYJ65nQ5t2phG 7UF7mHfHldYabiq/wikoyX+UGbG81ybRyzJyks/kQsNmgoYKNYQXdHtr8Vse/sto HKa+sMALTqx6h/90VujO7TTny2QrWRKZlxmuVwAGz1MkH+4QsVZUoFccTKtXN1yG VsDcYGgJzuQo8qexFRULQ/9k1jFy9CSbwQm8eskU7C+ZMBI1FZauxfMc7o2n46cR t/JB6+5IuLLtSkXYyCEuoNPwQ/ozLGZISSyQaTz2QneBY3wxA35xe361TYdudX6m o6ZuQ== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 41c2pgvcn6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sun, 01 Sep 2024 23:30:05 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 1 Sep 2024 23:30:02 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Sun, 1 Sep 2024 23:30:02 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id 3D55D3F70B6; Sun, 1 Sep 2024 23:29:59 -0700 (PDT) From: Harman Kalra To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: Subject: [PATCH 4/5] common/cnxk: define PF VF bit encoding in pcifunc Date: Mon, 2 Sep 2024 11:59:39 +0530 Message-ID: <20240902062940.182273-5-hkalra@marvell.com> X-Mailer: git-send-email 2.46.0.469.g4590f2e941 In-Reply-To: <20240902062940.182273-1-hkalra@marvell.com> References: <20240902062940.182273-1-hkalra@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: MyqAXAA7sMFWq0Uo2vgFpTSQt2pQNGTQ X-Proofpoint-GUID: MyqAXAA7sMFWq0Uo2vgFpTSQt2pQNGTQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-09-01_06,2024-08-30_01,2024-05-17_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In cn20k, PF and VF bit encoding format in a pcifunc has changed to accommodate more no of PFs. Hence defining the pf/vf encoding parameters for cn20k and cn9k/10k platforms. Signed-off-by: Harman Kalra --- drivers/common/cnxk/roc_dev.c | 1 + drivers/common/cnxk/roc_dev_priv.h | 31 ++++++++++++++++++++++++------ drivers/common/cnxk/roc_npc.c | 5 ++++- 3 files changed, 30 insertions(+), 7 deletions(-) diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c index b9bbcac3d8..0b434e4a8a 100644 --- a/drivers/common/cnxk/roc_dev.c +++ b/drivers/common/cnxk/roc_dev.c @@ -23,6 +23,7 @@ /* VF interrupt message pending bits - mbox or flr */ #define ROC_DEV_MBOX_PEND BIT_ULL(0) #define ROC_DEV_FLR_PEND BIT_ULL(1) + static void * mbox_mem_map(off_t off, size_t size) { diff --git a/drivers/common/cnxk/roc_dev_priv.h b/drivers/common/cnxk/roc_dev_priv.h index 976eb48346..75395e5fd5 100644 --- a/drivers/common/cnxk/roc_dev_priv.h +++ b/drivers/common/cnxk/roc_dev_priv.h @@ -7,12 +7,19 @@ #define DEV_HWCAP_F_VF BIT_ULL(0) /* VF device */ +/* PF and VF bit encoding parameters in pcifunc */ +#define RVU_PFVF_PF_SHIFT_CN20K 9 +#define RVU_PFVF_PF_MASK_CN20K 0x7F +#define RVU_PFVF_FUNC_SHIFT_CN20K 0 +#define RVU_PFVF_FUNC_MASK_CN20K 0x1FF + #define RVU_PFVF_PF_SHIFT 10 #define RVU_PFVF_PF_MASK 0x3F #define RVU_PFVF_FUNC_SHIFT 0 #define RVU_PFVF_FUNC_MASK 0x3FF -#define RVU_MAX_VF 64 /* RVU_PF_VFPF_MBOX_INT(0..1) */ -#define RVU_MAX_INT_RETRY 3 + +#define RVU_MAX_VF 64 /* RVU_PF_VFPF_MBOX_INT(0..1) */ +#define RVU_MAX_INT_RETRY 3 /* PF/VF message handling timer */ #define VF_PF_MBOX_TIMER_MS (20 * 1000) @@ -52,25 +59,37 @@ struct dev_ops { static inline int dev_get_vf(uint16_t pf_func) { - return (((pf_func >> RVU_PFVF_FUNC_SHIFT) & RVU_PFVF_FUNC_MASK) - 1); + if (roc_model_is_cn20k()) + return (((pf_func >> RVU_PFVF_FUNC_SHIFT_CN20K) & RVU_PFVF_FUNC_MASK_CN20K) - 1); + else + return (((pf_func >> RVU_PFVF_FUNC_SHIFT) & RVU_PFVF_FUNC_MASK) - 1); } static inline int dev_get_pf(uint16_t pf_func) { - return (pf_func >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK; + if (roc_model_is_cn20k()) + return (pf_func >> RVU_PFVF_PF_SHIFT_CN20K) & RVU_PFVF_PF_MASK_CN20K; + else + return (pf_func >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK; } static inline int dev_pf_func(int pf, int vf) { - return (pf << RVU_PFVF_PF_SHIFT) | ((vf << RVU_PFVF_FUNC_SHIFT) + 1); + if (roc_model_is_cn20k()) + return (pf << RVU_PFVF_PF_SHIFT_CN20K) | ((vf << RVU_PFVF_FUNC_SHIFT_CN20K) + 1); + else + return (pf << RVU_PFVF_PF_SHIFT) | ((vf << RVU_PFVF_FUNC_SHIFT) + 1); } static inline int dev_is_afvf(uint16_t pf_func) { - return !(pf_func & ~RVU_PFVF_FUNC_MASK); + if (roc_model_is_cn20k()) + return !(pf_func & ~RVU_PFVF_FUNC_MASK_CN20K); + else + return !(pf_func & ~RVU_PFVF_FUNC_MASK); } struct mbox_sync { diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c index 37e1a6a7ef..8a951b6360 100644 --- a/drivers/common/cnxk/roc_npc.c +++ b/drivers/common/cnxk/roc_npc.c @@ -616,7 +616,10 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr, case ROC_NPC_ACTION_TYPE_VF: vf_act = (const struct roc_npc_action_vf *)actions->conf; req_act |= ROC_NPC_ACTION_TYPE_VF; - vf_id = vf_act->id & RVU_PFVF_FUNC_MASK; + if (roc_model_is_cn20k()) + vf_id = vf_act->id & RVU_PFVF_FUNC_MASK_CN20K; + else + vf_id = vf_act->id & RVU_PFVF_FUNC_MASK; pf_func &= (0xfc00); pf_func = (pf_func | (vf_id + 1)); break; -- 2.25.1