From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B1E9D45909; Thu, 5 Sep 2024 09:47:22 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D111842E49; Thu, 5 Sep 2024 09:46:52 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id DAC3E42E52 for ; Thu, 5 Sep 2024 09:46:51 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 48547jkZ013950 for ; Thu, 5 Sep 2024 00:46:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=A 1Vu1RwSCoOxmoOBSs48UskfSFdhTOU3Hm51ynLiQO0=; b=BN22W85Zz9INuY0s2 HcE2vrKEDvlcXBVg8vZRXfzPYS1APlr4WqKZubAtUYDp285fUjDa1XsMnLYyg4dl VvwohqFpKlPxILsaI4o8nlnhITO90NDU9sEOUyNk4oRyTubmtKI0emvTPXAje6n+ IHuFZd6csiftx4pOYucPEJmcMo3LDJRsE/exUH7LJZoOjcqsbMJC1Swqh34SK/Ss Hch96H+KVDUtRmO2nood8k32rP7kegpH7KPiVi4HnxaEx4Oi2SMg1CmqgAhhjd4t YRvaiBep0JY1eWcZSwR7IXEdn5ca+b8sb1ohrzrGL1Pvk8CHDj3nwx/H/l3zSdyK nOigA== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 41ev31tfpd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 05 Sep 2024 00:46:50 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 5 Sep 2024 00:46:48 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 5 Sep 2024 00:46:47 -0700 Received: from hyd1554.caveonetworks.com (unknown [10.29.56.32]) by maili.marvell.com (Postfix) with ESMTP id 1ED933F70AC; Thu, 5 Sep 2024 00:46:45 -0700 (PDT) From: Tejasree Kondoj To: Akhil Goyal CC: Anoob Joseph , Vidya Sagar Velumuri , Subject: [PATCH 06/11] common/cnxk: move algo enums to common Date: Thu, 5 Sep 2024 13:16:26 +0530 Message-ID: <20240905074631.1462357-7-ktejasree@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240905074631.1462357-1-ktejasree@marvell.com> References: <20240905074631.1462357-1-ktejasree@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: refPgXz92SNTv9YbpJPD_0jc5-uXZv4f X-Proofpoint-GUID: refPgXz92SNTv9YbpJPD_0jc5-uXZv4f X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-05_04,2024-09-04_01,2024-09-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Anoob Joseph The enums are same between 9k & 10k. Move to common. Signed-off-by: Anoob Joseph --- drivers/common/cnxk/cnxk_security.c | 106 ++++++++++------------- drivers/common/cnxk/roc_ie.h | 22 +++++ drivers/common/cnxk/roc_ie_on.h | 22 ----- drivers/common/cnxk/roc_ie_ot.h | 19 ---- drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 6 +- drivers/net/cnxk/cn10k_ethdev_sec.c | 8 +- drivers/net/cnxk/cn9k_ethdev_sec.c | 12 +-- 7 files changed, 83 insertions(+), 112 deletions(-) diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c index 15b0bedf43..e67c3f2331 100644 --- a/drivers/common/cnxk/cnxk_security.c +++ b/drivers/common/cnxk/cnxk_security.c @@ -66,15 +66,15 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 *w2, uint8_t *cipher_k switch (crypto_xfrm->aead.algo) { case RTE_CRYPTO_AEAD_AES_GCM: - w2->s.enc_type = ROC_IE_OT_SA_ENC_AES_GCM; - w2->s.auth_type = ROC_IE_OT_SA_AUTH_NULL; + w2->s.enc_type = ROC_IE_SA_ENC_AES_GCM; + w2->s.auth_type = ROC_IE_SA_AUTH_NULL; memcpy(salt_key, &ipsec_xfrm->salt, 4); tmp_salt = (uint32_t *)salt_key; *tmp_salt = rte_be_to_cpu_32(*tmp_salt); break; case RTE_CRYPTO_AEAD_AES_CCM: - w2->s.enc_type = ROC_IE_OT_SA_ENC_AES_CCM; - w2->s.auth_type = ROC_IE_OT_SA_AUTH_NULL; + w2->s.enc_type = ROC_IE_SA_ENC_AES_CCM; + w2->s.auth_type = ROC_IE_SA_AUTH_NULL; ccm_flag = 0x07 & ~ROC_CPT_AES_CCM_CTR_LEN; *salt_key = ccm_flag; memcpy(PLT_PTR_ADD(salt_key, 1), &ipsec_xfrm->salt, 3); @@ -88,16 +88,16 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 *w2, uint8_t *cipher_k if (cipher_xfrm != NULL) { switch (cipher_xfrm->cipher.algo) { case RTE_CRYPTO_CIPHER_NULL: - w2->s.enc_type = ROC_IE_OT_SA_ENC_NULL; + w2->s.enc_type = ROC_IE_SA_ENC_NULL; break; case RTE_CRYPTO_CIPHER_AES_CBC: - w2->s.enc_type = ROC_IE_OT_SA_ENC_AES_CBC; + w2->s.enc_type = ROC_IE_SA_ENC_AES_CBC; break; case RTE_CRYPTO_CIPHER_AES_CTR: - w2->s.enc_type = ROC_IE_OT_SA_ENC_AES_CTR; + w2->s.enc_type = ROC_IE_SA_ENC_AES_CTR; break; case RTE_CRYPTO_CIPHER_3DES_CBC: - w2->s.enc_type = ROC_IE_OT_SA_ENC_3DES_CBC; + w2->s.enc_type = ROC_IE_SA_ENC_3DES_CBC; break; default: return -ENOTSUP; @@ -113,25 +113,25 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 *w2, uint8_t *cipher_k plt_err("anti-replay can't be supported with integrity service disabled"); return -EINVAL; } - w2->s.auth_type = ROC_IE_OT_SA_AUTH_NULL; + w2->s.auth_type = ROC_IE_SA_AUTH_NULL; break; case RTE_CRYPTO_AUTH_SHA1_HMAC: - w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA1; + w2->s.auth_type = ROC_IE_SA_AUTH_SHA1; break; case RTE_CRYPTO_AUTH_SHA256_HMAC: - w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA2_256; + w2->s.auth_type = ROC_IE_SA_AUTH_SHA2_256; break; case RTE_CRYPTO_AUTH_SHA384_HMAC: - w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA2_384; + w2->s.auth_type = ROC_IE_SA_AUTH_SHA2_384; break; case RTE_CRYPTO_AUTH_SHA512_HMAC: - w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA2_512; + w2->s.auth_type = ROC_IE_SA_AUTH_SHA2_512; break; case RTE_CRYPTO_AUTH_AES_XCBC_MAC: - w2->s.auth_type = ROC_IE_OT_SA_AUTH_AES_XCBC_128; + w2->s.auth_type = ROC_IE_SA_AUTH_AES_XCBC_128; break; case RTE_CRYPTO_AUTH_AES_GMAC: - w2->s.auth_type = ROC_IE_OT_SA_AUTH_AES_GMAC; + w2->s.auth_type = ROC_IE_SA_AUTH_AES_GMAC; key = auth_xfrm->auth.key.data; length = auth_xfrm->auth.key.length; memcpy(salt_key, &ipsec_xfrm->salt, 4); @@ -174,12 +174,9 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 *w2, uint8_t *cipher_k } /* Set AES key length */ - if (w2->s.enc_type == ROC_IE_OT_SA_ENC_AES_CBC || - w2->s.enc_type == ROC_IE_OT_SA_ENC_AES_CCM || - w2->s.enc_type == ROC_IE_OT_SA_ENC_AES_CTR || - w2->s.enc_type == ROC_IE_OT_SA_ENC_AES_GCM || - w2->s.enc_type == ROC_IE_OT_SA_ENC_AES_CCM || - w2->s.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC) { + if (w2->s.enc_type == ROC_IE_SA_ENC_AES_CBC || w2->s.enc_type == ROC_IE_SA_ENC_AES_CCM || + w2->s.enc_type == ROC_IE_SA_ENC_AES_CTR || w2->s.enc_type == ROC_IE_SA_ENC_AES_GCM || + w2->s.enc_type == ROC_IE_SA_ENC_AES_CCM || w2->s.auth_type == ROC_IE_SA_AUTH_AES_GMAC) { switch (length) { case ROC_CPT_AES128_KEY_LEN: w2->s.aes_key_len = ROC_IE_SA_AES_KEY_LEN_128; @@ -809,11 +806,11 @@ on_ipsec_sa_ctl_set(struct rte_security_ipsec_xform *ipsec, if (crypto_xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) { switch (crypto_xform->aead.algo) { case RTE_CRYPTO_AEAD_AES_GCM: - ctl->enc_type = ROC_IE_ON_SA_ENC_AES_GCM; + ctl->enc_type = ROC_IE_SA_ENC_AES_GCM; aes_key_len = crypto_xform->aead.key.length; break; case RTE_CRYPTO_AEAD_AES_CCM: - ctl->enc_type = ROC_IE_ON_SA_ENC_AES_CCM; + ctl->enc_type = ROC_IE_SA_ENC_AES_CCM; aes_key_len = crypto_xform->aead.key.length; break; default: @@ -824,20 +821,20 @@ on_ipsec_sa_ctl_set(struct rte_security_ipsec_xform *ipsec, if (cipher_xform != NULL) { switch (cipher_xform->cipher.algo) { case RTE_CRYPTO_CIPHER_NULL: - ctl->enc_type = ROC_IE_ON_SA_ENC_NULL; + ctl->enc_type = ROC_IE_SA_ENC_NULL; break; case RTE_CRYPTO_CIPHER_DES_CBC: - ctl->enc_type = ROC_IE_ON_SA_ENC_DES_CBC; + ctl->enc_type = ROC_IE_SA_ENC_DES_CBC; break; case RTE_CRYPTO_CIPHER_3DES_CBC: - ctl->enc_type = ROC_IE_ON_SA_ENC_3DES_CBC; + ctl->enc_type = ROC_IE_SA_ENC_3DES_CBC; break; case RTE_CRYPTO_CIPHER_AES_CBC: - ctl->enc_type = ROC_IE_ON_SA_ENC_AES_CBC; + ctl->enc_type = ROC_IE_SA_ENC_AES_CBC; aes_key_len = cipher_xform->cipher.key.length; break; case RTE_CRYPTO_CIPHER_AES_CTR: - ctl->enc_type = ROC_IE_ON_SA_ENC_AES_CTR; + ctl->enc_type = ROC_IE_SA_ENC_AES_CTR; aes_key_len = cipher_xform->cipher.key.length; break; default: @@ -848,32 +845,32 @@ on_ipsec_sa_ctl_set(struct rte_security_ipsec_xform *ipsec, switch (auth_xform->auth.algo) { case RTE_CRYPTO_AUTH_NULL: - ctl->auth_type = ROC_IE_ON_SA_AUTH_NULL; + ctl->auth_type = ROC_IE_SA_AUTH_NULL; break; case RTE_CRYPTO_AUTH_MD5_HMAC: - ctl->auth_type = ROC_IE_ON_SA_AUTH_MD5; + ctl->auth_type = ROC_IE_SA_AUTH_MD5; break; case RTE_CRYPTO_AUTH_SHA1_HMAC: - ctl->auth_type = ROC_IE_ON_SA_AUTH_SHA1; + ctl->auth_type = ROC_IE_SA_AUTH_SHA1; break; case RTE_CRYPTO_AUTH_SHA224_HMAC: - ctl->auth_type = ROC_IE_ON_SA_AUTH_SHA2_224; + ctl->auth_type = ROC_IE_SA_AUTH_SHA2_224; break; case RTE_CRYPTO_AUTH_SHA256_HMAC: - ctl->auth_type = ROC_IE_ON_SA_AUTH_SHA2_256; + ctl->auth_type = ROC_IE_SA_AUTH_SHA2_256; break; case RTE_CRYPTO_AUTH_SHA384_HMAC: - ctl->auth_type = ROC_IE_ON_SA_AUTH_SHA2_384; + ctl->auth_type = ROC_IE_SA_AUTH_SHA2_384; break; case RTE_CRYPTO_AUTH_SHA512_HMAC: - ctl->auth_type = ROC_IE_ON_SA_AUTH_SHA2_512; + ctl->auth_type = ROC_IE_SA_AUTH_SHA2_512; break; case RTE_CRYPTO_AUTH_AES_GMAC: - ctl->auth_type = ROC_IE_ON_SA_AUTH_AES_GMAC; + ctl->auth_type = ROC_IE_SA_AUTH_AES_GMAC; aes_key_len = auth_xform->auth.key.length; break; case RTE_CRYPTO_AUTH_AES_XCBC_MAC: - ctl->auth_type = ROC_IE_ON_SA_AUTH_AES_XCBC_128; + ctl->auth_type = ROC_IE_SA_AUTH_AES_XCBC_128; break; default: plt_err("Unsupported auth algorithm"); @@ -882,12 +879,9 @@ on_ipsec_sa_ctl_set(struct rte_security_ipsec_xform *ipsec, } /* Set AES key length */ - if (ctl->enc_type == ROC_IE_ON_SA_ENC_AES_CBC || - ctl->enc_type == ROC_IE_ON_SA_ENC_AES_CCM || - ctl->enc_type == ROC_IE_ON_SA_ENC_AES_CTR || - ctl->enc_type == ROC_IE_ON_SA_ENC_AES_GCM || - ctl->enc_type == ROC_IE_ON_SA_ENC_AES_CCM || - ctl->auth_type == ROC_IE_ON_SA_AUTH_AES_GMAC) { + if (ctl->enc_type == ROC_IE_SA_ENC_AES_CBC || ctl->enc_type == ROC_IE_SA_ENC_AES_CCM || + ctl->enc_type == ROC_IE_SA_ENC_AES_CTR || ctl->enc_type == ROC_IE_SA_ENC_AES_GCM || + ctl->enc_type == ROC_IE_SA_ENC_AES_CCM || ctl->auth_type == ROC_IE_SA_AUTH_AES_GMAC) { switch (aes_key_len) { case 16: ctl->aes_key_len = ROC_IE_SA_AES_KEY_LEN_128; @@ -998,30 +992,26 @@ cnxk_on_ipsec_outb_sa_create(struct rte_security_ipsec_xform *ipsec, if (ret) return ret; - if (ctl->enc_type == ROC_IE_ON_SA_ENC_AES_GCM || - ctl->enc_type == ROC_IE_ON_SA_ENC_AES_CCM || ctl->auth_type == ROC_IE_ON_SA_AUTH_NULL || - ctl->auth_type == ROC_IE_ON_SA_AUTH_AES_GMAC) { + if (ctl->enc_type == ROC_IE_SA_ENC_AES_GCM || ctl->enc_type == ROC_IE_SA_ENC_AES_CCM || + ctl->auth_type == ROC_IE_SA_AUTH_NULL || ctl->auth_type == ROC_IE_SA_AUTH_AES_GMAC) { template = &out_sa->aes_gcm.template; ctx_len = offsetof(struct roc_ie_on_outb_sa, aes_gcm.template); } else { switch (ctl->auth_type) { - case ROC_IE_ON_SA_AUTH_MD5: - case ROC_IE_ON_SA_AUTH_SHA1: + case ROC_IE_SA_AUTH_MD5: + case ROC_IE_SA_AUTH_SHA1: template = &out_sa->sha1.template; - ctx_len = offsetof(struct roc_ie_on_outb_sa, - sha1.template); + ctx_len = offsetof(struct roc_ie_on_outb_sa, sha1.template); break; - case ROC_IE_ON_SA_AUTH_SHA2_256: - case ROC_IE_ON_SA_AUTH_SHA2_384: - case ROC_IE_ON_SA_AUTH_SHA2_512: + case ROC_IE_SA_AUTH_SHA2_256: + case ROC_IE_SA_AUTH_SHA2_384: + case ROC_IE_SA_AUTH_SHA2_512: template = &out_sa->sha2.template; - ctx_len = offsetof(struct roc_ie_on_outb_sa, - sha2.template); + ctx_len = offsetof(struct roc_ie_on_outb_sa, sha2.template); break; - case ROC_IE_ON_SA_AUTH_AES_XCBC_128: + case ROC_IE_SA_AUTH_AES_XCBC_128: template = &out_sa->aes_xcbc.template; - ctx_len = offsetof(struct roc_ie_on_outb_sa, - aes_xcbc.template); + ctx_len = offsetof(struct roc_ie_on_outb_sa, aes_xcbc.template); break; default: plt_err("Unsupported auth algorithm"); diff --git a/drivers/common/cnxk/roc_ie.h b/drivers/common/cnxk/roc_ie.h index 31b83948e1..fe0e281df9 100644 --- a/drivers/common/cnxk/roc_ie.h +++ b/drivers/common/cnxk/roc_ie.h @@ -31,4 +31,26 @@ enum { ROC_IE_SA_AES_KEY_LEN_256 = 3, }; +enum { + ROC_IE_SA_ENC_NULL = 0, + ROC_IE_SA_ENC_DES_CBC = 1, + ROC_IE_SA_ENC_3DES_CBC = 2, + ROC_IE_SA_ENC_AES_CBC = 3, + ROC_IE_SA_ENC_AES_CTR = 4, + ROC_IE_SA_ENC_AES_GCM = 5, + ROC_IE_SA_ENC_AES_CCM = 6, +}; + +enum { + ROC_IE_SA_AUTH_NULL = 0, + ROC_IE_SA_AUTH_MD5 = 1, + ROC_IE_SA_AUTH_SHA1 = 2, + ROC_IE_SA_AUTH_SHA2_224 = 3, + ROC_IE_SA_AUTH_SHA2_256 = 4, + ROC_IE_SA_AUTH_SHA2_384 = 5, + ROC_IE_SA_AUTH_SHA2_512 = 6, + ROC_IE_SA_AUTH_AES_GMAC = 7, + ROC_IE_SA_AUTH_AES_XCBC_128 = 8, +}; + #endif /* __ROC_IE_H__ */ diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h index 11c995e9d1..d3e463e105 100644 --- a/drivers/common/cnxk/roc_ie_on.h +++ b/drivers/common/cnxk/roc_ie_on.h @@ -31,28 +31,6 @@ enum roc_ie_on_ucc_ipsec { #define ROC_IE_ON_PER_PKT_IV BIT(43) #define ROC_IE_ON_INPLACE_BIT BIT(6) -enum { - ROC_IE_ON_SA_ENC_NULL = 0, - ROC_IE_ON_SA_ENC_DES_CBC = 1, - ROC_IE_ON_SA_ENC_3DES_CBC = 2, - ROC_IE_ON_SA_ENC_AES_CBC = 3, - ROC_IE_ON_SA_ENC_AES_CTR = 4, - ROC_IE_ON_SA_ENC_AES_GCM = 5, - ROC_IE_ON_SA_ENC_AES_CCM = 6, -}; - -enum { - ROC_IE_ON_SA_AUTH_NULL = 0, - ROC_IE_ON_SA_AUTH_MD5 = 1, - ROC_IE_ON_SA_AUTH_SHA1 = 2, - ROC_IE_ON_SA_AUTH_SHA2_224 = 3, - ROC_IE_ON_SA_AUTH_SHA2_256 = 4, - ROC_IE_ON_SA_AUTH_SHA2_384 = 5, - ROC_IE_ON_SA_AUTH_SHA2_512 = 6, - ROC_IE_ON_SA_AUTH_AES_GMAC = 7, - ROC_IE_ON_SA_AUTH_AES_XCBC_128 = 8, -}; - enum { ROC_IE_ON_SA_FRAG_POST = 0, ROC_IE_ON_SA_FRAG_PRE = 1, diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h index af2691e0eb..1420e3d586 100644 --- a/drivers/common/cnxk/roc_ie_ot.h +++ b/drivers/common/cnxk/roc_ie_ot.h @@ -110,25 +110,6 @@ enum { ROC_IE_OT_SA_INNER_PKT_L4_CSUM_DISABLE = 1, }; -enum { - ROC_IE_OT_SA_ENC_NULL = 0, - ROC_IE_OT_SA_ENC_3DES_CBC = 2, - ROC_IE_OT_SA_ENC_AES_CBC = 3, - ROC_IE_OT_SA_ENC_AES_CTR = 4, - ROC_IE_OT_SA_ENC_AES_GCM = 5, - ROC_IE_OT_SA_ENC_AES_CCM = 6, -}; - -enum { - ROC_IE_OT_SA_AUTH_NULL = 0, - ROC_IE_OT_SA_AUTH_SHA1 = 2, - ROC_IE_OT_SA_AUTH_SHA2_256 = 4, - ROC_IE_OT_SA_AUTH_SHA2_384 = 5, - ROC_IE_OT_SA_AUTH_SHA2_512 = 6, - ROC_IE_OT_SA_AUTH_AES_GMAC = 7, - ROC_IE_OT_SA_AUTH_AES_XCBC_128 = 8, -}; - enum { ROC_IE_OT_SA_ENCAP_NONE = 0, ROC_IE_OT_SA_ENCAP_UDP = 1, diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h index 4e95fbb6eb..2c500afbca 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h +++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h @@ -61,9 +61,9 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop, struct cn10k_s #ifdef LA_IPSEC_DEBUG if (sess->sa.out_sa.w2.s.iv_src == ROC_IE_OT_SA_IV_SRC_FROM_SA) { - if (sess->sa.out_sa.w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_GCM || - sess->sa.out_sa.w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_CCM || - sess->sa.out_sa.w2.s.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC) + if (sess->sa.out_sa.w2.s.enc_type == ROC_IE_SA_ENC_AES_GCM || + sess->sa.out_sa.w2.s.enc_type == ROC_IE_SA_ENC_AES_CCM || + sess->sa.out_sa.w2.s.auth_type == ROC_IE_SA_AUTH_AES_GMAC) ipsec_po_sa_aes_gcm_iv_set(sess, cop); else ipsec_po_sa_iv_set(sess, cop); diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c index 5e509e97d4..8857c38355 100644 --- a/drivers/net/cnxk/cn10k_ethdev_sec.c +++ b/drivers/net/cnxk/cn10k_ethdev_sec.c @@ -660,10 +660,10 @@ outb_dbg_iv_update(struct roc_ot_ipsec_outb_sa *outb_sa, const char *__iv_str) if (!iv_str) return; - if (outb_sa->w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_GCM || - outb_sa->w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_CTR || - outb_sa->w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_CCM || - outb_sa->w2.s.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC) { + if (outb_sa->w2.s.enc_type == ROC_IE_SA_ENC_AES_GCM || + outb_sa->w2.s.enc_type == ROC_IE_SA_ENC_AES_CTR || + outb_sa->w2.s.enc_type == ROC_IE_SA_ENC_AES_CCM || + outb_sa->w2.s.auth_type == ROC_IE_SA_AUTH_AES_GMAC) { memset(outb_sa->iv.s.iv_dbg1, 0, sizeof(outb_sa->iv.s.iv_dbg1)); memset(outb_sa->iv.s.iv_dbg2, 0, sizeof(outb_sa->iv.s.iv_dbg2)); diff --git a/drivers/net/cnxk/cn9k_ethdev_sec.c b/drivers/net/cnxk/cn9k_ethdev_sec.c index a0e0a73639..25110d1a5b 100644 --- a/drivers/net/cnxk/cn9k_ethdev_sec.c +++ b/drivers/net/cnxk/cn9k_ethdev_sec.c @@ -422,10 +422,10 @@ outb_dbg_iv_update(struct roc_ie_on_common_sa *common_sa, const char *__iv_str) if (!iv_str) return; - if (common_sa->ctl.enc_type == ROC_IE_OT_SA_ENC_AES_GCM || - common_sa->ctl.enc_type == ROC_IE_OT_SA_ENC_AES_CTR || - common_sa->ctl.enc_type == ROC_IE_OT_SA_ENC_AES_CCM || - common_sa->ctl.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC) { + if (common_sa->ctl.enc_type == ROC_IE_SA_ENC_AES_GCM || + common_sa->ctl.enc_type == ROC_IE_SA_ENC_AES_CTR || + common_sa->ctl.enc_type == ROC_IE_SA_ENC_AES_CCM || + common_sa->ctl.auth_type == ROC_IE_SA_AUTH_AES_GMAC) { iv_dbg = common_sa->iv.gcm.iv; iv_len = 8; } @@ -534,7 +534,7 @@ cn9k_eth_sec_session_update(void *device, outb_priv->esn = ipsec->esn.value; memcpy(&outb_priv->nonce, outb_sa->common_sa.iv.gcm.nonce, 4); - if (outb_sa->common_sa.ctl.enc_type == ROC_IE_ON_SA_ENC_AES_GCM) + if (outb_sa->common_sa.ctl.enc_type == ROC_IE_SA_ENC_AES_GCM) outb_priv->copy_salt = 1; rlens = &outb_priv->rlens; @@ -750,7 +750,7 @@ cn9k_eth_sec_session_create(void *device, outb_priv->seq = 1; memcpy(&outb_priv->nonce, outb_sa->common_sa.iv.gcm.nonce, 4); - if (outb_sa->common_sa.ctl.enc_type == ROC_IE_ON_SA_ENC_AES_GCM) + if (outb_sa->common_sa.ctl.enc_type == ROC_IE_SA_ENC_AES_GCM) outb_priv->copy_salt = 1; /* Save rlen info */ -- 2.25.1