From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1581545909; Thu, 5 Sep 2024 09:47:29 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0765942E54; Thu, 5 Sep 2024 09:46:54 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id DA75C42E49 for ; Thu, 5 Sep 2024 09:46:51 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 48547cHg013654 for ; Thu, 5 Sep 2024 00:46:51 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=o yBkO4Dvb+i0NXWF/fa1+8ukrGOMIiwXINw9jmEDdFM=; b=LswVOdAgf+oM5ewsm 6bEJOeojgV+42+DUgTLrKAu1WMiCubyd/FqY/QwLEQCJvpxKnp4EPnATWqKLvkFk jfZB5SgkVegoWJK0eJ9okCHwBZrjhpotEfUm1pqnvjg9KgqgQwOsgC2YeFv/TJTb 1xVQh7GIVfqJYPlTLQtxncJov4jQQOsRM1K61iNQH36dvidSsTDnSWxD7/GJys3U Ol9a0XYLzxYhW18y6Oj787beQoaJp7mSxqiE+xbEpuBJ5/pgGU0OqFpSOuMxzpRW rCe07ZGWDCVbFhhP11sQKs8t9GNKjnuoZVMzJZ4pvVXMa7CFnpWThkHqzfQea/ty 3E/Ng== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 41ev31tfpf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 05 Sep 2024 00:46:50 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 5 Sep 2024 00:46:50 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 5 Sep 2024 00:46:50 -0700 Received: from hyd1554.caveonetworks.com (unknown [10.29.56.32]) by maili.marvell.com (Postfix) with ESMTP id 47C4A5B6928; Thu, 5 Sep 2024 00:46:48 -0700 (PDT) From: Tejasree Kondoj To: Akhil Goyal CC: Anoob Joseph , Vidya Sagar Velumuri , Subject: [PATCH 07/11] crypto/cnxk: use opaque pointer for PMD APIs Date: Thu, 5 Sep 2024 13:16:27 +0530 Message-ID: <20240905074631.1462357-8-ktejasree@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240905074631.1462357-1-ktejasree@marvell.com> References: <20240905074631.1462357-1-ktejasree@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: cbSC7FFnIbPDOqJWRlQLrCFPYq-0yBHb X-Proofpoint-GUID: cbSC7FFnIbPDOqJWRlQLrCFPYq-0yBHb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-05_04,2024-09-04_01,2024-09-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Anoob Joseph Use opaque pointer instead of void * for PMD APIs. Usage of forward declaration and opaque pointer would allow compiler to prevent unintended usage which cannot be prevented with void *. Signed-off-by: Anoob Joseph --- drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 12 ++++++------ drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h | 18 +++++++++++++++--- 2 files changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index cfcfa79fdf..d0ad2d9a4b 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -945,7 +945,7 @@ cnxk_cpt_queue_pair_event_error_query(struct rte_cryptodev *dev, uint16_t qp_id) return 0; } -void * +struct rte_pmd_cnxk_crypto_qptr * rte_pmd_cnxk_crypto_qptr_get(uint8_t dev_id, uint16_t qp_id) { const struct rte_crypto_fp_ops *fp_ops; @@ -958,9 +958,9 @@ rte_pmd_cnxk_crypto_qptr_get(uint8_t dev_id, uint16_t qp_id) } static inline void -cnxk_crypto_cn10k_submit(void *qptr, void *inst, uint16_t nb_inst) +cnxk_crypto_cn10k_submit(struct rte_pmd_cnxk_crypto_qptr *qptr, void *inst, uint16_t nb_inst) { - struct cnxk_cpt_qp *qp = qptr; + struct cnxk_cpt_qp *qp = PLT_PTR_CAST(qptr); uint64_t lmt_base, io_addr; uint16_t lmt_id; void *lmt_dst; @@ -987,9 +987,9 @@ cnxk_crypto_cn10k_submit(void *qptr, void *inst, uint16_t nb_inst) } static inline void -cnxk_crypto_cn9k_submit(void *qptr, void *inst, uint16_t nb_inst) +cnxk_crypto_cn9k_submit(struct rte_pmd_cnxk_crypto_qptr *qptr, void *inst, uint16_t nb_inst) { - struct cnxk_cpt_qp *qp = qptr; + struct cnxk_cpt_qp *qp = PLT_PTR_CAST(qptr); const uint64_t lmt_base = qp->lf.lmt_base; const uint64_t io_addr = qp->lf.io_addr; @@ -1008,7 +1008,7 @@ cnxk_crypto_cn9k_submit(void *qptr, void *inst, uint16_t nb_inst) } void -rte_pmd_cnxk_crypto_submit(void *qptr, void *inst, uint16_t nb_inst) +rte_pmd_cnxk_crypto_submit(struct rte_pmd_cnxk_crypto_qptr *qptr, void *inst, uint16_t nb_inst) { if (roc_model_is_cn10k()) return cnxk_crypto_cn10k_submit(qptr, inst, nb_inst); diff --git a/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h b/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h index eab1243065..28d86b5a18 100644 --- a/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h +++ b/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h @@ -13,6 +13,16 @@ #include +/* Forward declarations */ + +/** + * @brief Crypto CNXK PMD QPTR opaque pointer. + * + * This structure represents the queue pair structure that would be the input to APIs that use + * hardware queues. + */ +struct rte_pmd_cnxk_crypto_qptr; + /** * Get queue pointer of a specific queue in a cryptodev. * @@ -21,10 +31,11 @@ * @param qp_id * Index of the queue pair. * @return - * Pointer to queue pair structure that would be the input to submit APIs. + * - On success, pointer to queue pair structure that would be the input to submit APIs. + * - NULL on error. */ __rte_experimental -void *rte_pmd_cnxk_crypto_qptr_get(uint8_t dev_id, uint16_t qp_id); +struct rte_pmd_cnxk_crypto_qptr *rte_pmd_cnxk_crypto_qptr_get(uint8_t dev_id, uint16_t qp_id); /** * Submit CPT instruction (cpt_inst_s) to hardware (CPT). @@ -43,6 +54,7 @@ void *rte_pmd_cnxk_crypto_qptr_get(uint8_t dev_id, uint16_t qp_id); * Number of instructions. */ __rte_experimental -void rte_pmd_cnxk_crypto_submit(void *qptr, void *inst, uint16_t nb_inst); +void rte_pmd_cnxk_crypto_submit(struct rte_pmd_cnxk_crypto_qptr *qptr, void *inst, + uint16_t nb_inst); #endif /* _PMD_CNXK_CRYPTO_H_ */ -- 2.25.1